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* kmemcheck: don't track page tablesVegard Nossum2009-06-15
| | | | | | | As these are allocated using the page allocator, we need to pass __GFP_NOTRACK before we add page allocator support to kmemcheck. Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
* kmemcheck: add DMA hooksVegard Nossum2009-06-15
| | | | | | | | | This patch hooks into the DMA API to prevent the reporting of the false positives that would otherwise be reported when memory is accessed that is also used directly by devices. [rebased for mainline inclusion] Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
* kmemcheck: add mm functionsVegard Nossum2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With kmemcheck enabled, the slab allocator needs to do this: 1. Tell kmemcheck to allocate the shadow memory which stores the status of each byte in the allocation proper, e.g. whether it is initialized or uninitialized. 2. Tell kmemcheck which parts of memory that should be marked uninitialized. There are actually a few more states, such as "not yet allocated" and "recently freed". If a slab cache is set up using the SLAB_NOTRACK flag, it will never return memory that can take page faults because of kmemcheck. If a slab cache is NOT set up using the SLAB_NOTRACK flag, callers can still request memory with the __GFP_NOTRACK flag. This does not prevent the page faults from occuring, however, but marks the object in question as being initialized so that no warnings will ever be produced for this object. In addition to (and in contrast to) __GFP_NOTRACK, the __GFP_NOTRACK_FALSE_POSITIVE flag indicates that the allocation should not be tracked _because_ it would produce a false positive. Their values are identical, but need not be so in the future (for example, we could now enable/disable false positives with a config option). Parts of this patch were contributed by Pekka Enberg but merged for atomicity. Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com> Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by: Ingo Molnar <mingo@elte.hu> [rebased for mainline inclusion] Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
* x86: add hooks for kmemcheckVegard Nossum2009-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | The hooks that we modify are: - Page fault handler (to handle kmemcheck faults) - Debug exception handler (to hide pages after single-stepping the instruction that caused the page fault) Also redefine memset() to use the optimized version if kmemcheck is enabled. (Thanks to Pekka Enberg for minimizing the impact on the page fault handler.) As kmemcheck doesn't handle MMX/SSE instructions (yet), we also disable the optimized xor code, and rely instead on the generic C implementation in order to avoid false-positive warnings. Signed-off-by: Vegard Nossum <vegardno@ifi.uio.no> [whitespace fixlet] Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by: Ingo Molnar <mingo@elte.hu> [rebased for mainline inclusion] Signed-off-by: Vegard Nossum <vegardno@ifi.uio.no>
* kmemcheck: use kmemcheck_pte_lookup() instead of open-coding itPekka Enberg2009-06-15
| | | | | | | | Lets use kmemcheck_pte_lookup() in kmemcheck_fault() instead of open-coding it there. Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
* kmemcheck: move 64-bit ifdef out of kmemcheck_opcode_decode()Pekka Enberg2009-06-15
| | | | | | | | | This patch moves the CONFIG_X86_64 ifdef out of kmemcheck_opcode_decode() by introducing a version of the function that always returns false for CONFIG_X86_32. Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
* kmemcheck: remove multiple ifdef'd definitions of the same global variablePekka Enberg2009-06-15
| | | | | | | | Multiple ifdef'd definitions of the same global variable is ugly and error-prone. Fix that up. Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
* kmemcheck: make initialization message less confusingPekka Enberg2009-06-15
| | | | | | | | The "Bugs, beware!" printout during is cute but confuses users that something bad happened so change the text to the more boring "Initialized" message. Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
* kmemcheck: remove forward declarations from error.cPekka Enberg2009-06-15
| | | | | | | | This patch reorders code in error.c so that we can get rid of the forward declarations. Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
* kmemcheck: include module.h to prevent warningsRandy Dunlap2009-06-13
| | | | | | | | | | | | | | | kmemcheck/shadow.c needs to include <linux/module.h> to prevent the following warnings: linux-next-20080724/arch/x86/mm/kmemcheck/shadow.c:64: warning : data definition has no type or storage class linux-next-20080724/arch/x86/mm/kmemcheck/shadow.c:64: warning : type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' linux-next-20080724/arch/x86/mm/kmemcheck/shadow.c:64: warning : parameter names (without types) in function declaration Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Cc: vegardno@ifi.uio.no Cc: penberg@cs.helsinki.fi Cc: akpm <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* kmemcheck: add the kmemcheck coreVegard Nossum2009-06-13
| | | | | | | | | | | | | | | | | | | | | | General description: kmemcheck is a patch to the linux kernel that detects use of uninitialized memory. It does this by trapping every read and write to memory that was allocated dynamically (e.g. using kmalloc()). If a memory address is read that has not previously been written to, a message is printed to the kernel log. Thanks to Andi Kleen for the set_memory_4k() solution. Andrew Morton suggested documenting the shadow member of struct page. Signed-off-by: Vegard Nossum <vegardno@ifi.uio.no> Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> [export kmemcheck_mark_initialized] [build fix for setup_max_cpus] Signed-off-by: Ingo Molnar <mingo@elte.hu> [rebased for mainline inclusion] Signed-off-by: Vegard Nossum <vegardno@ifi.uio.no>
* x86: add save_stack_trace_bp() for tracing from a specific stack frameVegard Nossum2009-06-12
| | | | | | | | | | | | | This will help kmemcheck (and possibly other debugging tools) since we can now simply pass regs->bp to the stack tracer instead of specifying the number of stack frames to skip, which is unreliable if gcc decides to inline functions, etc. Note that this makes the API incomplete for other architectures, but I expect that those can be updated lazily, e.g. when they need it. Cc: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
* Merge branch 'for-linus' of ↵Linus Torvalds2009-06-11
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs-2.6: (87 commits) nilfs2: get rid of bd_mount_sem use from nilfs nilfs2: correct exclusion control in nilfs_remount function nilfs2: simplify remaining sget() use nilfs2: get rid of sget use for checking if current mount is present nilfs2: get rid of sget use for acquiring nilfs object nilfs2: remove meaningless EBUSY case from nilfs_get_sb function remove the call to ->write_super in __sync_filesystem nilfs2: call nilfs2_write_super from nilfs2_sync_fs jffs2: call jffs2_write_super from jffs2_sync_fs ufs: add ->sync_fs sysv: add ->sync_fs hfsplus: add ->sync_fs hfs: add ->sync_fs fat: add ->sync_fs ext2: add ->sync_fs exofs: add ->sync_fs bfs: add ->sync_fs affs: add ->sync_fs sanitize ->fsync() for affs repair bfs_write_inode(), switch bfs to simple_fsync() ...
| * Push BKL into do_mount()Al Viro2009-06-11
| | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* | Merge branch 'for-linus' of ↵Linus Torvalds2009-06-11
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: m68knommu: remove unecessary include of thread_info.h in entry.S m68knommu: enumerate INIT_THREAD fields properly headers_check fix: m68k, swab.h arch/m68knommu: Convert #ifdef DEBUG printk(KERN_DEBUG to pr_debug( m68knommu: remove obsolete reset code m68knommu: move CPU reset code for the 5272 ColdFire into its platform code m68knommu: move CPU reset code for the 528x ColdFire into its platform code m68knommu: move CPU reset code for the 527x ColdFire into its platform code m68knommu: move CPU reset code for the 523x ColdFire into its platform code m68knommu: move CPU reset code for the 520x ColdFire into its platform code m68knommu: add CPU reset code for the 532x ColdFire m68knommu: add CPU reset code for the 5249 ColdFire m68knommu: add CPU reset code for the 5206e ColdFire m68knommu: add CPU reset code for the 5206 ColdFire m68knommu: add CPU reset code for the 5407 ColdFire m68knommu: add CPU reset code for the 5307 ColdFire m68knommu: merge system reset for code ColdFire 523x family m68knommu: fix system reset for ColdFire 527x family
| * | m68knommu: remove unecessary include of thread_info.h in entry.SGreg Ungerer2009-06-11
| | | | | | | | | | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: enumerate INIT_THREAD fields properlyGreg Ungerer2009-06-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use proper field value setting init INIT_THREAD macro. Fixes this: arch/m68knommu/kernel/init_task.c:27: warning: excess elements in array initializer arch/m68knommu/kernel/init_task.c:27: warning: (near initialization for ‘init_task.thread.fpstate’) Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | headers_check fix: m68k, swab.hJaswinder Singh Rajput2009-06-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix the following 'make headers_check' warnings: usr/include/asm-m68k/swab.h:4: include of <linux/types.h> is preferred over <asm/types.h> usr/include/asm-m68k/swab.h:10: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | arch/m68knommu: Convert #ifdef DEBUG printk(KERN_DEBUG to pr_debug(Joe Perches2009-06-10
| | | | | | | | | | | | | | | Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: remove obsolete reset codeGreg Ungerer2009-06-10
| | | | | | | | | | | | | | | | | | | | | All ColdFire and non-MMU 68k code has custom reset routines. Remove the obsolete and now un-used reset macros. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: move CPU reset code for the 5272 ColdFire into its platform codeGreg Ungerer2009-06-10
| | | | | | | | | | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: move CPU reset code for the 528x ColdFire into its platform codeGreg Ungerer2009-06-10
| | | | | | | | | | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: move CPU reset code for the 527x ColdFire into its platform codeGreg Ungerer2009-06-10
| | | | | | | | | | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: move CPU reset code for the 523x ColdFire into its platform codeGreg Ungerer2009-06-10
| | | | | | | | | | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: move CPU reset code for the 520x ColdFire into its platform codeGreg Ungerer2009-06-10
| | | | | | | | | | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: add CPU reset code for the 532x ColdFireGreg Ungerer2009-06-10
| | | | | | | | | | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: add CPU reset code for the 5249 ColdFireGreg Ungerer2009-06-10
| | | | | | | | | | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: add CPU reset code for the 5206e ColdFireGreg Ungerer2009-06-10
| | | | | | | | | | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: add CPU reset code for the 5206 ColdFireGreg Ungerer2009-06-10
| | | | | | | | | | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: add CPU reset code for the 5407 ColdFireGreg Ungerer2009-06-10
| | | | | | | | | | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: add CPU reset code for the 5307 ColdFireGreg Ungerer2009-06-10
| | | | | | | | | | | | Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: merge system reset for code ColdFire 523x familyGreg Ungerer2009-06-10
| | | | | | | | | | | | | | | | | | | | | | | | The sofwtare reset control code for the 523x ColdFire family uses the same Reset unit hardware as the 527x and 528x ColdFire parts. So they should all use the same code. Merge them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: fix system reset for ColdFire 527x familyGreg Ungerer2009-06-10
| | | | | | | | | | | | | | | | | | | | | | | | The sofwtare reset control for the 527x ColdFire family is based on the same Reset Control Unit as the 528x ColdFire family. So use the same reset code for both. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | | x86: use zalloc_cpumask_var in arch_early_irq_initYinghai Lu2009-06-11
| | | | | | | | | | | | | | | | | | | | | So we make sure MAXSMP gets a cleared cpumask Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | perfcounters: remove powerpc definitions of perf_counter_do_pendingStephen Rothwell2009-06-11
| |/ |/| | | | | | | | | | | | | | | | | Commit 925d519ab82b6dd7aca9420d809ee83819c08db2 ("perf_counter: unify and fix delayed counter wakeup") added global definitions. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Paul Mackerras <paulus@samba.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge branch 'perfcounters-for-linus' of ↵Linus Torvalds2009-06-11
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'perfcounters-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (574 commits) perf_counter: Turn off by default perf_counter: Add counter->id to the throttle event perf_counter: Better align code perf_counter: Rename L2 to LL cache perf_counter: Standardize event names perf_counter: Rename enums perf_counter tools: Clean up u64 usage perf_counter: Rename perf_counter_limit sysctl perf_counter: More paranoia settings perf_counter: powerpc: Implement generalized cache events for POWER processors perf_counters: powerpc: Add support for POWER7 processors perf_counter: Accurate period data perf_counter: Introduce struct for sample data perf_counter tools: Normalize data using per sample period data perf_counter: Annotate exit ctx recursion perf_counter tools: Propagate signals properly perf_counter tools: Small frequency related fixes perf_counter: More aggressive frequency adjustment perf_counter/x86: Fix the model number of Intel Core2 processors perf_counter, x86: Correct some event and umask values for Intel processors ...
| * \ Merge branch 'linus' into perfcounters/coreIngo Molnar2009-06-11
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/x86/kernel/irqinit.c arch/x86/kernel/irqinit_64.c arch/x86/kernel/traps.c arch/x86/mm/fault.c include/linux/sched.h kernel/exit.c
| * | | perf_counter: Rename L2 to LL cachePeter Zijlstra2009-06-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The top (fastest) and last level (biggest) caches are the most interesting ones, performance wise. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> [ Fixed the Nehalem LL table to LLC Reference/Miss events ] Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | perf_counter: Standardize event namesPeter Zijlstra2009-06-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pure renames only, to PERF_COUNT_HW_* and PERF_COUNT_SW_*. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | perf_counter: powerpc: Implement generalized cache events for POWER processorsPaul Mackerras2009-06-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds tables of event codes for the generalized cache events for all the currently supported powerpc processors: POWER{4,5,5+,6,7} and PPC970*, plus powerpc-specific code to use these tables when a generalized cache event is requested. Signed-off-by: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <18992.36430.933526.742969@drongo.ozlabs.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | perf_counters: powerpc: Add support for POWER7 processorsPaul Mackerras2009-06-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the back-end for the PMU on POWER7 processors. POWER7 has 4 fully-programmable counters and two fixed-function counters (which do respect the freeze conditions, can generate interrupts, and are writable, unlike PMC5/6 on POWER5+/6). Signed-off-by: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <18992.36329.189378.17992@drongo.ozlabs.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | perf_counter: Accurate period dataPeter Zijlstra2009-06-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currently log hw.sample_period for PERF_SAMPLE_PERIOD, however this is incorrect. When we adjust the period, it will only take effect the next cycle but report it for the current cycle. So when we adjust the period for every cycle, we're always wrong. Solve this by keeping track of the last_period. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | perf_counter: Introduce struct for sample dataPeter Zijlstra2009-06-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For easy extension of the sample data, put it in a structure. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | perf_counter: More aggressive frequency adjustmentPeter Zijlstra2009-06-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also employ the overflow handler to adjust the frequency, this results in a stable frequency in about 40~50 samples, instead of that many ticks. This also means we can start sampling at a sample period of 1 without running head-first into the throttle. It relies on sched_clock() to accurately measure the time difference between the overflow NMIs. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | perf_counter/x86: Fix the model number of Intel Core2 processorsYong Wang2009-06-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the model number of Intel Core2 processors according to the documentation: Intel Processor Identification with the CPUID Instruction: http://www.intel.com/support/processors/sb/cs-009861.htm Signed-off-by: Yong Wang <yong.y.wang@intel.com> Also-Reported-by: Arnd Bergmann <arnd@arndb.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <20090610090612.GA26580@ywang-moblin2.bj.intel.com> [ Added two more model numbers suggested by Arnd Bergmann ] Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | perf_counter, x86: Correct some event and umask values for Intel processorsYong Wang2009-06-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct some event and UMASK values according to Intel SDM, in the Nehalem and Atom tables. Signed-off-by: Yong Wang <yong.y.wang@intel.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <20090609131553.GA12489@ywang-moblin2.bj.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | perf_counter, x86: Clean up hw_cache_event ids copiesThomas Gleixner2009-06-08
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | perf_counter, x86: Implement generalized cache event types, add AMD supportThomas Gleixner2009-06-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fill in amd_hw_cache_event_id[] with the AMD CPU specific events, for family 0x0f, 0x10 and 0x11. There's apparently no distinction between load and store events, so we only fill in the load events. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | perf_counter: Clean up x86 boot messagesIngo Molnar2009-06-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Standardize and tidy up all the messages we print during perfcounter initialization. Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | perf_counter, x86: Implement generalized cache event types, add Atom supportThomas Gleixner2009-06-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fill in core2_hw_cache_event_id[] with the Atom model specific events. The events can be used in all the tools via the -e (--event) parameter, for example "-e l1-misses" or -"-e l2-accesses" or "-e l2-write-misses". ( Note: these are straight from the Intel manuals - not tested yet.) Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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