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* [MIPS] Fix linker script to work for non-4K page size.Ralf Baechle2006-02-07
| | | | | | | | Very much to my surprise Fuxin Zhang reports this is all it takes to get the kernel to work for page sizes larger than 4kB. This also paves the way for support for the R6000 and R8000 which don't support 4kB page size. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Oprofile: Support for 34K UP kernels.Ralf Baechle2006-02-07
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix dump_tlb.c warning and cleanup.Atsushi Nemoto2006-02-07
| | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix minor sparse warningsAtsushi Nemoto2006-02-07
| | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sparse: Add some __user tags to signal functions.Atsushi Nemoto2006-02-07
| | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Shrink Qemu configuration to the bare minimum that is need and tested.Ralf Baechle2006-02-07
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Support /proc/kcore for MIPSDaniel Jacobowitz2006-02-07
| | | | | | | | | | I'm pretty sure that the CKSEG0 bits are wrong, but I did need to cover that region - because the SB-1 kernel links at 0xffffffff80100000 or so, disassembly and printing static variables don't work unless the debugger can read that region. Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] IP22: Fix serial console detectionRalf Baechle2006-02-07
| | | | | | | | | | | | | From: Kaj-Michael Lang <milang@tal.org> In ip22-setup.c the checks for serial/graphics console logic does not check if ARCS console=g but the machine is using serial console, as it does if no keyboard is attached. This patch adds a check if ConsoleOut is serial. There might also be support for other graphics than Newport soon... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] ieee754[sd]p_neg workaroundAtsushi Nemoto2006-02-07
| | | | | | | | | | It looks glibc's pow() assumes an unary '-' operation for any number (including NaNs) always inverts its sign bit (though IEEE754 does not specify the sign bit for NaNs). This patch make the kernel math-emu emulates real MIPS neg.[ds] instruction. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove wrong __user tags.Atsushi Nemoto2006-02-07
| | | | | | | This fixes sparse warnings 'dereference of noderef expression'. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove commented out code to add -mmad for Nevada.Ralf Baechle2006-02-07
| | | | | | | | | Adding -mmad is not usable since over half a decade in gcc and when fixed the proper -march option values should enable the use of the mad, madu and mul instructions of the R5500, RM5200, RM7000 and RM9000 families. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix Cobalt PCI cache line sizesPeter Horton2006-02-07
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sparse: Add _MIPS_SZINT and _MIPS_ISA to CHECKFLAGS to fix sparse ↵Atsushi Nemoto2006-02-07
| | | | | | | | warnings. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sparse: Fix some compiler/sparse warnings in ptrace32.cAtsushi Nemoto2006-02-07
| | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Reformat to 80 columns.Ralf Baechle2006-02-07
| | | | | | Patch courtesy of Emily Postnews ;-) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Sibyte: Make all setup functions __init.Ralf Baechle2006-02-07
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Get rid of CONFIG_SB1_PASS_1_WORKAROUNDS #ifdef crapola.Ralf Baechle2006-02-07
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Au1xx0: really set KSEG0 to uncached on rebootSergei Shtylylov2006-02-07
| | | | | | | | | | | Fix a really old buglet in AMD Au1xx0 restart code: instead of modifying the whole CP0 Config.K0 field to 010b (meaning KSEG0 uncached) before flushing the caches and resetting a board, it only sets bit 1 of that reg. which is effectively a NOP since Config.K0 == 011b as the kernel sets it up (which is also its default value for Au1xx0). Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SB1: Add oprofile support.Mark Mason2006-02-07
| | | | | Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] BCM1480: Cleanup debug code left behind in the PCI driver.Mark Mason2006-02-07
| | | | | Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] BCM1125 PCI fixesMark Mason2006-02-07
| | | | | | | Make BCM1125 targets to link again. Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Nevada support for SGI O2.Ralf Baechle2006-02-07
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Rename include/asm-mips/cobalt to include/asm-mips/mach-cobalt.Ralf Baechle2006-02-07
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Rename _machine_power_off to pm_power_off so the kernel builds again.Ralf Baechle2006-02-07
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Check function pointers are non-zero before calling.Ralf Baechle2006-02-07
| | | | | | Several boards don't initialize the pointers, so let's play safe. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Revert "mips: add pm_power_off"Ralf Baechle2006-02-07
| | | | | | pm_power_off duplicates the functionality of _machine_restart. This reverts b142159fa5ffbad73b6927fafa5440148030f3f1 commit.
* [MIPS] RTLX compile fixes.Ralf Baechle2006-02-07
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Get rid of unnecessary prototypes. Fixes and optimizations for HZ > 100.Ralf Baechle2006-02-07
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove stray .set mips3 resulting in 64-bit instruction in 32-bit ↵Ralf Baechle2006-02-07
| | | | | | | | | kernels. Only the NMI handler was affected so this is a low impact bug. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2006-02-05
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| * [SPARC64]: Update defconfig.David S. Miller2006-02-05
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Add .gitignore file for sparc64 boot images.David S. Miller2006-02-05
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* | [PATCH] i386: HIGHMEM64G must depend on X86_CMPXCHG64Adrian Bunk2006-02-05
| | | | | | | | | | | | | | | | | | Due to the usage of set_64bit in include/asm-i386/pgtable-3level.h, HIGHMEM64G must depend on X86_CMPXCHG64. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] i386: print kernel version in register dumpsChuck Ebbert2006-02-05
| | | | | | | | | | | | | | | | | | | | | | | | | | Show first field of kernel version in register dumps like x86_64 does. Changes output from e.g.: (2.6.16-rc1) to: (2.6.16-rc1 #12) Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] i386 cpu hotplug: don't access freed memoryChuck Ebbert2006-02-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i386 CPU init code accesses freed init memory when booting a newly-started processor after CPU hotplug. The cpu_devs array is searched to find the vendor and it contains pointers to freed data. Fix that by: 1. Zeroing entries for freed vendor data after bootup. 2. Changing Transmeta, NSC and UMC to all __init[data]. 3. Printing a warning (once only) and setting this_cpu to a safe default when the vendor is not found. This does not change behavior for AMD systems. They were broken already but no error was reported. Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86: fix stack trace facility levelHugh Dickins2006-02-05
| | | | | | | | | | | | | | | | | | dump_stack() on page allocation failure presently has an irritating habit of shouting just "====" at everyone: please stop it. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] percpu data: only iterate over possible CPUsEric Dumazet2006-02-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | percpu_data blindly allocates bootmem memory to store NR_CPUS instances of cpudata, instead of allocating memory only for possible cpus. As a preparation for changing that, we need to convert various 0 -> NR_CPUS loops to use for_each_cpu(). (The above only applies to users of asm-generic/percpu.h. powerpc has gone it alone and is presently only allocating memory for present CPUs, so it's currently corrupting memory). Signed-off-by: Eric Dumazet <dada1@cosmosbay.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: James Bottomley <James.Bottomley@steeleye.com> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: Jens Axboe <axboe@suse.de> Cc: Anton Blanchard <anton@samba.org> Acked-by: William Irwin <wli@holomorphy.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | Revert "[PATCH] x86_64: Fix the node cpumask of a cpu going down"Linus Torvalds2006-02-05
|/ | | | | | | | | | | This reverts commit 10f4dc8b27ac42f930ac55adb8c521264dc997f8. Quoth Andi Kleen: "Kiran decided that it makes the problem worse than it was before. Fixing it fully requires more work which is too much for 2.6.16. So please revert that commit for now." Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: IOMMU printk cleanupJon Mason2006-02-04
| | | | | | | | | | | | | | | | | | | | This patch contains a printk reorder to remove the current problem of displaying "PCI-DMA: Disabling IOMMU." and then "PCI-DMA: using GART IOMMU" 20 lines later in dmesg. It also constains a printk reorder in swiotlb to state swiotlb enablement prior to describing the location of the bounce buffers, and a printk reorder to state gart enablement prior to describing the aperature. Also constains a whitespace cleanup in arch/x86_64/kernel/setup.c Tested (along with patch 2/2) on dual opteron with gart enabled, iommu=soft, and iommu=off. Signed-off-by: Jon Mason <jdmason@us.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: Let impossible CPUs point to reference per cpu dataAndi Kleen2006-02-04
| | | | | | | | | | | | | | Hack for 2.6.16. In 2.6.17 all code that uses NR_CPUs should be audited and changed to only touch possible CPUs. Don't mark the reference per cpu data init data (so it stays around after boot) and point all impossible CPUs to it. This way they reference some valid - although shared memory. Usually this is only initialization like INIT_LIST_HEADs and there won't be races because these CPUs never run. Still somewhat hackish. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386/x86-64: Don't ack the APIC for bad interrupts when the APIC is ↵Andi Kleen2006-02-04
| | | | | | | | | | | not enabled It's bad juju to touch the APIC when it hasn't been enabled. I also moved ack_bad_irq for x86-64 out of line following i386. Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: Dont record local apic ids when they are disabled in MADTAshok Raj2006-02-04
| | | | | | | | | | | | | | Some broken BIOS's had processors disabled, but same apic id as a valid processor. This causes acpi_processor_start() to think this disabled cpu is ok, and croak. So we dont record bad apicid's anymore. http://bugzilla.kernel.org/show_bug.cgi?id=5930 Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: minor odering correction to dump_pagetable()Jan Beulich2006-02-04
| | | | | | | | | Checking of the validity of pointers should be consistently done before dereferencing the pointer. Signed-Off-By: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: small fix for CFI annotationsJan Beulich2006-02-04
| | | | | | | | | | Conditionalize two unwind directives to match other similarly conditional code. Signed-Off-By: Jan Beulich <jbeulich@novell.com> Cc: Jim Houston <jim.houston@ccur.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: Calibrate APIC timer using PM timerAndi Kleen2006-02-04
| | | | | | | | | | | | | | | | | | | | | On some broken motherboards (at least one NForce3 based AMD64 laptop) the PIT timer runs at a incorrect frequency. This patch adds a new option "apicpmtimer" that allows to use the APIC timer and calibrate it using the PMTimer. It requires the earlier patch that allows to run the main timer from the APIC. Specifying apicpmtimer implies apicmaintimer. The option defaults to off for now. I tested it on a few systems and the resulting APIC timer frequencies were usually a bit off, but always <1%, which should be tolerable. TBD figure out heuristic to enable this automatically on the affected systems TBD perhaps do it on all NForce3s or using DMI? Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: Don't allow kprobes on __switch_toAndi Kleen2006-02-04
| | | | | | | | | | | | kprobes cannot deal with the funny calling conventions when it runs on a different stack when it returns. If someone wants to instrument context switch they can add a probe to schedule() instead. Cc: jkenisto@us.ibm.com, prasanna@in.ibm.com Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: align per-cpu section to configured cache bytesZach Brown2006-02-04
| | | | | | | | | | | | Align the start of the per-cpu section to the configured number of bytes in a cache line. This stops a BUG_ON() from triggering in load_module() when DEFINE_PER_CPU() is used in a module and the section isn't cacheline-aligned. Rusty also found this and sent a patch in a while ago (http://lkml.org/lkml/2004/10/19/17), I don't know what came of that. Signed-off-by: Zach Brown <zach.brown@oracle.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: When allocation of merged SG lists fails in the IOMMU don't ↵Kevin VanMaren2006-02-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | merge [ AK: I redid Kevin's fix to be simpler, but the idea and original analysis of the problem is from Kevin] This avoid allocation failures on some SATA systems like Nvidia CK8 when the IOMMU gets fragmented. Modern SATA devices have quite large queues (128 entries) and the FS with ext2/3 is good enough now that it often passes whole 128 page sg lists down to the driver. These require 512K of continuous free space in the IOMMU aperture to map when merged. When the IOMMU is fragmented this could lead to spurious IO errors due to failing mappings. Short term fix is to just try to map the SG list again unmerged page by page - this way fragmentation doesn't matter anymore. The code for that was already there, but it just wasn't enabled for the merge case. According to Kevin at least the Nvidia device doesn't seem to benefit from merging much anyways, so the only slowdown is from trying to do an unnecessary merge attempt. Kevin plans to implement better fragmentation avoidance in the future, but that wouldn't be 2.6.16 material. TBD: should add some statistic counters to count how often that really happens. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: Fix zero mcfg entry workaround on x86-64Andi Kleen2006-02-04
| | | | | | | | | | | I broke this earlier when moving the patch from i386 to x86-64. Need to return the virtual address here, not the physical address. This fixes some boot time crashes on x86-64. Cc: gregkh@suse.de Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: Do more checking in the SRAT header codeAndi Kleen2006-02-04
| | | | | | | | | | | - Check if the processor/memory affinity entries are long enough according to the ACPI 3.0 spec. - Ignore memory affinity entries that define a zero length region. All based on BIOS issues found in the field @) Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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