aboutsummaryrefslogtreecommitdiffstats
path: root/arch/x86/pci
Commit message (Collapse)AuthorAge
* Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds2010-01-08
|\ | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-tip: x86, irq: Check move_in_progress before freeing the vector mapping x86: copy_from_user() should not return -EFAULT Revert "x86: Side-step lguest problem by only building cmpxchg8b_emu for pre-Pentium" x86/pci: Intel ioh bus num reg accessing fix x86: Fix size for ex trampoline with 32bit
| * x86/pci: Intel ioh bus num reg accessing fixYinghai Lu2010-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | It is above 0x100 (PCI-Express extended register space), so if mmconf is not enable, we can't access it. [ hpa: changed the bound from 0x200 to 0x120, which is the tight bound. ] Reported-by: Jens Axboe <jens.axboe@oracle.com> Signed-off-by: Yinghai Lu <yinghai@kernel.org> LKML-Reference: <1261525263-13763-3-git-send-email-yinghai@kernel.org> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* | PCI: fix section mismatch on update_res()Jiri Slaby2009-12-16
|/ | | | | | | | | | | | | | | | | | | | | | | Remark update_res from __init to __devinit as it is called also from __devinit functions. This patch removes the following warning message: WARNING: vmlinux.o(.devinit.text+0x774a): Section mismatch in reference from the function pci_root_bus_res() to the function .init.text:update_res() The function __devinit pci_root_bus_res() references a function __init update_res(). If update_res is only used by pci_root_bus_res then annotate update_res with a matching annotation. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Cc: Aristeu Sergio <arozansk@redhat.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: linux-pci@vger.kernel.org Cc: x86@kernel.org Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: claim SR-IOV BARs in pcibios_allocate_resourceYinghai Lu2009-12-04
| | | | | | | | This allows us to use the BIOS SR-IOV allocations rather than assigning our own later on. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: add lookup functionBjorn Helgaas2009-11-24
| | | | | | | | | | This patch factors out the search for an MMCONFIG region, which was previously implemented in both mmconfig_32 and mmconfig_64. No functional change. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: clean up printksBjorn Helgaas2009-11-24
| | | | | | | | | No functional change; just tidy up printks and make them more consistent with the rest of PCI. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: add pci_mmconfig_remove() to remove MMCONFIG regionBjorn Helgaas2009-11-24
| | | | | | | | | This is only used internally now, but eventually will be used in the hot-remove path to remove the MMCONFIG region associated with a host bridge. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: manage pci_mmcfg_region as a list, not a tableBjorn Helgaas2009-11-24
| | | | | | | | | This changes pci_mmcfg_region from a table to a list, to make it easier to add and remove MMCONFIG regions for PCI host bridge hotplug. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: remove typeof so we can use a listBjorn Helgaas2009-11-24
| | | | | | | | | | This replaces "typeof(pci_mmcfg_config[0])" with the actual type because I plan to convert pci_mmcfg_config to a list, and then "pci_mmcfg_config[0]" won't mean anything. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: add virtual address to struct pci_mmcfg_regionBjorn Helgaas2009-11-24
| | | | | | | | | | The virtual address is only used for x86_64, but it's so much simpler to manage it as part of the pci_mmcfg_region that I think it's worth wasting a pointer per MMCONFIG region on x86_32. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: trivial is_mmconf_reserved() interface simplificationBjorn Helgaas2009-11-24
| | | | | | | | | Since pci_mmcfg_region contains the struct resource, no need to pass the pci_mmcfg_region *and* the resource start/size. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: add resource to struct pci_mmcfg_regionBjorn Helgaas2009-11-24
| | | | | | | | | | | | | This patch adds a resource and corresponding name to the MMCONFIG structure. This makes allocation simpler (we can allocate the resource and name at the same time we allocate the pci_mmcfg_region), and gives us a way to hang onto the resource after inserting it. This will be needed so we can release and free it when hot-removing a host bridge. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: use pointer to simplify pci_mmcfg_config[] structure accessBjorn Helgaas2009-11-24
| | | | | | | | | No functional change, but simplifies a future patch to convert the table to a list. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: rename pci_mmcfg_region structure membersBjorn Helgaas2009-11-24
| | | | | | | | This only renames the struct pci_mmcfg_region members; no functional change. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: use a private structure rather than the ACPI MCFG oneBjorn Helgaas2009-11-24
| | | | | | | | | | | | | This adds a struct pci_mmcfg_region with a little more information than the struct acpi_mcfg_allocation used previously. The acpi_mcfg structure is defined by the spec, so we can't change it. To begin with, struct pci_mmcfg_region is basically the same as the ACPI MCFG version, but future patches will add more information. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: add PCI_MMCFG_BUS_OFFSET() to factor common expressionBjorn Helgaas2009-11-24
| | | | | | | | | This factors out the common "bus << 20" expression used when computing the MMCONFIG address. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: reject MMCONFIG apertures at address zeroBjorn Helgaas2009-11-24
| | | | | | | | | | Since all MMCONFIG regions go through pci_mmconfig_add(), we can test the address once there. If the caller supplies an address of zero, we never insert it in the pci_mmcfg_config[] table, so no need to test it elsewhere. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: simplify tests for empty pci_mmcfg_config tableBjorn Helgaas2009-11-24
| | | | | | | | | We never set pci_mmcfg_config unless we increment pci_mmcfg_config_num, so there's no need to test both pci_mmcfg_config_num and pci_mmcfg_config. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: centralize MCFG structure managementBjorn Helgaas2009-11-24
| | | | | | | | | | | | | | This patch encapsulate pci_mmcfg_config[] updates. All alloc/free is now done in pci_mmconfig_add() and free_all_mcfg(), so all updates to pci_mmcfg_config[] and pci_mmcfg_config_num are in those two functions. This replaces the previous sequence of extend_mmcfg(), fill_one_mmcfg() with the single pci_mmconfig_add() interface. This interface is currently static but will eventually be used in the host bridge hot-add path. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: step through MCFG table, not pci_mmcfg_config[]Bjorn Helgaas2009-11-24
| | | | | | | | | Step through the ACPI MCFG table, not pci_mmcfg_config[]. No functional change, but simplifies future patches that encapsulate pci_mmcfg_config[]. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: count MCFG structures with local variableBjorn Helgaas2009-11-24
| | | | | | | | | Use a local variable, not pci_mmcfg_config_num, to count MCFG entries. No functional change, but simplifies future changes. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: MMCONFIG: remove unused definitionsBjorn Helgaas2009-11-24
| | | | | | Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/pci: seperate x86_pci_rootbus_res_quirks from amd_bus.cYinghai Lu2009-11-24
| | | | | | | | Those functions are used by intel_bus.c so seperate them to another file. and make amd_bus a bit smaller. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: fix comment typo in bus_numa.hJiri Kosina2009-11-24
| | | | | | Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: remove early PCI pr_debug statementsAlex Chiang2009-11-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit db635adc turned -DDEBUG for x86/pci on when CONFIG_PCI_DEBUG is set. In general, I agree with that change. However, it exposes a bunch of very low level PCI debugging in the early x86 path, such as: 0 reading 2 from a: ffff 1 reading 2 from a: ffff 2 reading 2 from a: ffff 3 reading 2 from a: 300 3 reading 2 from 0: 1002 3 reading 2 from 2: 515e These statements add a lot of noise to the boot and aren't likely to be necessary even when handling random upstream bug reports. [In contrast, statements such as these: pci 0000:02:04.0: found [14e4:164a] class 000200 header type 00 pci 0000:02:04.0: reg 10: [mem 0xf8000000-0xf9ffffff 64bit] pci 0000:02:04.0: reg 30: [mem 0x00000000-0x0001ffff pref] are indeed useful when remote debugging users' machines] Remove the noisy printks and save electrons everywhere. Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Andi Kleen <andi@firstfloor.org> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: remove 64-bit divisionBjorn Helgaas2009-11-06
| | | | | | | | | | The roundup() caused a build error (undefined reference to `__udivdi3'). We're aligning to power-of-two boundaries, so it's simpler to just use ALIGN() anyway, which avoids the division. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Acked-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: fix bogus host bridge window start/end alignment from _CRSBjorn Helgaas2009-11-04
| | | | | | | | | | | | | | | | | | | | | | | PCI device BARs are guaranteed to start and end on at least a four-byte (I/O) or a sixteen-byte (MMIO) boundary because they're aligned on their size and the low BAR bits are reserved. PCI-to-PCI bridge apertures have even larger alignment restrictions. However, some BIOSes (e.g., HP DL360 BIOS P31) report host bridge windows like "[io 0x0000-0x2cfe]". This is wrong because it excludes the last port at 0x2cff: it's impossible for a downstream device to claim 0x2cfe without also claiming 0x2cff. In fact, this BIOS configures a device behind the bridge to "[io 0x2c00-0x2cff]", so we know the window actually does include 0x2cff. This patch rounds the start and end of apertures to the appropriate boundary. I experimentally determined that Windows contains a similar workaround; details here: http://bugzilla.kernel.org/show_bug.cgi?id=14337 Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: for debuggability, show host bridge windows even when ignoring _CRSBjorn Helgaas2009-11-04
| | | | | | | | | | We have occasional problems with PCI resource allocation, and sometimes they could be avoided by paying attention to what ACPI tells us about the host bridges. This patch doesn't change the behavior, but it prints window information that should make debugging easier. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: improve discovery/configuration messagesBjorn Helgaas2009-11-04
| | | | | | | | | | | This makes PCI resource management messages more consistent and adds a few new messages to aid debugging. Whenever we assign resources to a device, update a BAR, or change a bridge aperture, it's worth noting it. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: print domain:bus in conventional formatBjorn Helgaas2009-11-04
| | | | | | | Use the dev_printk-like "%04x:%02x" format for printing PCI bus numbers. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* vsprintf: use %pR, %pr instead of %pRt, %pRfBjorn Helgaas2009-11-04
| | | | | | | | | | | | | | | | | Jesse accidentally applied v1 [1] of the patchset instead of v2 [2]. This is the diff between v1 and v2. The changes in this patch are: - tidied vsprintf stack buffer to shrink and compute size more accurately - use %pR for decoding and %pr for "raw" (with type and flags) instead of adding %pRt and %pRf [1] http://lkml.org/lkml/2009/10/6/491 [2] http://lkml.org/lkml/2009/10/13/441 Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: use -DDEBUG when CONFIG_PCI_DEBUG setBjorn Helgaas2009-11-04
| | | | | | | | We use dev_dbg() in arch/x86/pci, but there's no easy way to turn it on. Add -DDEBUG when CONFIG_PCI_DEBUG=y, just like we do in drivers/pci. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: allow MMCONFIG above 4GBBjorn Helgaas2009-11-04
| | | | | | | | | | | | | | | | | | The current whitelist requires a kernel change for every machine that has MMCONFIG regions above 4GB, even if BIOS provides a correct MCFG table. This patch expands the whitelist to include machines with a rev 1 or newer MCFG table and a DMI_BIOS_DATE of 2010 or later. That way, we only need kernel changes for new machines that provide incorrect MCFG tables. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> CC: Matthew Wilcox <willy@linux.intel.com> CC: John Keller <jpk@sgi.com> CC: Yinghai Lu <yhlu.kernel@gmail.com> CC: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> CC: Andi Kleen <andi@firstfloor.org> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI/PAT: return EINVAL for pci mmap WC request for !pat_enabledSuresh Siddha2009-11-04
| | | | | | | | | | | | | | | | | | | | | | | | | | Thomas Schlichter reported: > X.org uses libpciaccess which tries to mmap with write combining enabled via > /sys/bus/pci/devices/*/resource0_wc. Currently, when PAT is not enabled, the > kernel does fall back to uncached mmap. Then libpciaccess thinks it succeeded > mapping with write combining enabled and does not set up suited MTRR entries. > ;-( Instead of silently mapping pci mmap region as UC minus in the case of !pat_enabled and wc request, we can return error. Eric Anholt mentioned that caller (like X) typically follows up with UC minus pci mmap request and if there is a free mtrr slot, caller will manage adding WC mtrr. Jesse Barnes says: > Older versions of libpciaccess will behave better if we do it that way > (iirc it only allocates an MTRR if the resource_wc file doesn't exist or > fails to get mapped). Reported-by: Thomas Schlichter <thomas.schlichter@web.de> Signed-off-by: Thomas Schlichter <thomas.schlichter@web.de> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Acked-by: Eric Anholt <eric@anholt.net> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: print resources consistently with %pRtBjorn Helgaas2009-11-04
| | | | | | | | This uses %pRt to print additional resource information (type, size, prefetchability, etc.) consistently. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: Use generic cacheline sizing instead of per-vendor tests.Dave Jones2009-11-04
| | | | | | | | | | | | | | | | | Instead of the PCI code needing to have code to determine the cacheline size of each processor, use the data the cpu identification code should have already determined during early boot. (The vendor checks are also incomplete, and don't take into account modern CPUs) I've been carrying a variant of this code in Fedora for a while, that prints debug information. There are a number of cases where we are currently setting the PCI cacheline size to 32 bytes, when the CPU cacheline size is 64 bytes. With this patch, we set them both the same. Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: determine CLS more intelligentlyJesse Barnes2009-11-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Till now, CLS has been determined either by arch code or as L1_CACHE_BYTES. Only x86 and ia64 set CLS explicitly and x86 doesn't always get it right. On most configurations, the chance is that firmware configures the correct value during boot. This patch makes pci_init() determine CLS by looking at what firmware has configured. It scans all devices and if all non-zero values agree, the value is used. If none is configured or there is a disagreement, pci_dfl_cache_line_size is used. arch can set the dfl value (via PCI_CACHE_LINE_BYTES or pci_dfl_cache_line_size) or override the actual one. ia64, x86 and sparc64 updated to set the default cls instead of the actual one. While at it, declare pci_cache_line_size and pci_dfl_cache_line_size in pci.h and drop private declarations from arch code. Signed-off-by: Tejun Heo <tj@kernel.org> Acked-by: David Miller <davem@davemloft.net> Acked-by: Greg KH <gregkh@suse.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: read root resources from IOH on IntelYinghai Lu2009-11-04
| | | | | | | | For intel systems with multi IOH, we should read peer root resources directly from PCI config space, and don't trust _CRS. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* const: mark struct vm_struct_operationsAlexey Dobriyan2009-09-27
| | | | | | | | | | | * mark struct vm_area_struct::vm_ops as const * mark vm_ops in AGP code But leave TTM code alone, something is fishy there with global vm_ops being used. Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'linux-next' of ↵Linus Torvalds2009-09-24
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (21 commits) x86/PCI: make 32 bit NUMA node array int, not unsigned char x86/PCI: default pcibus cpumask to all cpus if it lacks affinity MAINTAINTERS: remove hotplug driver entries PCI: pciehp: remove slot capabilities definitions PCI: pciehp: remove error message definitions PCI: pciehp: remove number field PCI: pciehp: remove hpc_ops PCI: pciehp: remove pci_dev field PCI: pciehp: remove crit_sect mutex PCI: pciehp: remove slot_bus field PCI: pciehp: remove first_slot field PCI: pciehp: remove slot_device_offset field PCI: pciehp: remove hp_slot field PCI: pciehp: remove device field PCI: pciehp: remove bus field PCI: pciehp: remove slot_num_inc field PCI: pciehp: remove num_slots field PCI: pciehp: remove slot_list field PCI: fix VGA arbiter header file PCI: Disable AER with pci=nomsi ... Fixed up trivial conflicts in MAINTAINERS
| * x86/PCI: make 32 bit NUMA node array int, not unsigned charJesse Barnes2009-09-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use -1 to indicate no node affinity, so we need a signed type here or all sorts of bad things happen, like crashes in dev_attr_show as reported by Ingo: [ 158.058140] warning: `dbus-daemon' uses 32-bit capabilities (legacy support in use) [ 159.370562] BUG: unable to handle kernel NULL pointer dereference at (null) [ 159.372694] IP: [<ffffffff8143b722>] bitmap_scnprintf+0x72/0xd0 [ 159.372694] PGD 71d3e067 PUD 7052e067 PMD 0 [ 159.372694] Oops: 0000 [#1] SMP DEBUG_PAGEALLOC [ 159.372694] last sysfs file: /sys/devices/pci0000:00/0000:00:01.0/local_cpus [ 159.372694] CPU 0 [ 159.372694] Pid: 7364, comm: irqbalance Not tainted 2.6.31-tip #8043 System Product Name [ 159.372694] RIP: 0010:[<ffffffff8143b722>] [<ffffffff8143b722>] bitmap_scnprintf+0x72/0xd0 [ 159.372694] RSP: 0018:ffff8800712a1e38 EFLAGS: 00010246 [ 159.372694] RAX: 0000000000000000 RBX: 0000000000000000 RCX: 0000000000000000 [ 159.372694] RDX: 0000000000000000 RSI: 0000000000000004 RDI: ffff880077dc5000 [ 159.372694] RBP: ffff8800712a1e68 R08: 0000000000000001 R09: 0000000000000001 [ 159.372694] R10: ffffffff8215c47c R11: 0000000000000000 R12: 0000000000000000 [ 159.372694] R13: 0000000000000000 R14: 0000000000000ffe R15: ffff880077dc5000 [ 159.372694] FS: 00007f5f578f76f0(0000) GS:ffff880007000000(0000) knlGS:0000000000000000 [ 159.372694] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b [ 159.372694] CR2: 0000000000000000 CR3: 0000000071a77000 CR4: 00000000000006f0 [ 159.372694] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 159.372694] DR3: ffffffff835109dc DR6: 00000000ffff0ff0 DR7: 0000000000000400 [ 159.372694] Process irqbalance (pid: 7364, threadinfo ffff8800712a0000, task ffff880070773000) [ 159.372694] Stack: [ 159.372694] 2222222222222222 ffff880077dc5000 fffffffffffffffb ffff88007d366b40 [ 159.372694] <0> ffff8800712a1f48 ffff88007d3840a0 ffff8800712a1e88 ffffffff8146332b [ 159.372694] <0> fffffffffffffff4 ffffffff82450718 ffff8800712a1ea8 ffffffff815a9a1f [ 159.372694] Call Trace: [ 159.372694] [<ffffffff8146332b>] local_cpus_show+0x3b/0x60 [ 159.372694] [<ffffffff815a9a1f>] dev_attr_show+0x2f/0x60 [ 159.372694] [<ffffffff8118ee6f>] sysfs_read_file+0xbf/0x1d0 [ 159.372694] [<ffffffff8112afe9>] vfs_read+0xc9/0x180 [ 159.372694] [<ffffffff8112c365>] sys_read+0x55/0x90 [ 159.372694] [<ffffffff810114f2>] system_call_fastpath+0x16/0x1b [ 159.372694] Code: 41 b9 01 00 00 00 44 8d 46 03 49 63 fc 0f 49 d3 c1 f8 1f 4c 01 ff c1 e8 1a c1 fa 06 41 c1 e8 02 8d 0c 03 48 63 d2 83 e1 3f 29 c1 <49> 8b 44 d5 00 48 c7 c2 8c 37 16 82 48 d3 e8 89 f1 44 89 f6 49 [ 159.372694] RIP [<ffffffff8143b722>] bitmap_scnprintf+0x72/0xd0 [ 159.372694] RSP <ffff8800712a1e38> [ 159.372694] CR2: 0000000000000000 [ 159.600828] ---[ end trace 35550c356e84e60c ]--- Reported-by: Ingo Molnar <mingo@elte.hu> Tested-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | Merge branch 'linus' into sfi-releaseLen Brown2009-09-19
|\| | | | | | | | | | | | | | | | | Conflicts: arch/x86/kernel/setup.c drivers/acpi/power.c init/main.c Signed-off-by: Len Brown <len.brown@intel.com>
| * Merge branch 'linux-next' of ↵Linus Torvalds2009-09-16
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (75 commits) PCI hotplug: clean up acpi_run_hpp() PCI hotplug: acpiphp: use generic pci_configure_slot() PCI hotplug: shpchp: use generic pci_configure_slot() PCI hotplug: pciehp: use generic pci_configure_slot() PCI hotplug: add pci_configure_slot() PCI hotplug: clean up acpi_get_hp_params_from_firmware() interface PCI hotplug: acpiphp: don't cache hotplug_params in acpiphp_bridge PCI hotplug: acpiphp: remove superfluous _HPP/_HPX evaluation PCI: Clear saved_state after the state has been restored PCI PM: Return error codes from pci_pm_resume() PCI: use dev_printk in quirk messages PCI / PCIe portdrv: Fix pcie_portdrv_slot_reset() PCI Hotplug: convert acpi_pci_detect_ejectable() to take an acpi_handle PCI Hotplug: acpiphp: find bridges the easy way PCI: pcie portdrv: remove unused variable PCI / ACPI PM: Propagate wake-up enable for devices w/o ACPI support ACPI PM: Replace wakeup.prepared with reference counter PCI PM: Introduce device flag wakeup_prepared PCI / ACPI PM: Rework some debug messages PCI PM: Simplify PCI wake-up code ... Fixed up conflict in arch/powerpc/kernel/pci_64.c due to OF device tree scanning having been moved and merged for the 32- and 64-bit cases. The 'needs_freset' initialization added in 6e19314cc ("PCI/powerpc: support PCIe fundamental reset") is now in arch/powerpc/kernel/pci_of_scan.c.
| | * x86/PCI: initialize PCI bus node numbers earlyJesse Barnes2009-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current mp_bus_to_node array is initialized only by AMD specific code, since AMD platforms have registers that can be used for determining mode numbers. On new Intel platforms it's necessary to initialize this array as well though, otherwise all PCI node numbers will be 0, when in fact they should be -1 (indicating that I/O isn't tied to any particular node). So move the mp_bus_to_node code into the common PCI code, and initialize it early with a default value of -1. This may be overridden later by arch code (e.g. the AMD code). With this change, PCI consistent memory and other node specific allocations (e.g. skbuff allocs) should occur on the "current" node. If, for performance reasons, applications want to be bound to specific nodes, they should open their devices only after being pinned to the CPU where they'll run, for maximum locality. Acked-by: Yinghai Lu <yinghai@kernel.org> Tested-by: Jesse Brandeburg <jesse.brandeburg@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | dmi: extend dmi_get_year() to dmi_get_date()Tejun Heo2009-09-08
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are cases where full date information is required instead of just the year. Add month and day parsing to dmi_get_year() and rename it to dmi_get_date(). As the original function only required '/' followed by any number of parseable characters at the end of the string, keep that behavior to avoid upsetting existing users. The new function takes dates of format [mm[/dd]]/yy[yy]. Year, month and date are checked to be in the ranges of [1-9999], [1-12] and [1-31] respectively and any invalid or out-of-range component is returned as zero. The dummy implementation is updated accordingly but the return value is updated to indicate field not found which is consistent with how other dummy functions behave. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* | SFI: Hook PCI MMCONFIGFeng Tang2009-08-28
| | | | | | | | | | | | | | | | First check ACPI, and if that fails, ask SFI to find the MCFG. Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
* | ACPI, PCI: Change PREFIX to "PCI" from "ACPI" in mmconfig-shared.cLen Brown2009-08-28
| | | | | | | | | | Signed-off-by: Len Brown <len.brown@intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | ACPI: Move definition of PREFIX from acpi_bus.h to internal..hLen Brown2009-08-28
|/ | | | | | | | | | | | | Linux/ACPI core files using internal.h all PREFIX "ACPI: ", however, not all ACPI drivers use/want it -- and they should not have to #undef PREFIX to define their own. Add GPL commment to internal.h while we are there. This does not change any actual console output, asside from a whitespace fix. Signed-off-by: Len Brown <len.brown@intel.com>
* x86/pci: insert ioapic resource before assigning unassigned resourcesYinghai Lu2009-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Stephen reported that his DL585 G2 needed noapic after 2.6.22 (?) Dann bisected it down to: commit 30a18d6c3f1e774de656ebd8ff219d53e2ba4029 Date: Tue Feb 19 03:21:20 2008 -0800 x86: multi pci root bus with different io resource range, on 64-bit It turns out that: 1. that AMD-based systems have two HT chains. 2. BIOS doesn't allocate resources for BAR 6 of devices under 8132 etc 3. that multi-peer-root patch will try to split root resources to peer root resources according to PCI conf of NB 4. PCI core assigns unassigned resources, but they overlap with BARs that are used by ioapic addr of io4 and 8132. The reason: at that point ioapic address are not inserted yet. Solution is to insert ioapic resources into the tree a bit earlier. Reported-by: Stephen Frost <sfrost@snowman.net> Reported-and-Tested-by: dann frazier <dannf@hp.com> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Cc: stable@kernel.org Signed-off-by: Jesse Barnes <jbarnes@jbarnes-g45.(none)>
* x86/PCI: get root CRS before scanning childrenYinghai Lu2009-06-30
| | | | | | | | | | This allows us to remove adjust_transparent_bridge_resources and give x86_pci_root_bus_res_quirks a chance when _CRS is not used or not there. Acked-by: Gary Hade <garyhade@us.ibm.com> Tested-by: Gary Hade <garyhade@us.ibm.com> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-25 12:40:59 -0500