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* arch/tile: kernel-related cleanups from removing static page sizeChris Metcalf2011-05-04
| | | | | | | | | User space code has been able to discover the static page size by including a special <hv/pagesize.h> file. In the current release, that file is now gone, and <asm/page.h> doesn't rely on it. The getpagesize() API is now the only way for userspace to get the page size. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* Fix common misspellingsLucas De Marchi2011-03-31
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* drivers/edac: provide support for tile architectureChris Metcalf2011-03-10
| | | | | | | | Add tile support for the EDAC driver, which provides unified system error (memory, PCI, etc.) reporting. For now, the TILEPro port reports memory correctable error (CE) only. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: fix __ndelay etc to work betterChris Metcalf2011-03-01
| | | | | | | | | | | | | | | | The current implementations of __ndelay and __udelay call a hypervisor service to delay, but the hypervisor service isn't actually implemented very well, and the consensus is that Linux should handle figuring this out natively and not use a hypervisor service. By converting nanoseconds to cycles, and then spinning until the cycle counter reaches the desired cycle, we get several benefits: first, we are sensitive to the actual clock speed; second, we use less power by issuing a slow SPR read once every six cycles while we delay; and third, we properly handle the case of an interrupt by exiting at the target time rather than after some number of cycles. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* drivers/net/tile/: on-chip network drivers for the tile architectureChris Metcalf2010-11-24
| | | | | | | | | | | | | | This change adds the first network driver for the tile architecture, supporting the on-chip XGBE and GBE shims. The infrastructure is present for the TILE-Gx networking drivers (another three source files in the new directory) but for now the the actual tilegx sources are waiting on releasing hardware to initial customers. Note that arch/tile/include/hv/* are "upstream" headers from the Tilera hypervisor and will probably benefit less from LKML review. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: parameterize system PLs to support KVM portChris Metcalf2010-10-15
| | | | | | | | | While not a port to KVM (yet), this change modifies the kernel to be able to build either at PL1 or at PL2 with a suitable config switch. Pushing up this change avoids handling branch merge issues going forward with the KVM work. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: Various cleanups.Chris Metcalf2010-08-13
| | | | | | | | | | | | | | | This change rolls up random cleanups not representing any actual bugs. - Remove a stale CONFIG_ value from the default tile_defconfig - Remove unused tns_atomic_xxx() family of methods from <asm/atomic.h> - Optimize get_order() using Tile's "clz" instruction - Fix a bad hypervisor upcall name (not currently used in Linux anyway) - Use __copy_in_user_inatomic() name for consistency, and export it - Export some additional hypervisor driver I/O upcalls and some homecache calls - Remove the obfuscating MEMCPY_TEST_WH64 support code - Other stray comment cleanups, #if 0 removal, etc. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: catch up on various minor cleanups.Chris Metcalf2010-07-06
| | | | | | | | | | | | | None of these changes fix any actual bugs, but are just various cleanups that fell out along the way. In particular, some unused #defines and includes are removed, PREFETCH_STRIDE is added (the default is right for our shipping chips, but wrong for our next generation), our tile-specific prefetching code is removed so the (identical) generic prefetching code can be used instead, a comment is fixed to be proper GPL and not just a "paste GPL here" token, a "//" comment is converted to "/* */", etc. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* arch/tile: Enable more sophisticated IRQ model for 32-bit chips.Chris Metcalf2010-07-06
| | | | | | | | | | | | This model is based on the on-chip interrupt model used by the TILE-Gx next-generation hardware, and interacts much more cleanly with the Linux generic IRQ layer. The change includes modifications to the Tilera hypervisor, which are reflected in the hypervisor headers in arch/tile/include/arch/. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Thomas Gleixner <tglx@linutronix.de>
* arch/tile: core support for Tilera 32-bit chips.Chris Metcalf2010-06-04
This change is the core kernel support for TILEPro and TILE64 chips. No driver support (except the console driver) is included yet. This includes the relevant Linux headers in asm/; the low-level low-level "Tile architecture" headers in arch/, which are shared with the hypervisor, etc., and are build-system agnostic; and the relevant hypervisor headers in hv/. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Reviewed-by: Paul Mundt <lethal@linux-sh.org>