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* sh: Merge legacy and dynamic PMB modes.Paul Mundt2010-02-18
| | | | | | | | | | | | | | | | | | | | | | | | | This implements a bit of rework for the PMB code, which permits us to kill off the legacy PMB mode completely. Rather than trusting the boot loader to do the right thing, we do a quick verification of the PMB contents to determine whether to have the kernel setup the initial mappings or whether it needs to mangle them later on instead. If we're booting from legacy mappings, the kernel will now take control of them and make them match the kernel's initial mapping configuration. This is accomplished by breaking the initialization phase out in to multiple steps: synchronization, merging, and resizing. With the recent rework, the synchronization code establishes page links for compound mappings already, so we build on top of this for promoting mappings and reclaiming unused slots. At the same time, the changes introduced for the uncached helpers also permit us to dynamically resize the uncached mapping without any particular headaches. The smallest page size is more than sufficient for mapping all of kernel text, and as we're careful not to jump to any far off locations in the setup code the mapping can safely be resized regardless of whether we are executing from it or not. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use uncached I/O helpers in PMB setup.Paul Mundt2010-02-17
| | | | | | | | | | | | The PMB code is an example of something that spends an absurd amount of time running uncached when only a couple of operations really need to be. This switches over to the shiny new uncached helpers, permitting us to spend far more time running cached. Additionally, MMUCR twiddling is perfectly safe from cached space given that it's paired with a control register barrier, so fix that up, too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Provide uncached I/O helpers.Paul Mundt2010-02-17
| | | | | | | | | There are lots of registers that can only be updated from the uncached mapping, so we add some helpers for those cases in order to make it easier to ensure that we only make the jump when it's absolutely necessary. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: PMB locking overhaul.Paul Mundt2010-02-17
| | | | | | | | | This implements some locking for the PMB code. A high level rwlock is added for dealing with rw accesses on the entry map while a per-entry data structure spinlock is added to deal with the PMB entry changing out from underneath us. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up dynamically created write-through PMB mappings.Paul Mundt2010-02-17
| | | | | | | | | | Write-through PMB mappings still require the cache bit to be set, even if they're to be flagged with a different cache policy and bufferability bit. To reduce some of the confusion surrounding the flag encoding we centralize the cache mask based on the system cache policy while we're at it. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Build PMB entry links for existing contiguous multi-page mappings.Paul Mundt2010-02-17
| | | | | | | | | This plugs in entry sizing support for existing mappings and then builds on top of that for linking together entries that are mapping contiguous areas. This will ultimately permit us to coalesce mappings and promote head pages while reclaiming PMB slots for dynamic remapping. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: uncached mapping helpers.Paul Mundt2010-02-17
| | | | | | | | | This adds some helper routines for uncached mapping support. This simplifies some of the cases where we need to check the uncached mapping boundaries in addition to giving us a centralized location for building more complex manipulation on top of. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: PMB tidying.Paul Mundt2010-02-17
| | | | | | | Some overdue cleanup of the PMB code, killing off unused functionality and duplication sprinkled about the tree. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up more 64-bit pgprot truncation on SH-X2 TLB.Paul Mundt2010-02-16
| | | | | | | | | | | Both the store queue API and the PMB remapping take unsigned long for their pgprot flags, which cuts off the extended protection bits. In the case of the PMB this isn't really a problem since the cache attribute bits that we care about are all in the lower 32-bits, but we do it just to be safe. The store queue remapping on the other hand depends on the extended prot bits for enabling userspace access to the mappings. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Setup boot CPU VBR early to enable early page faults.Paul Mundt2010-02-16
| | | | | | | | | vmemmap and the vmsplit code amongst others need to be able to take page faults much earlier than trap_init() time, so move this in to the early CPU initialization. VBR setup for secondary CPUs is already handled through start_secondary(), so we only need to do this for the boot CPU. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off some superfluous legacy PMB special casing.Paul Mundt2010-02-16
| | | | | | | | | The __va()/__pa() offsets and the boot memory offsets are consistent for all PMB users, so there is no need to special case these for legacy PMB. Kill the special casing off and depend on CONFIG_PMB across the board. This also fixes up yet another addressing bug for sh64. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Merge the legacy PMB mapping and entry synchronization code.Paul Mundt2010-02-16
| | | | | | | | | This merges the code for iterating over the legacy PMB mappings and the code for synchronizing software state with the hardware mappings. There's really no reason to do the same iteration twice, and this also buys us the legacy entry logging facility for the dynamic PMB case. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Prevent fixed slot PMB remapping from clobbering boot entries.Paul Mundt2010-02-16
| | | | | | | | | | | The PMB initialization code walks the entries and synchronizes the software PMB state with the hardware mappings, preserving the slot index. Unfortunately pmb_alloc() only tested the bit position in the entry map and failed to set it, resulting in subsequent remaps being able to be dynamically assigned a slot that trampled an existing boot mapping with general badness ensuing. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix zImage boot using fixed PMB.Nobuhiro Iwamatsu2010-02-15
| | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: fix sh7724 SDHI support using INTC force_disableMagnus Damm2010-02-15
| | | | | | | | | | | Update the sh7724 INTC tables with force_enable support to mask out pending unsupported SDHI interrupt sources. Without this patch the kernel locks up due to a pending SDHI interrupt that the tmio_mmc driver cannot handle. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up legacy PMB mode offset calculation.Paul Mundt2010-02-15
| | | | | | | The change for fixing up sh64 inadvertently inverted the logic for legacy PMB, fix that back up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'sh/stable-updates'Paul Mundt2010-02-15
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| * sh64: fix tracing of signals.Paul Mundt2010-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This follows the parisc change to ensure that tracehook_signal_handler() is aware of when we are single-stepping in order to ptrace_notify() appropriately. While this was implemented for 32-bit SH, sh64 neglected to make use of TIF_SINGLESTEP when it was folded in with the 32-bit code, resulting in ptrace_notify() never being called. As sh64 uses all of the other abstractions already, this simply plugs in the thread flag in the appropriate enable/disable paths and fixes up the tracehook notification accordingly. With this in place, sh64 is brought in line with what 32-bit is already doing. Reported-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh64: fix up memory offset calculation.Paul Mundt2010-02-12
| | | | | | | | | | | | | | The linker script offsets were broken by the recent 29/32-bit integration, so this fixes it up for sh64. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Isolate uncached mapping support.Paul Mundt2010-02-12
| | | | | | | | | | | | | | | | | | This splits out the uncached mapping support under its own config option, presently only used by 29-bit mode and 32-bit + PMB. This will make it possible to optionally add an uncached mapping on sh64 as well as booting without an uncached mapping for 32-bit. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: update sdk7786 defconfig.Paul Mundt2010-02-10
| | | | | | | | | | | | This plugs in USB and PCI and other bits for SDK7786. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Fix up multi-resource mapping for SH7786 PCIe.Paul Mundt2010-02-10
| | | | | | | | | | | | | | | | | | | | | | | | This reworks some of the SH7786 PCIe initialization code to dynamically setup and size the various resource windows, as opposed to the original code that simply wired in a couple of them statically. At the same time, we tidy up the initialization code a bit, kill off some read-only register twiddling that was gleaned from the bus analyzer, and also propagate the physical slot/channel mapping. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: break out enable/reparent div4 clocks on sh7723Magnus Damm2010-02-09
| | | | | | | | | | | | | | | | | | Break out sh7723 div4 clocks for SIU and IRDA as reparent / enable clocks. Similar to the SIU clock patch for sh7722 by Guennadi. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: sh7724/Ecovec24/KFR2R09/MS7724SE SDHI vector mergeMagnus Damm2010-02-09
| | | | | | | | | | | | | | | | | | Merge the SDHI vectors in the sh7724 INTC table and update the SDHI platform data for Ecovec24, KFR2R09 and MS7724SE. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: sh7723/AP325 SDHI vector mergeMagnus Damm2010-02-09
| | | | | | | | | | | | | | | | Merge the SDHI vectors in the sh7723 INTC table and update the SDHI platform data for AP325. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: sh7722/Migo-R SDHI vector mergeMagnus Damm2010-02-09
| | | | | | | | | | | | | | | | Merge the SDHI vectors in the sh7722 INTC table and update the SDHI platform data for Migo-R. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Fix up SH7786 PCI resource definitions.Paul Mundt2010-02-08
| | | | | | | | | | | | | | This adds in some of the missing memory resources for channels 1/2 and gets the code building again for the recent changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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*-. \ Merge branches 'sh/dwarf-unwinder', 'sh/g3-prep' and 'sh/stable-updates'Paul Mundt2010-02-07
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| * | | sh: Optimise FDE/CIE lookup by using red-black treesMatt Fleming2010-02-07
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the DWARF unwinder is being used to provide perf callstacks unwinding speed is an issue. It is no longer being used in exceptional circumstances where we don't care about runtime performance, e.g. when panicing, so it makes sense improve performance is possible. With this patch I saw a 42% improvement in unwind time when calling return_address(1). Greater improvements will be seen as the number of levels unwound increases as each unwind is now cheaper. Note that insertion time has doubled but that's just the price we pay for keeping the trees balanced. However, this is a one-time cost for kernel boot/module load and so the improvements in lookup time dominate the extra time we spend keeping the trees balanced. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: Remove superfluous setup_frame_reg callMatt Fleming2010-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | There's no need to setup the frame pointer again in call_handle_tlbmiss. The frame pointer will already have been setup in handle_interrupt. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: Don't continue unwinding across interruptsMatt Fleming2010-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunately, due to poor DWARF info in current toolchains, unwinding through interrutps cannot be done reliably. The problem is that the DWARF info for function epilogues is wrong. Take this standard epilogue sequence, 80003cc4: e3 6f mov r14,r15 80003cc6: 26 4f lds.l @r15+,pr 80003cc8: f6 6e mov.l @r15+,r14 <---- interrupt here 80003cca: f6 6b mov.l @r15+,r11 80003ccc: f6 6a mov.l @r15+,r10 80003cce: f6 69 mov.l @r15+,r9 80003cd0: 0b 00 rts If we take an interrupt at the highlighted point, the DWARF info will bogusly claim that the return address can be found at some offset from the frame pointer, even though the frame pointer was just restored. The worst part is if the unwinder finds a text address at the bogus stack address - unwinding will continue, for a bit, until it finally comes across an unexpected address on the stack and blows up. The only solution is to stop unwinding once we've calculated the function that was executing when the interrupt occurred. This PC can be easily calculated from pt_regs->pc. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: Setup frame pointer in handle_exception pathMatt Fleming2010-02-07
| | | | | | | | | | | | | | | | | | | | | | | | In order to allow the DWARF unwinder to unwind through exceptions we need to setup the frame pointer register (r14). Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: Correct the offset of the return address in ret_from_exceptionMatt Fleming2010-02-07
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The address that ret_from_exception and ret_from_irq will return to is found in the stack slot for SPC, not PR. This error was causing the DWARF unwinder to pick up the wrong return address on the stack and then unwind using the unwind tables for the wrong function. While I'm here I might as well add CFI annotations for the other registers since they could be useful when unwinding. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | Merge branch 'sh/dmaengine'Paul Mundt2010-02-07
|\ \ | | | | | | | | | | | | Conflicts: arch/sh/drivers/dma/dma-sh.c
| * | sh: implement DMA_SLAVE capability in SH dmaengine driverGuennadi Liakhovetski2010-02-07
| | | | | | | | | | | | | | | | | | | | | | | | Tested to work with a SIU ASoC driver on sh7722 (migor). Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: fix Transfer Size calculation in both DMA driversGuennadi Liakhovetski2010-02-07
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers do not take into account bits 3:2 of the Transfer Size field in the CHCR register, besides, bit-field defines set bit 2, but the mask only passes bits 1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to be fixed too. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Fix up hp6xx build.Paul Mundt2010-02-05
| | | | | | | | | | | | | | | | With the sparseirq conversion there was a stray irq_desc reference left over, this tidies it up and brings the demuxer in line with what the solution engine boards are doing. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Fix an off-by-1 in SH7780 PCIC memory resource mapping.Paul Mundt2010-02-05
| | | | | | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Fix up early PCI PERR/SERR IRQ handling.Paul Mundt2010-02-03
| | | | | | | | | | | | | | | | | | This adds support for handling early PERR/SERR triggering in between controller registration and the initial bus scan. Buggy cards end up asserting these as soon as the M66EN scan is undertaken, resulting in an early crash. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Disable generic IRQ probing.Paul Mundt2010-02-02
| | | | | | | | | | | | | | | | | | | | | | | | | | IRQ autoprobing hasn't actually worked for us at all since very early in 2.6, but no one seems to have noticed given that none of the drivers that use it see much testing. yenta_socket is the odd one out, and that depends on PCI IRQs which are fixed on all SH platforms anyways. Consequently, turning off autoprobing fixes up crashes triggered by yenta_socket and at least gets it working again on r7785rp. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: enable sparseirq for highlander and r2d.Paul Mundt2010-02-02
| | | | | | | | | | | | | | | | | | highlander and r2d are the only remaining ones that were blocking sparseirq being turned on by default, but it turns out that they already work fine with it by virtue of register_intc_controller(). As such, we can kill off the dependencies and turn it on by default. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: mach-dreamcast: Convert to sparseirq.Paul Mundt2010-02-02
| | | | | | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: hd6446x: Convert to sparseirq.Paul Mundt2010-02-02
| | | | | | | | | | | | | | Follows the se7724 change and converts the hd64461 IRQ handling to sparseirq. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: mach-se: Convert SH7724 solution engine FPGA to sparseirq.Paul Mundt2010-02-02
| | | | | | | | | | | | | | This uses the new create_irq_nr() to build up the FPGA's desired virtual IRQ mapping and permits us to finally flip on sparseirq for this board. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: add high impedance mode management for SIUA pins on sh7722Guennadi Liakhovetski2010-02-01
| | | | | | | | | | | | | | | | | | This improves power management for the SIUA controller on sh7722. Similar patches might be desired for other SIU-enabled SH platforms. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | Merge branch 'sh/stable-updates'Paul Mundt2010-02-01
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| * sh: Fix access to released memory in clk_debugfs_register_one()Marek Skuczynski2010-02-01
| | | | | | | | | | Signed-off-by: Marek Skuczynski <mareksk7@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Fix access to released memory in dwarf_unwinder_cleanup()Marek Skuczynski2010-02-01
| | | | | | | | | | | | Signed-off-by: Marek Skuczynski <mareksk7@gmail.com> Acked-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * Split 'flush_old_exec' into two functionsLinus Torvalds2010-01-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'flush_old_exec()' is the point of no return when doing an execve(), and it is pretty badly misnamed. It doesn't just flush the old executable environment, it also starts up the new one. Which is very inconvenient for things like setting up the new personality, because we want the new personality to affect the starting of the new environment, but at the same time we do _not_ want the new personality to take effect if flushing the old one fails. As a result, the x86-64 '32-bit' personality is actually done using this insane "I'm going to change the ABI, but I haven't done it yet" bit (TIF_ABI_PENDING), with SET_PERSONALITY() not actually setting the personality, but just the "pending" bit, so that "flush_thread()" can do the actual personality magic. This patch in no way changes any of that insanity, but it does split the 'flush_old_exec()' function up into a preparatory part that can fail (still called flush_old_exec()), and a new part that will actually set up the new exec environment (setup_new_exec()). All callers are changed to trivially comply with the new world order. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Cc: stable@kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * sh64: wire up sys_accept4.Paul Mundt2010-01-19
| | | | | | | | | | | | | | | | | | | | | | sh64 on the other hand provides both direct broken out syscalls as well as socketcall access. As there are binaries that use both socketcall has to stay around. The current ABI prefers direct syscalls. It was pointed out that when sys_recvmmsg was added in, sys_accept4 was overlooked. This takes care of wiring it up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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