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* sh: Kill off dead SH7604 support.Paul Mundt2007-06-07
| | | | | | | | This was added during 2.5.x, but was never moved along. This can easily be resurrected if someone has one they wish to work with, but it's not worth keeping around in its current form. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: memory hot-add for sparsemem users support.Paul Mundt2007-06-07
| | | | | | | This enables simple hotplug support for sparsemem users. Presently this only permits memory being added in to node 0 on ZONE_NORMAL. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Make NUMA depend on sparsemem.Paul Mundt2007-06-07
| | | | | | | The only platforms that are supporting NUMA are doing so via sparsemem, so update the dependency. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: URAM node support for SH7722.Paul Mundt2007-06-07
| | | | | | | | This adds the URAM block on SH7722 as a separate node. Sparsemem is required for this, or it can simply be disabled by explicitly selecting a flatmem model. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Support for multiple nodes.Paul Mundt2007-06-07
| | | | | | | | | This adds basic support for multiple nodes on SH machines. This is primarily useful for boards with many different memory blocks that are otherwise unused (SH7722/SH7785 URAM and so forth). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use asm/sections.h for linker section symbols.Paul Mundt2007-06-07
| | | | | | Kill off a bunch of externs, and use sections.h instead.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up max_zone_pfns[] with multiple nodes.Paul Mundt2007-06-07
| | | | | | | | Currently using multiple nodes tramples the ZONE_NORMAL max low pfn, tidy up the logic a bit to get it all working as expected. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Enable IPR-IRQ for SH7206.Paul Mundt2007-06-07
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sparsemem support.Paul Mundt2007-06-07
| | | | | | | | This implements basic sparsemem support for SH. Presently this only uses static sparsemem, and we still permit explicit selection of flatmem. Those boards that want sparsemem can select it as usual. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix SH-4 CPU selects.Paul Mundt2007-06-07
| | | | | | | | | Now that select no longer works for selecting the "closest" CPU, we have to explicitly reference the precise sub-type in the few places where it actually matters (presently only setup code and some legacy sh-sci cruft). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Rework CPU/board dependencies.Paul Mundt2007-06-07
| | | | | | | | | This was a big mess, rework the logic a bit so that we constrain to a particular subtype and figure out the board support based on that. This makes building subtype specific kernels supporting multiple boards possible again. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: ioremap() through PMB needs asm/mmu.h.Paul Mundt2007-06-03
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix page size alignment in __copy_user_page().Paul Mundt2007-05-21
| | | | | | | | | | | SH-3 comes up with the PAGE_SIZE on a misaligned boundary: arch/sh/mm/copy_page.S: Assembler messages: arch/sh/mm/copy_page.S:132: Warning: misaligned data fix it up with explicit alignment. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up various compile warnings for SE boards.Paul Mundt2007-05-21
| | | | | | | | | | | | - setup-sh7750.c only defines the sh7751_ipr_map when building with SH7751 support. - 7722 Solution Engine was missing a mach-type entry, causing the macro in cf-enabler to be undefined. - arch/sh/mm/init.c needs linux/pagemap.h. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: revert addition of page fault notifiersChristoph Hellwig2007-05-21
| | | | | | | | | | | | Just at the time you added them on sh we're removing them from other architectures. As there's no user yet this patch just removes them completely. Once you actually have a kprobes patch it should follow the direct call to kprobes_fault_handler model that powerpc, s390 and sparc64 employ in 2.6.22-rc1 and that I'm updating other architectures to. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* spelling fixes: arch/sh/Simon Arlott2007-05-21
| | | | | | | Spelling fixes in arch/sh/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off pmb slab cache destructor.Paul Mundt2007-05-13
| | | | | | | | | | | | | | | This is the last remaining slab destructor in the kernel, which we kill off and move the resultant list tracking logic up to the pmb_alloc()/pmb_free() paths. As Christoph Lameter pointed out, it's potentially unsafe to be taking the list lock in the destructor anyways, so this is also more fundamentally correct. With this in place, we're all set for killing off slab destructors from the kernel entirely. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Shut up compiler warnings in __do_page_fault().Paul Mundt2007-05-13
| | | | | | | | | | | GCC doesn't seem to be able to figure this one out for itself, so just shut it up.. CC arch/sh/mm/fault.o arch/sh/mm/fault.c: In function '__do_page_fault': arch/sh/mm/fault.c:288: warning: 'ptl' may be used uninitialized in this function Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Truncate MAX_ACTIVE_REGIONS for the common case.Paul Mundt2007-05-09
| | | | | | | Most SH platforms aren't going to need more than a single active region, ones that need more can pad this out as necessary. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Convert to common die chain.Paul Mundt2007-05-08
| | | | | | | This went in immediately after SH added the die chain notifiers, so move over to that instead.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: generic quicklist support.Paul Mundt2007-05-08
| | | | | | | | This moves SH over to the generic quicklists. As per x86_64, we have special mappings for the PGDs, so these go on their own list.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* header cleaning: don't include smp_lock.h when not usedRandy Dunlap2007-05-08
| | | | | | | | | | | | Remove includes of <linux/smp_lock.h> where it is not used/needed. Suggested by Al Viro. Builds cleanly on x86_64, i386, alpha, ia64, powerpc, sparc, sparc64, and arm (all 59 defconfigs). Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* use SLAB_PANIC flag cleanupAkinobu Mita2007-05-08
| | | | | | | | | | | | | | Use SLAB_PANIC and delete duplicated panic(). Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Ian Molton <spyro@f2s.com> Cc: David Howells <dhowells@redhat.com> Cc: Andi Kleen <ak@suse.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sh: Add die chain notifiers.Paul Mundt2007-05-06
| | | | | | Add the atomic die chains in, kprobes needs these. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Solution Engine SH7705 board and CPU updates.Nobuhiro Iwamatsu2007-05-06
| | | | | | | | This fixes up SH7705 CPU support and the SE7705 board for some of the recent changes. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: bootmem tidying for discontig/sparsemem preparation.Paul Mundt2007-05-06
| | | | | | | | | This reworks some of the node 0 bootmem initialization in preparation for discontigmem and sparsemem support. ARCH_POPULATES_NODE_MAP is switched to as a result of this. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: MS7712SE01 board support.Nobuhiro Iwamatsu2007-05-06
| | | | | | | Support the SH7712 (SH3-DSP) Solution Engine reference board. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Revert lazy dcache writeback changes.Paul Mundt2007-03-05
| | | | | | | These ended up causing too many problems on older parts, revert for now.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Revert TLB miss fast-path changes that broke PTEA parts.Paul Mundt2007-02-14
| | | | | | | | This ended up causing problems for older parts (particularly ones using PTEA). Revert this for now, it can be added back in once it's had some more testing. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill dead/unused ISA code from __ioremap().Paul Mundt2007-02-12
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Switch to local TLB flush variants in additional callsites.Paul Mundt2007-02-12
| | | | | | | Convert some of the global flush users over to using the local variants that don't need to use the global routines. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Local TLB flushing variants for SMP prep.Paul Mundt2007-02-12
| | | | | | | Rename the existing flush routines to local_ variants for use by the IPI-backed global flush routines on SMP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fixup cpu_data references for the non-boot CPUs.Paul Mundt2007-02-12
| | | | | | | There are a lot of bogus cpu_data-> references that only end up working for the boot CPU, convert these to current_cpu_data to fixup SMP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use a per-cpu ASID cache.Paul Mundt2007-02-12
| | | | | | | | Previously this was implemented using a global cache, cache this per-CPU instead and bump up the number of context IDs to match NR_CPUS. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: add SH7760 IPR IRQ dataManuel Lauss2007-02-12
| | | | | | | Add SH7760 IPR IRQ data; makes 2.6.20-rc bootable again. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Don't set reserved _PAGE_WT bit on SH-3.Paul Mundt2007-02-12
| | | | | | | | Only SH-4 needs to set _PAGE_WT when using write-through caching, don't attempt to set it on SH-3 where it ends up being a reserved bit. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Lazy dcache writeback optimizations.Paul Mundt2007-02-12
| | | | | | | | | | | | | | | This converts the lazy dcache handling to the model described in Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a bonus, this slightly cuts down on the cache flushing frequency. With that and the PTEA handling out of the way, the update_mmu_cache() implementations can be consolidated, and we no longer have to worry about which configuration the cache is in for the SH7705 case. And finally, explicitly disable the lazy writeback on SMP (SH-4A). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: shmin updates.Takashi YOSHII2007-02-12
| | | | | | | | This fixes up shmin (and SH7706/SH7708) IPR support for some of the recent API changes. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* [PATCH] mark struct file_operations const 2Arjan van de Ven2007-02-12
| | | | | | | | | | | | Many struct file_operations in the kernel can be "const". Marking them const moves these to the .rodata section, which avoids false sharing with potential dirty data. In addition it'll catch accidental writes at compile time to these shared resources. [akpm@osdl.org: sparc64 fix] Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [PATCH] optional ZONE_DMA: remove ZONE_DMA remains from sh/sh64Christoph Lameter2007-02-11
| | | | | | | | | | | sh / sh64: Remove ZONE_DMA remains. Both arches do not need ZONE_DMA Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sh: SH-MobileR SH7722 CPU support.Paul Mundt2006-12-11
| | | | | | This adds CPU support for the SH7722. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Convert remaining remap_area_pages() users to ioremap_page_range().Paul Mundt2006-12-11
| | | | | | A couple of these were missed. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Trivial build fixes for SH-2 support.Yoshinori Sato2006-12-11
| | | | | Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* [PATCH] Generic ioremap_page_range: sh conversionHaavard Skinnemoen2006-12-08
| | | | | | | | | Convert SH to use generic ioremap_page_range() Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] slab: remove kmem_cache_tChristoph Lameter2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace all uses of kmem_cache_t with struct kmem_cache. The patch was generated using the following script: #!/bin/sh # # Replace one string by another in all the kernel sources. # set -e for file in `find * -name "*.c" -o -name "*.h"|xargs grep -l $1`; do quilt add $file sed -e "1,\$s/$1/$2/g" $file >/tmp/$$ mv /tmp/$$ $file quilt refresh done The script was run like this sh replace kmem_cache_t "struct kmem_cache" Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] shared page table for hugetlb pageChen, Kenneth W2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Following up with the work on shared page table done by Dave McCracken. This set of patch target shared page table for hugetlb memory only. The shared page table is particular useful in the situation of large number of independent processes sharing large shared memory segments. In the normal page case, the amount of memory saved from process' page table is quite significant. For hugetlb, the saving on page table memory is not the primary objective (as hugetlb itself already cuts down page table overhead significantly), instead, the purpose of using shared page table on hugetlb is to allow faster TLB refill and smaller cache pollution upon TLB miss. With PT sharing, pte entries are shared among hundreds of processes, the cache consumption used by all the page table is smaller and in return, application gets much higher cache hit ratio. One other effect is that cache hit ratio with hardware page walker hitting on pte in cache will be higher and this helps to reduce tlb miss latency. These two effects contribute to higher application performance. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Acked-by: Hugh Dickins <hugh@veritas.com> Cc: Dave McCracken <dmccr@us.ibm.com> Cc: William Lee Irwin III <wli@holomorphy.com> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Adam Litke <agl@us.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "David S. Miller" <davem@davemloft.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* sh: sh775x/titan fixes for irq header changes.Jamie Lenehan2006-12-05
| | | | | | | | | | | | | | | | | | | | | The following moves the creation of IPR interupts into setup-7750.c and updates a few other things to make it all work after the "Drop CPU subtype IRQ headers" commit. It boots and runs fine on my titan board. - adds an ipr_idx to the ipr_data and uses a function in the subtype code to calculate the address of the IPR registers - adds a function to enable individual interrupt mode for externals in the subtype code and calls that from the titan board code instead of doing it directly. - I changed the shift in the ipr_data to be the actual # of bits to shift, instead of the numnber / 4 - made it easier to match with the manual. Signed-off-by: Jamie Lenehan <lenehan@twibble.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: stacktrace/lockdep/irqflags tracing support.Paul Mundt2006-12-05
| | | | | | Wire up all of the essentials for lockdep.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Get the PGD right in oops case with 64-bit PTEs.Paul Mundt2006-12-05
| | | | | | | | | | | | Previously this was using a static pgd shift in the reporting code, simply flip this to PGDIR_SHIFT which does the right thing depending on varying PTE magnitudes on the SH-X2 MMU. While we're at it, and since it's been recently added, use get_TTB() for fetching the TTB, rather than the open coded instructions. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fixup various PAGE_SIZE == 4096 assumptions.Paul Mundt2006-12-05
| | | | | | | | | | | | | | | | | | | | | | There were a number of places that made evil PAGE_SIZE == 4k assumptions that ended up breaking when trying to play with 8k and 64k page sizes, this fixes those up. The most significant change is the way we load THREAD_SIZE, previously this was done via: mov #(THREAD_SIZE >> 8), reg shll8 reg to avoid a memory access and allow the immediate load. With a 64k PAGE_SIZE, we're out of range for the immediate load size without resorting to special instructions available in later ISAs (movi20s and so on). The "workaround" for this is to bump up the shift to 10 and insert a shll2, which gives a bit more flexibility while still being much cheaper than a memory access. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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