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* sh: Provide a sane valid_phys_addr_range() to prevent TLB reset with PMB.Paul Mundt2008-11-11
| | | | | | | | | | | | | | | With the PMB enabled, only P1SEG and up are covered by the PMB mappings, meaning that situations where out-of-bounds physical addresses are read from will lead to TLB reset after the PMB miss, allowing for use cases like dd if=/dev/mem to reset the TLB. Fix this up to make sure the reference is between __MEMORY_START (phys) and __pa(high_memory). This is coherent across all variants of sh/sh64 with and without MMU, though the PMB bug itself is only applicable to SH-4A parts. Reported-by: Hideo Saito <saito@densan.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* SH2(A) cache updateYoshinori Sato2008-08-04
| | | | | | | | | Includes: - SH2 (7619) Writeback support. - SH2A cache handling fix. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: clear/copy_page renames in lib and lib64.Paul Mundt2008-01-27
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Rename the _32 and _64 TLB flush variants.Paul Mundt2008-01-27
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Move in the SH-5 TLB miss.Paul Mundt2008-01-27
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Split out tlb-flush in to _32 and _64 variants.Paul Mundt2008-01-27
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Split out ioremap in to _32 and _64 variants.Paul Mundt2008-01-27
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Split out extable.c _32 and _64 variants.Paul Mundt2008-01-27
Signed-off-by: Paul Mundt <lethal@linux-sh.org>