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* [POWERPC] Silence an annoying boot messageStephen Rothwell2007-11-13
| | | | | | | | | | | | vmemmap_populate will printk (with KERN_WARNING) for a lot of pages if CONFIG_SPARSEMEM_VMEMMAP is enabled (at least it does on iSeries). Use pr_debug for it instead. Replace the only other use of DBG in this file with pr_debug as well. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fix early btext debug on PowerMacBenjamin Herrenschmidt2007-11-13
| | | | | | | | The early btext debug wouldn't work on PowerMac when booted from BootX due to the code looking for the wrong property name. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Demote clockevent printk to KERN_DEBUGTony Breeds2007-11-13
| | | | | | | These don't need to be seen by everyone on every boot. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fix CONFIG_SMP=n build error on ppc64Olof Johansson2007-11-13
| | | | | | | | | | | | | | | | | | | | The patch "KVM: fix !SMP build error" change the way smp_call_function() actually uses the passed in function names on non-SMP builds. So previously it was never caught that the function passed in was never actually defined. This causes a build error on ppc64_defconfig + CONFIG_SMP=n: arch/powerpc/mm/tlb_64.c: In function 'pgtable_free_now': arch/powerpc/mm/tlb_64.c:71: error: 'pte_free_smp_sync' undeclared (first use in this function) arch/powerpc/mm/tlb_64.c:71: error: (Each undeclared identifier is reported only once arch/powerpc/mm/tlb_64.c:71: error: for each function it appears in.) So we need to define it even if CONFIG_SMP is off. Either that or ifdef out the smp_call_function() call, but that's ugly. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Avoid unpaired stwcx. on some processorsBecky Bruce2007-11-13
| | | | | | | | | | | | | | | The context switch code in the kernel issues a dummy stwcx. to clear the reservation, as recommended by the architecture. However, some processors can have issues if this stwcx to address A occurs while the reservation is already held to a different address B. To avoid this problem, the dummy stwcx. needs to be paired with a dummy lwarx to the same address. This adds the dummy lwarx, and creates a cpu feature bit to indicate which cpus are affected. Tested on mpc8641_hpcn_defconfig in arch/powerpc; build tested in arch/ppc. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge branch 'for-2.6.24' of ↵Paul Mackerras2007-11-12
|\ | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into merge
| * [POWERPC] cpm: Fix a couple minor issues in cpm_common.c.Scott Wood2007-11-09
| | | | | | | | | | | | | | | | A debugging printk is removed, and a comment is fixed to match the code. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * [POWERPC] Add -mno-spe for ARCH=powerpc buildsKumar Gala2007-11-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer GCC's are capable of autovectorization for ISA extensions like AltiVec and SPE. If we happen to build with one of those compilers we will get SPE instructions in random kernel code. Today we only allow basic interger code in the kernel and FP, AltiVec, or SPE in special explicit locations that have handled the proper saving and restoring of the register state (since on uniprocessor we lazy context switch the register state for FP, AltiVec, and SPE). -mno-spe disables the compiler for automatically generating SPE instructions without our knowledge. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/mingo/linux-2.6-schedLinus Torvalds2007-11-09
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/mingo/linux-2.6-sched: sched: proper prototype for kernel/sched.c:migration_init() sched: avoid large irq-latencies in smp-balancing sched: fix copy_namespace() <-> sched_fork() dependency in do_fork sched: clean up the wakeup preempt check, #2 sched: clean up the wakeup preempt check sched: wakeup preemption fix sched: remove PREEMPT_RESTRICT sched: turn off PREEMPT_RESTRICT KVM: fix !SMP build error x86: make nmi_cpu_busy() always defined x86: make ipi_handler() always defined sched: cleanup, use NSEC_PER_MSEC and NSEC_PER_SEC sched: reintroduce SMP tunings again sched: restore deterministic CPU accounting on powerpc sched: fix delay accounting regression sched: reintroduce the sched_min_granularity tunable sched: documentation: place_entity() comments sched: fix vslice
| * sched: restore deterministic CPU accounting on powerpcPaul Mackerras2007-11-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since powerpc started using CONFIG_GENERIC_CLOCKEVENTS, the deterministic CPU accounting (CONFIG_VIRT_CPU_ACCOUNTING) has been broken on powerpc, because we end up counting user time twice: once in timer_interrupt() and once in update_process_times(). This fixes the problem by pulling the code in update_process_times that updates utime and stime into a separate function called account_process_tick. If CONFIG_VIRT_CPU_ACCOUNTING is not defined, there is a version of account_process_tick in kernel/timer.c that simply accounts a whole tick to either utime or stime as before. If CONFIG_VIRT_CPU_ACCOUNTING is defined, then arch code gets to implement account_process_tick. This also lets us simplify the s390 code a bit; it means that the s390 timer interrupt can now call update_process_times even when CONFIG_VIRT_CPU_ACCOUNTING is turned on, and can just implement a suitable account_process_tick(). account_process_tick() now takes the task_struct * as an argument. Tested both with and without CONFIG_VIRT_CPU_ACCOUNTING. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | Merge branch 'for-2.6.24' of ↵Paul Mackerras2007-11-07
|\ \ | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx into merge
| * | [POWERPC] 4xx: Fix Walnut DTS interrupt propertySteven A. Falco2007-11-01
| | | | | | | | | | | | | | | | | | | | | | | | Re-order the EMAC interrupts in the walnut.dts file so that they are mapped correctly. Signed-off-by: Steve Falco <sfalco at harris.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | [POWERPC] ppc405 Fix arithmatic rollover bug when memory size under 16MGrant Likely2007-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mmu_mapin_ram() loops over total_lowmem to setup page tables. However, if total_lowmem is less that 16M, the subtraction rolls over and results in a number just under 4G (because total_lowmem is an unsigned value). This patch rejigs the loop from countup to countdown to eliminate the bug. Special thanks to Magnus Hjorth who wrote the original patch to fix this bug. This patch improves on his by making the loop code simpler (which also eliminates the possibility of another rollover at the high end) and also applies the change to arch/powerpc. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | [POWERPC] 4xx: Deal with 44x virtually tagged icacheBenjamin Herrenschmidt2007-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 44x family has an interesting "feature" which is a virtually tagged instruction cache (yuck !). So far, we haven't dealt with it properly, which means we've been mostly lucky or people didn't report the problems, unless people have been running custom patches in their distro... This is an attempt at fixing it properly. I chose to do it by setting a global flag whenever we change a PTE that was previously marked executable, and flush the entire instruction cache upon return to user space when that happens. This is a bit heavy handed, but it's hard to do more fine grained flushes as the icbi instruction, on those processor, for some very strange reasons (since the cache is virtually mapped) still requires a valid TLB entry for reading in the target address space, which isn't something I want to deal with. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | [POWERPC] 4xx: Fix 4xx flush_tlb_page()Benjamin Herrenschmidt2007-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On 4xx CPUs, the current implementation of flush_tlb_page() uses a low level _tlbie() assembly function that only works for the current PID. Thus, invalidations caused by, for example, a COW fault triggered by get_user_pages() from a different context will not work properly, causing among other things, gdb breakpoints to fail. This patch adds a "pid" argument to _tlbie() on 4xx processors, and uses it to flush entries in the right context. FSL BookE also gets the argument but it seems they don't need it (their tlbivax form ignores the PID when invalidating according to the document I have). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | [POWERPC] 4xx: Workaround for the 440EP(x)/GR(x) processors identical PVR issue.Valentine Barshak2007-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PowerPC 440EP(x) 440GR(x) processors have the same PVR values, since they have identical cores. However, FPU is not supported on GR(x) and enabling APU instruction broadcast in the CCR0 register (to enable FPU) may cause unpredictable results. There's no safe way to detect FPU support at runtime. This patch provides a workarund for the issue. We use a POWER6 "logical PVR approach". First, we identify all EP(x) and GR(x) processors as GR(x) ones (which is safe). Then we check the device tree cpu path. If we have a EP(x) processor entry, we call identify_cpu again with PVR | 0x8. This bit is always 0 in the real PVR. This way we enable FPU only for 440EP(x). Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | [POWERPC] bootwrapper: Bail from script if any command failsGrant Likely2007-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the 'set -e' command to the wrapper script so that if any command fails then the script will automatically exit Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | [POWERPC] bootwrapper: Allow wrapper script to execute verboselyGrant Likely2007-11-01
| |/ | | | | | | | | | | | | | | | | Allow wrapper script to print verbose progress when the V is set in the environment. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] EEH: Make sure warning message is printedLinas Vepstas2007-11-07
| | | | | | | | | | | | | | | | Fix old buglet; a warning message should have been printed when a hardware reset takes too long. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Make altivec code in swsusp_32.S depend on CONFIG_ALTIVECJohannes Berg2007-11-07
| | | | | | | | | | | | | | | | | | | | This makes the altivec code in swsusp_32.S depend on CONFIG_ALTIVEC to avoid build failures for systems that don't have altivec. I'm not sure whether the code will actually work for other systems, but it was merged for just ppc32 rather than powermac a very long time ago. Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Fix si_addr value on low level hash failuresBenjamin Herrenschmidt2007-11-07
| | | | | | | | | | | | | | | | | | | | | | | | If the low level MMU hash table insertion returns an error (which can happen in some rare circumstances when the hypervisor refuses the insertion of a PTE, typically if you try to access junk via /dev/mem), the generated signal had an incorrect si_addr value due to a bug in the assembly, which was loading it as a 32 bits quantity instead of a 64 bits quantity. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Refresh ppc64_defconfig and enable pasemi-related optionsOlof Johansson2007-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refresh ppc64_defconfig, add PPC_PASEMI and various options that the common boards there need: * Chip drivers (iommu, ethernet, IDE, CF, EDAC, MDIO/PHY) * PCMCIA * PATA_PCMCIA * RTC_CLASS * SATA_MV * SATA_SIL24 * IP_PNP + NFS_ROOT for diskless booting + possibly some other things I might have missed to list Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] pasemi: Update defconfigOlof Johansson2007-11-07
| | | | | | | | | | | | | | | | Update pasemi_defconfig. Add a few missing options for default devices on electra boards, enable tickless and hrtimers, etc, etc. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] iSeries: Fix ref counting in vio setupStephen Rothwell2007-11-07
| | | | | | | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] ] Fix memset size errorLi Zefan2007-11-07
| | | | | | | | | | | | | | | | | | The size passing to memset is wrong. Signed-off-by Li Zefan <lizf@cn.fujitsu.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Fix link errors for allyesconfigStephen Rothwell2007-11-07
| | | | | | | | | | | | | | | | | | | | | | | | An allyesconfig build creates a .text section that is so big that the .text.init.refok and .fixup sections are too far away for the relocations to be fixed up correctly. This patch fixes that by linking all the relevent text sections for each file together. Suggested by Paul Mackerras. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] iSeries_init_IRQ non-PCI tidyStephen Rothwell2007-11-07
| | | | | | | | | | | | | | | | ppc_md.init_IRQ is not called if it is NULL, so we don't need an empty routine in the non PCI case. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] EEH: Avoid crash on null deviceLinas Vepstas2007-11-07
| | | | | | | | | | | | | | | | Bugfix: avoid crash if there's no PCI device for a given openfirmware node. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] EEH: Drivers that need reset trump othersLinas Vepstas2007-11-07
| | | | | | | | | | | | | | | | Bugfix: if a driver controlling one part of a multi-function PCI card has asked for a reset, honor that request above all others. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] EEH: Clean up commentsLinas Vepstas2007-11-07
| | | | | | | | | | | | | | | | Clean up commentary, remove dead code. Signed-off-by Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Fix off-by-one error in setting decrementer on Book E/4xx (v2)Paul Mackerras2007-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The decrementer in Book E and 4xx processors interrupts on the transition from 1 to 0, rather than on the 0 to -1 transition as on 64-bit server and 32-bit "classic" (6xx/7xx/7xxx) processors. At the moment we subtract 1 from the count of how many decrementer ticks are required before the next interrupt before putting it into the decrementer, which is correct for server/classic processors, but could possibly cause the interrupt to happen too early on Book E and 4xx if the timebase/decrementer frequency is low. This fixes the problem by making set_dec subtract 1 from the count for server and classic processors, instead of having the callers subtract 1. Since set_dec already had a bunch of ifdefs to handle different processor types, there is no net increase in ugliness. :) Note that calling set_dec(0) may not generate an interrupt on some processors. To make sure that decrementer_set_next_event always calls set_dec with an interval of at least 1 tick, we set min_delta_ns of the decrementer_clockevent to correspond to 2 ticks (2 rather than 1 to compensate for truncations in the conversions between ticks and ns). This also removes a redundant call to set the decrementer to 0x7fffffff - it was already set to that earlier in timer_interrupt. Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Fix switch_slb handling of 1T ESID valueswill schmidt2007-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have 1TB segment size support, we need to be using the GET_ESID_1T macro when comparing ESID values for pc, stack, and unmapped_base within switch_slb(). A new helper function called esids_match() contains the logic for deciding when to call GET_ESID and GET_ESID_1T. This fixes a duplicate-slb-entry inspired machine-check exception I was seeing when trying to run java on a power6 partition. Tested on power6 and power5. Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Fix build failure when CONFIG_VIRT_CPU_ACCOUNTING is not definedTony Breeds2007-11-07
| | | | | | | | | | | | | | | | | | | | Without this patch I get the following build failure CC arch/powerpc/platforms/celleb/setup.o arch/powerpc/platforms/celleb/setup.c:151: error: 'generic_calibrate_decr' undeclared here (not in a function) Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Include udbg.h when using udbg_printfwill schmidt2007-11-07
| | | | | | | | | | | | | | | | | | | | | | | | This fixes the error error: implicit declaration of function "udbg_printf" We have a few spots where we reference udbg_printf() without #including udbg.h. These are within #ifdef DEBUG blocks, so unnoticed until we do a #define DEBUG or #define DEBUG_LOW nearby. Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Fix cache line vs. block size confusionBenjamin Herrenschmidt2007-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We had an historical confusion in the kernel between cache line and cache block size. The former is an implementation detail of the L1 cache which can be useful for performance optimisations, the later is the actual size on which the cache control instructions operate, which can be different. For some reason, we had a weird hack reading the right property on powermac and the wrong one on any other 64 bits (32 bits is unaffected as it only uses the cputable for cache block size infos at this stage). This fixes the booting-without-of.txt documentation to mention the right properties, and fixes the 64 bits initialization code to look for the block size first, with a fallback to the line size if the property is missing. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Fix sysctl table check failure on PowerMacAlexey Dobriyan2007-11-07
| | | | | | | | | | | | | | kernel was marked with 0755. Everywhere else it's 0555. Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Fix CONFIG_SMP=n build breakOlof Johansson2007-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix two build errors on powerpc allyesconfig + CONFIG_SMP=n: arch/powerpc/platforms/built-in.o: In function `cpu_affinity_set': arch/powerpc/platforms/cell/spu_priv1_mmio.c:78: undefined reference to `.iic_get_target_id' arch/powerpc/platforms/built-in.o: In function `iic_init_IRQ': arch/powerpc/platforms/cell/interrupt.c:397: undefined reference to `.iic_setup_cpu' Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] bootwrapper: Revert ps3 binary flag usage, and remove .bin suffixScott Wood2007-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ps3 target produces two images, and the binary one is not the "primary" image that corresponds to the -o flag; thus, it no longer uses the generic binary flag. On platforms which do use the binary flag, it no longer produces a .bin suffix, so that the output file matches what was passed to the -o flag. This should fix the zImage ln problems for the ps3 target. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Fix mv643xx_pci sysfs .read and .write functionsDale Farnsworth2007-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit 91a69029 introduced an additional parameter to the .read and .write methods for sysfs binary attributes. Two mv64x60_pci functions were missed in that patch, resulting in these errors: /cache/git/linux-2.6/arch/powerpc/sysdev/mv64x60_pci.c:77: warning: initialization from incompatible pointer type /cache/git/linux-2.6/arch/powerpc/sysdev/mv64x60_pci.c:78: warning: initialization from incompatible pointer type Add the missing "struct bin_attribute *" parameter. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] i8259: Add disable methodAurelien Jarno2007-11-07
| | | | | | | | | | | | | | | | | | | | | | | | Since commit 76d2160147f43f982dfe881404cfde9fd0a9da21, the NE2000 card is not working anymore on PPC and POWERPC and produces WATCHDOG timeouts. The patch below fixes that the same way it has been done on x86, x86_64 and MIPS. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Read back MSI message in rtas_setup_msi_irqs() so restore worksMichael Ellerman2007-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are plans afoot to use pci_restore_msi_state() to restore MSI state after a device reset. In order for this to work for the RTAS MSI backend, we need to read back the MSI message from config space after it has been setup by firmware. This should be sufficient for restoring the MSI state after a device reset, however we will need to revisit this for suspend to disk if that is ever implemented on pseries. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Acked-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] powerpc: Fix demotion of segments to 4K pagesBenjamin Herrenschmidt2007-10-28
|/ | | | | | | | | | | | | | | | | | When demoting a process to use 4K HW pages (instead of 64K), which happens under various circumstances such as doing cache inhibited mappings on machines that do not support 64K CI pages, the assembly hash code calls back into the C function flush_hash_page(). This function prototype was recently changed to accomodate for 1T segments but the assembly call site was not updated, causing applications that do demotion to hang. In addition, when updating the per-CPU PACA for the new sizes, we didn't properly update the slice "map", thus causing the SLB miss code to re-insert segments for the wrong size. This fixes both and adds a warning comment next to the C implementation to try to avoid problems next time someone changes it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge branch 'for-2.6.24' of ↵Paul Mackerras2007-10-23
|\ | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx into merge
| * [POWERPC] 4xx: Enable EMAC on Bamboo boardJosh Boyer2007-10-19
| | | | | | | | | | | | | | | | Fix some device tree omissions that prevented the new EMAC driver from setting up ethernet on the Bamboo board correctly and update the Bamboo defconfig. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * [POWERPC] 4xx: Enable EMAC for PPC405 Walnut boardJosh Boyer2007-10-19
| | | | | | | | | | | | | | | | | | This patch enables the ibm_newemac driver for the Walnut board. It fixes the device tree for the walnut board to order the MAL interrupts correctly and adds the local-mac-address property to the EMAC node. The bootwrapper is also updated to extract the MAC address from the OpenBIOS offset where it is stored. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * [POWERPC] 4xx: Fix timebase clock selection on WalnutJosh Boyer2007-10-19
| | | | | | | | | | | | | | | | The current bootwrapper fails to set the timebase clock to the CPU clock which causes the time to increment incorrectly. This fixes it by using the correct #define for the CPC0_CR1 register. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * [POWERPC] 4xx: Enable EMAC on the PPC 440GP Ebony boardJosh Boyer2007-10-19
| | | | | | | | | | | | Update the Ebony defconfig to enable the ibm_newemac driver. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * [POWERPC] 4xx: Split early debug output and early boot console for 44xValentine Barshak2007-10-19
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently there's no way to enable early boot console on PowerPC 44x not specifying uart's physical address in kernel config, which is used for very early debug messages. This patch splits very early debug output (which needs uart physical address in kernel config) and early boot console (which searches for uarts in the device tree using find_legacy_serial_ports). We enable early boot console for all 44x processors, while (dangerous) early debug is user-selectable. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * [POWERPC] 4xx: Enable NEW EMAC support for Sequoia 440EPx.Valentine Barshak2007-10-19
| | | | | | | | | | | | | | This patch enables NEW EMAC support for PowerPC 440EPx Sequoia board. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * [POWERPC] 4xx: Add RGMII support for Sequoia 440EPxValentine Barshak2007-10-19
| | | | | | | | | | | | | | | | | | This adds RGMII support to Sequoia DTS and sets correct phy-mode for EMACs. According to Sequoia datasheet, both ethernet ports are connected to RGMII interface, while ZMII is used only for MDIO. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 14:59:29 -0500