aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc
Commit message (Collapse)AuthorAge
* [POWERPC] User rheap from arch/powerpc/libKumar Gala2007-05-10
| | | | | | | Removed rheap in arch/ppc/lib and changed build system to use the one in arch/powerpc/lib. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 83xx: Fix the PCI ranges in the MPC834x_MDS device tree.Scott Wood2007-05-10
| | | | | | | | | The MPC834x_MDS device tree's PCI non-prefetchable MMIO range was specified incorrectly. Both the local and bus addresses start at 0x90000000. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 83xx: Fix the PCI ranges in the MPC832x_MDS device tree.Scott Wood2007-05-10
| | | | | | | | | The MPC832x_MDS device tree's PCI non-prefetchable MMIO range was specified incorrectly. Both the local and bus addresses start at 0x90000000. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Change rheap functions to use ulongs instead of pointersTimur Tabi2007-05-10
| | | | | | | | | | | | | | | | | | | | The rheap allocation functions return a pointer, but the actual value is based on how the heap was initialized, and so it can be anything, e.g. an offset into a buffer. A ulong is a better representation of the value returned by the allocation functions. This patch changes all of the relevant rheap functions to use a unsigned long integers instead of a pointer. In case of an error, the value returned is a negative error code that has been cast to an unsigned long. The caller can use the IS_ERR_VALUE() macro to check for this. All code which calls the rheap functions is updated accordingly. Macros IS_MURAM_ERR() and IS_DPERR(), have been deleted in favor of IS_ERR_VALUE(). Also added error checking to rh_attach_region(). Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 86xx: Enable the AC97 interface on 8641D board.Jason Jin2007-05-10
| | | | | | | | | | HD interface and AC97 interface share some pins and they are enabled at the same time, In order to use AC97 interface, we need to disable the HD interface first. Signed-off-by:Jason Jin<jason.jin@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 83xx: Suppress warning when CONFIG_ options aren't definedKumar Gala2007-05-09
| | | | | | Suppress warning when CONFIG_PCI & CONFIG_QUICC_ENGINE is not defined Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 83xx: Suppress warning when CONFIG_PCI is not definedLi Yang2007-05-09
| | | | | | | Suppress warning when CONFIG_PCI is not defined. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Further fixes for the removal of 4level-fixup hack from ppc32David Gibson2007-05-09
| | | | | | | | | | | Commit d1953c8888ef034b912ee33bc2ea2cce6a414402 removed the use of 4level-fixup.h for 32-bit systems under arch/powerpc. However, I missed a few things activated on some configurations, resulting in some warnings (at least with STRICT_MM_TYPECHECKS enabled) and build errors in some circumstances. This fixes it. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] EEH: log all PCI-X and PCI-E AER registersLinas Vepstas2007-05-09
| | | | | | | | | | | | When an EEH event is detected, and after the device driver has been notified, but before the device is reset, enable MMIO to the adapter, and grab the contents of the PCI status and command registers, the PCI-X status and command, and the PCI-E capability 10 and AER registers. Pass these up to the RTAS error log, and also printk them. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] EEH: capture and log pci state on errorLinas Vepstas2007-05-09
| | | | | | | | | | If an EEH event is observed, capture PCI config space info about the device, wrap it up and pass it to the event logger. This pach just slots in the basic logging function. A later patch will provide for more through data gathering. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] EEH: Split up long error msgLinas Vepstas2007-05-09
| | | | | | | Make some minor adjustments to the EEH error messages. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] EEH: log error only after driver notification.Linas Vepstas2007-05-09
| | | | | | | | | | | It turns out many/most versions of firmware enable MMIO when the slto-error-detail rtas call is made (in violation of the architecture). Thus, it would be best to call slot-error-detail only after notifying device drivers of a freeze, as otherwise, a variety of strange and unexpected things may happen. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] fsl_soc: Make mac_addr const in fs_enet_of_init().Scott Wood2007-05-09
| | | | | | | | of_get_mac_address() returns a const pointer, so the result should be stored in a const pointer. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Don't use SLAB/SLUB for PTE pagesHugh Dickins2007-05-09
| | | | | | | | | | | | | The SLUB allocator relies on struct page fields first_page and slab, overwritten by ptl when SPLIT_PTLOCK: so the SLUB allocator cannot then be used for the lowest level of pagetable pages. This was obstructing SLUB on PowerPC, which uses kmem_caches for its pagetables. So convert its pte level to use normal gfp pages (whereas pmd, pud and 64k-page pgd want partpages, so continue to use kmem_caches for pmd, pud and pgd). Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Spufs support for 64K LS mappings on 4K kernelsBenjamin Herrenschmidt2007-05-09
| | | | | | | | | | | | This adds an option to spufs when the kernel is configured for 4K page to give it the ability to use 64K pages for SPE local store mappings. Currently, we are optimistic and try order 4 allocations when creating contexts. If that fails, the code will fallback to 4K automatically. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add ability to 4K kernel to hash in 64K pagesBenjamin Herrenschmidt2007-05-09
| | | | | | | | | This adds the ability for a kernel compiled with 4K page size to have special slices containing 64K pages and hash the right type of hash PTEs. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Introduce address space "slices"Benjamin Herrenschmidt2007-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The basic issue is to be able to do what hugetlbfs does but with different page sizes for some other special filesystems; more specifically, my need is: - Huge pages - SPE local store mappings using 64K pages on a 4K base page size kernel on Cell - Some special 4K segments in 64K-page kernels for mapping a dodgy type of powerpc-specific infiniband hardware that requires 4K MMU mappings for various reasons I won't explain here. The main issues are: - To maintain/keep track of the page size per "segment" (as we can only have one page size per segment on powerpc, which are 256MB divisions of the address space). - To make sure special mappings stay within their allotted "segments" (including MAP_FIXED crap) - To make sure everybody else doesn't mmap/brk/grow_stack into a "segment" that is used for a special mapping Some of the necessary mechanisms to handle that were present in the hugetlbfs code, but mostly in ways not suitable for anything else. The patch relies on some changes to the generic get_unmapped_area() that just got merged. It still hijacks hugetlb callbacks here or there as the generic code hasn't been entirely cleaned up yet but that shouldn't be a problem. So what is a slice ? Well, I re-used the mechanism used formerly by our hugetlbfs implementation which divides the address space in "meta-segments" which I called "slices". The division is done using 256MB slices below 4G, and 1T slices above. Thus the address space is divided currently into 16 "low" slices and 16 "high" slices. (Special case: high slice 0 is the area between 4G and 1T). Doing so simplifies significantly the tracking of segments and avoids having to keep track of all the 256MB segments in the address space. While I used the "concepts" of hugetlbfs, I mostly re-implemented everything in a more generic way and "ported" hugetlbfs to it. Slices can have an associated page size, which is encoded in the mmu context and used by the SLB miss handler to set the segment sizes. The hash code currently doesn't care, it has a specific check for hugepages, though I might add a mechanism to provide per-slice hash mapping functions in the future. The slice code provide a pair of "generic" get_unmapped_area() (bottomup and topdown) functions that should work with any slice size. There is some trickiness here so I would appreciate people to have a look at the implementation of these and let me know if I got something wrong. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Small fixes & cleanups in segment page size demotionBenjamin Herrenschmidt2007-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The code for demoting segments to 4K had some issues, like for example, when using _PAGE_4K_PFN flag, the first CPU to hit it would do the demotion, but other CPUs hitting the same page wouldn't properly flush their SLBs if mmu_ci_restriction isn't set. There are also potential issues with hash_preload not handling _PAGE_4K_PFN. All of these are non issues on current hardware but might bite us in the future. This patch thus fixes it by: - Taking the test comparing the mm and current CPU context page sizes to decide to flush SLBs out of the mmu_ci_restrictions test since that can also be triggered by _PAGE_4K_PFN pages - Due to the above being done all the time, demote_segment_4k doesn't need update the context and flush the SLB - demote_segment_4k can be static and doesn't need an EXPORT_SYMBOL - Making hash_preload ignore anything that has either _PAGE_4K_PFN or _PAGE_NO_CACHE set, thus avoiding duplication of the complicated logic in hash_page() (and possibly making hash_preload a little bit faster for the normal case). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: Make HVC_ISERIES the defaultStephen Rothwell2007-05-09
| | | | | | | | | This makes the new iSeries virtual console drivers (nvc_iseries) the default and prevents viocons being built unless explicitly selected. Also it makes no sense to have the console as a module. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: suppress build warning in lparmap.cStephen Rothwell2007-05-09
| | | | | | | | | | lparmap.c: Assembler messages: lparmap.c:51: Warning: ignoring changed section attributes for .text Idea from Segher Boessenkool. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Mark pages that don't exist as nosaveJohannes Berg2007-05-09
| | | | | | | | | | | On some powerpc architectures (notably 64-bit powermac) there is a memory hole, for example on powermacs between 2G and 4G. Since we use the flat memory model regardless, these pages must be marked as nosave (for suspend to disk.) Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge branch 'upstream-linus' of ↵Linus Torvalds2007-05-08
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6 * 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6: (40 commits) [netdrvr] atl1: fix build pasemi_mac: Use local-mac-address instead of mac-address if available pasemi_mac: PHY support pasemi_mac: Add msglevel support and "debug" module param pasemi_mac: Logic cleanup / rx performance improvements pasemi_mac: Minor cleanup / define fixes pasemi_mac: Add SKB reuse / copy-break pasemi_mac: Timer and interrupt fixes pasemi_mac: Abstract and fix up interrupt restart routines pasemi_mac: Move the IRQ mapping from the PCI layer to the driver tc35815: Remove unnecessary skb->dev assignment drivers/net/dm9000: Convert to generic boolean AT91RM9200 Ethernet: Fix multicast addressing AT91RM9200 Ethernet: Support additional PHYs PCMCIA-NETDEV : xirc2ps_cs: bugfix of multicast code sky2: re-enable 88E8056 for most motherboards MIPS: Drop unnecessary CONFIG_ISA from RBTX49XX ne: MIPS: Use platform_driver for ne on RBTX49XX ne: Add NEEDS_PORTLIST to control ISA auto-probe ne: Misc fixes for platform driver. ... Fix conflict in drivers/net/pasemi_mac.c (get_property() got renamed to of_get_property()) manually. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * pasemi_mac: Move the IRQ mapping from the PCI layer to the driverOlof Johansson2007-05-08
| | | | | | | | | | | | | | | | Fixes for ethernet IRQ mapping, to be done in the driver instead of in the platform setup code. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* | Merge branch 'master' of ↵Linus Torvalds2007-05-08
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc * 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (77 commits) [POWERPC] Abolish powerpc_flash_init() [POWERPC] Early serial debug support for PPC44x [POWERPC] Support for the Ebony 440GP reference board in arch/powerpc [POWERPC] Add device tree for Ebony [POWERPC] Add powerpc/platforms/44x, disable platforms/4xx for now [POWERPC] MPIC U3/U4 MSI backend [POWERPC] MPIC MSI allocator [POWERPC] Enable MSI mappings for MPIC [POWERPC] Tell Phyp we support MSI [POWERPC] RTAS MSI implementation [POWERPC] PowerPC MSI infrastructure [POWERPC] Rip out the existing powerpc msi stubs [POWERPC] Remove use of 4level-fixup.h for ppc32 [POWERPC] Add powerpc PCI-E reset API implementation [POWERPC] Holly bootwrapper [POWERPC] Holly DTS [POWERPC] Holly defconfig [POWERPC] Add support for 750CL Holly board [POWERPC] Generalize tsi108 PCI setup [POWERPC] Generalize tsi108 PHY types ... Fixed conflict in include/asm-powerpc/kdebug.h manually Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | [POWERPC] Abolish powerpc_flash_init()David Gibson2007-05-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | powerpc_flash_init() implements a broken way of probing for flash devices supported by the physmap_of driver. It finds all nodes in the device tree with device_type=="rom" and instantiates of_platform devices for them. This is fundamentally incompatible with the normal and correct way of probing for of_platform_bus_probe(). Platforms which relied on powerpc_flash_init()s behaviour (none are in-tree) will have to update their platform probing code to correctly probe busses containing flash devices. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Early serial debug support for PPC44xDavid Gibson2007-05-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for early serial debugging via the built in port on IBM/AMCC PowerPC 44x CPUs. It uses a bolted TLB entry in address space 1 for the UART's mapping, allowing robust debugging both before and after the initialization of the MMU. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Support for the Ebony 440GP reference board in arch/powerpcDavid Gibson2007-05-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds platform support code for the Ebony (440GP) evaluation board. This includes both code in arch/powerpc/platforms/44x for board initialization, and zImage wrapper code to correctly tweak the flattened device tree based on information from the firmware. The zImage supports both IBM OpenBIOS (aka "treeboot") and old versions of uboot which don't support a flattened device tree. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Add device tree for EbonyDavid Gibson2007-05-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a device tree for the Ebony evaluation board (440GP based). This tree is not complete or finalized. This tree needs a version of dtc recent enough to include reference-to-labels to process. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Add powerpc/platforms/44x, disable platforms/4xx for nowDavid Gibson2007-05-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This prepares for Ebony/440 support by creating an arch/powerpc/platforms/44x directory. It is populated with a single misc_44x.S file, into which is moved the 44x specific reset code from head_44x.S (on the grounds that we should really stop clogging up the head_* files with random asm helper routines). At the same time, we disable the (empty save Kconfig and Makefile) arch/powerpc/platforms/4xx directory from the arch/powerpc/platforms Makefile. Contrary to the comment in arch/powerpc/platforms/4xx/Makefile, attempting to build such an empty Makefile will fail, thus breaking compile for the 44x platforms we're about to add. It can go back in once we start porting some of the 40x platforms (and thus it becomes non-empty). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] MPIC U3/U4 MSI backendMichael Ellerman2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPIC U3/U4 MSI backend. Based on code from Segher, heavily hacked by me. This only deals with MSI on U3/U4 MPICs, aka. CPC 9x5. If we find a U3/U4 then we enable this backend, ie. take over the ppc_md MSI hooks. We might need more elaborate logic in future to decide which backend is enabled. We need our own irq_chip so that we can do MSI masking/unmasking on the device itself. We also need to mask explicitly on shutdown to make sure we don't get bitten by lazy-disable semantics. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] MPIC MSI allocatorMichael Ellerman2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support MSI on MPIC we need a way to reserve and allocate hardware irq numbers, this patch implements an allocator for that purpose. New firmware platforms must define a "msi-available-ranges" property on their MPIC node for MSI to work. For U3/U4 we do a best-guess setup. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Enable MSI mappings for MPICMichael Ellerman2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some Apple machines the HT MSI mappings are not enabled by firmware, so we need to do it by hand. We can't use the pci routines as this code runs too early. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Tell Phyp we support MSIMichael Ellerman2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | Tell Phyp we support MSI via the client architecture support mechanism. Signed-off-by: Jake Moilanen <moilanen@austin.ibm.com> Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] RTAS MSI implementationMichael Ellerman2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement MSI support via RTAS (RTAS = run-time firmware on pSeries machines). For now we assumes that if the required RTAS tokens for MSI are present, then we want to use the RTAS MSI routines. When RTAS is managing MSIs for us, it will/may enable MSI on devices that support it by default. This is contrary to the Linux model where a device is in LSI mode until the driver requests MSIs. To remedy this we add a pci_irq_fixup call, which disables MSI if they've been assigned by firmware and the device also supports LSI. Devices that don't support LSI at all will be left as is, drivers are still expected to call pci_enable_msi() before using the device. At the moment there is no pci_irq_fixup on pSeries, so we can just set it unconditionally. If other platforms use the RTAS MSI backend they'll need to check that still holds. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] PowerPC MSI infrastructureMichael Ellerman2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This provides the architecture specific hooks to support MSI on powerpc. We implement the newly added arch_setup_msi_irqs() and arch_teardown_msi_irqs(), and then delegate to ppc_md routines. Platforms that don't implement MSI will leave the ppc_md calls blank, arch_msi_check_device() will detect this and return ENOSYS. Drivers should detect this error and continue to use LSI. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Rip out the existing powerpc msi stubsMichael Ellerman2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | Rip out the existing powerpc msi stubs. These were the start of an implementation based on ppc_md calls, but were never used in mainline. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Remove use of 4level-fixup.h for ppc32David Gibson2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For 32-bit systems, powerpc still relies on the 4level-fixup.h hack, to pretend that the generic pagetable handling stuff is 3-levels rather than 4. This patch removes this, instead using the newer pgtable-nopmd.h to handle the elision of both the pud and pmd pagetable levels (ppc32 pagetables are actually 2 levels). This removes a little extraneous code, and makes it more easily compared to the 64-bit pagetable code. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Add powerpc PCI-E reset API implementationBrian King2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds the pSeries platform implementation for a new PCI API which can be used to issue various types of PCI-E reset, including PCI-E warm reset and PCI-E hot reset. This is needed for an ipr PCI-E adapter which does not properly implement BIST. Running BIST on this adapter results in PCI-E errors. The only reliable reset mechanism that exists on this hardware is PCI Fundamental reset (warm reset). Acked-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | Merge branch 'linux-2.6'Paul Mackerras2007-05-07
| |\|
| * | [POWERPC] Holly bootwrapperJosh Boyer2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | Add Holly/Hickory bootwrapper Signed-off-by: Stephen Winiecki <stevewin@us.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Holly DTSJosh Boyer2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | Add Holly DTS file Signed-off-by: Stephen Winiecki <stevewin@us.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Holly defconfigJosh Boyer2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | Holly/Hickory defconfig Signed-off-by: Stephen Winiecki <stevewin@us.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Add support for 750CL Holly boardJosh Boyer2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add PowerPC 750 Holly/Hickory platform support Signed-off-by: Stephen Winiecki <stevewin@us.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Generalize tsi108 PCI setupJosh Boyer2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | Generalize tsi108_setup_pci to take the config space physical address and primary bus designator as a parameter. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Generalize tsi108 PHY typesJosh Boyer2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a phy_type field to the tsi108 ethernet structures to indicate which PHY is used on a board. This is derived from the "compatible" property in the ethernet-phy node of the device tree. The default remains the MV88E PHY. Also, convert the setup code to use of_get_mac_address instead of hard coding a lookup for the "address" property in the ethernet node. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Add tsi108_pci.h for common PCI functionsJosh Boyer2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | Add a header file for the common PCI routines used for the TSI bridge Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Export pcibios_remove_pci_devicesLinas Vepstas2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pseries PCI hotplug code cannot build as a module, unless the pcibios_remove_pci_devices function is exported. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> ---- arch/powerpc/platforms/pseries/pci_dlpar.c | 1 + 1 file changed, 1 insertion(+) Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Add __init annotations to reserve_mem() and stabs_alloc()Michael Ellerman2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | reserve_mem() and stabs_alloc() are both called only from other __init routines, so can be marked __init. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Cope with PCI host bridge I/O window not starting at 0Paul Mackerras2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently our code to set up the data structures for a PCI host bridge and create the mapping for its I/O window assumes that the window starts at I/O port 0 on the PCI side. If this is not true, we can end up with I/O port numbers in the resources for PCI devices which will cause an oops if a driver tries to access them via inb/outb etc., because there is no mapping for the corresponding addresses. Normally the I/O window starts at 0, but there are some situations on partitioned machines with a hypervisor where the window may not start at 0. This fixes the problem by allocating space for the range from 0 to the end of the I/O window. That is, hose->io_base_virt contains the virtual address for I/O port 0 on the PCI bus, and thus the assumption that hose->io_base_virt - pci_io_base is the offset between the "global" I/O port numbers (those in the PCI device resources) and the I/O port numbers on the PCI bus is maintained. For PCI host bridges that are present at boot, we only map the portion of that range that correspond to the bridge's I/O window. For bridges added after boot we ioremap the range from 0 to the end of the I/O window, for now; in fact hot-added bridges should be using reserve_phb_iospace() and __ioremap_explicit (so they get sensible global port numbers), but we don't have the infrastructure yet to do that (basically a free_phb_iospace() routine plus appropriate locking). Interestingly, this makes the two arms of the if statement in get_bus_io_range do almost exactly the same thing; that function could now be simplified in a further patch. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] mpc52xx suspend to deep-sleepDomen Puncer2007-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement deep-sleep on MPC52xx. SDRAM is put into self-refresh with help of SRAM code (alternatives would be code in FLASH, I-cache). Interrupt code must also not be in SDRAM, so put it in I-cache. MPC52xx core is static, so contents will remain intact even with clocks turned off. Signed-off-by: Domen Puncer <domen.puncer@telargo.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-18 12:32:32 -0500