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* Driver core: change sysdev classes to use dynamic kobject namesKay Sievers2008-01-24
| | | | | | | | | | All kobjects require a dynamically allocated name now. We no longer need to keep track if the name is statically assigned, we can just unconditionally free() all kobject names on cleanup. Signed-off-by: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [POWRPC] CPM2: Eliminate section mismatch warning in cpm2_reset().Scott Wood2007-12-13
| | | | | Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'for-2.6.24' of ↵Paul Mackerras2007-11-19
|\ | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx into merge
| * [POWERPC] 4xx: UIC add mask_ack callbackValentine Barshak2007-11-19
| | | | | | | | | | | | | | | | | | | | This adds uic_mask_ack_irq() callback to PowerPC 4xx uic code to avoid kernel crash. It is used for edge-triggered interrupts by handle_uic_irq(). Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] cpm: Fix a couple minor issues in cpm_common.c.Scott Wood2007-11-09
|/ | | | | | | | A debugging printk is removed, and a comment is fixed to match the code. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Fix mv643xx_pci sysfs .read and .write functionsDale Farnsworth2007-11-07
| | | | | | | | | | | | | Commit 91a69029 introduced an additional parameter to the .read and .write methods for sysfs binary attributes. Two mv64x60_pci functions were missed in that patch, resulting in these errors: /cache/git/linux-2.6/arch/powerpc/sysdev/mv64x60_pci.c:77: warning: initialization from incompatible pointer type /cache/git/linux-2.6/arch/powerpc/sysdev/mv64x60_pci.c:78: warning: initialization from incompatible pointer type Add the missing "struct bin_attribute *" parameter. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] i8259: Add disable methodAurelien Jarno2007-11-07
| | | | | | | | | | | | Since commit 76d2160147f43f982dfe881404cfde9fd0a9da21, the NE2000 card is not working anymore on PPC and POWERPC and produces WATCHDOG timeouts. The patch below fixes that the same way it has been done on x86, x86_64 and MIPS. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] bestcomm: Restrict bus prefetch bugfix to original mpc5200 silicon.Grant Likely2007-10-21
| | | | | | Only the MPC5200 needs this bug fix. MPC5200B is okay. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* Merge branch 'for-2.6.24' of git://git.secretlab.ca/git/linux-2.6-mpc52xx ↵Paul Mackerras2007-10-17
|\ | | | | | | into merge
| * [POWERPC] bestcomm: GenBD task supportSylvain Munaut2007-10-16
| | | | | | | | | | | | | | | | | | | | | | | | | | This is the microcode for the GenBD task and the associated support code. This is a generic task that copy data to/from a hardware FIFO. This is currently locked to 32bits wide access but could be extended as needed. The microcode itself comes directly from the offical API (v2.2) Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * [POWERPC] bestcomm: FEC task supportSylvain Munaut2007-10-16
| | | | | | | | | | | | | | | | | | | | | | This is the microcode for the FEC task and the associated support code. The microcode itself comes directly from the offical API (v2.2) Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * [POWERPC] bestcomm: ATA task supportSylvain Munaut2007-10-16
| | | | | | | | | | | | | | | | | | | | | | This is the microcode for the ATA task and the associated support code. The microcode itself comes directly from the offical API (v2.2) Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * [POWERPC] bestcomm: core bestcomm support for Freescale MPC5200Sylvain Munaut2007-10-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the core of the BestComm API for the Freescale MPC5200(b). The BestComm engine is a microcode-controlled / tasks-based DMA used by several of the onchip devices. Setting up the tasks / memory allocation and all common low level functions are handled by this patch. The specifics details of each tasks and their microcode are split-out in separate patches. This is not the official API, but a much cleaner one. (hopefully) Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | [POWERPC] Add missing semicolon for fsl_pci.cTony Li2007-10-16
|/ | | | | Signed-off-by: Tony Li <tony.li@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Use dcr_host_t.base in dcr_unmap()Michael Ellerman2007-10-15
| | | | | | | | | With the base stored in dcr_host_t, there's no need for callers to pass the dcr_n into dcr_unmap(). In fact this removes the possibility of them passing the incorrect value, which would then be iounmap()'ed. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* Add dcr_host_t.base in dcr_read()/dcr_write()Michael Ellerman2007-10-15
| | | | | | | | | | | | | | | | | | | | | | | Now that all users of dcr_read()/dcr_write() add the dcr_host_t.base, we can save them the trouble and do it in dcr_read()/dcr_write(). As some background to why we just went through all this jiggery-pokery, benh sayeth: Initially the goal of the dcr_read/dcr_write routines was to operate like mfdcr/mtdcr which take absolute DCR numbers. The reason is that on 4xx hardware, indirect DCR access is a pain (goes through a table of instructions) and it's useful to have the compiler resolve an absolute DCR inline. We decided that wasn't worth the API bastardisation since most places where absolute DCR values are used are low level 4xx-only code which may as well continue using mfdcr/mtdcr, while the new API is designed for device "instances" that can exist on 4xx and Axon type platforms and may be located at variable DCR offsets. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* missed bio_endio() in axonramAl Viro2007-10-12
| | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [POWERPC] PCI: Add 64-bit physical address support to setup_indirect_pciValentine Barshak2007-10-12
| | | | | | | | Add 64-bit physical address support to setup_indirect_pci(). Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge branch 'virtex-for-2.6.24' of ↵Josh Boyer2007-10-11
|\ | | | | | | git://git.secretlab.ca/git/linux-2.6-virtex into for-2.6.24-4xx
| * [POWERPC] Don't build arch/powerpc/sysdev/dcr.c for ARCH=ppc kernelsGrant Likely2007-10-10
| | | | | | | | | | | | | | dcr.c is an arch/powerpc only thing. Compiling ppc405 arch/ppc kernels throws warnings without this change. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | [POWERPC] Move of_platform_driver initialisations: arch/powerpcStephen Rothwell2007-10-11
|/ | | | | | | | | | We no longer initialise the name and owner fields of the of_platform_driver, but use the fields of the embedded device_driver's name field instead. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spi: Support non-QE processorsPeter Korsgaard2007-10-08
| | | | | | | On non-QE processors (mpc831x/mpc834x) the SPI clock is the SoC clock. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] QE: pario - support for MPC85xx layoutAnton Vorontsov2007-10-08
| | | | | | | | 8 bytes padding required to match MPC85xx registers layout. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Reviewed-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascadingAnton Vorontsov2007-10-08
| | | | | | | | | | | | | | | | | | | | | | | | | set_irq_chained_handler overwrites MPIC's handle_irq function (handle_fasteoi_irq) thus MPIC never gets eoi event from the cascaded IRQ. This situation hangs MPIC on MPC8568E. To solve this problem efficiently, QEIC needs pluggable handlers, specific to the underlaying interrupt controller. Patch extends qe_ic_init() function to accept low and high interrupt handlers. To avoid #ifdefs, stack of interrupt handlers specified in the header file and functions are marked 'static inline', thus handlers are compiled-in only if actually used (in the board file). Another option would be to lookup for parent controller and automatically detect handlers (will waste text size because of never used handlers, so this option abolished). qe_ic_init() also changed in regard to support multiplexed high/low lines as found in MPC8568E-MDS, plus qe_ic_cascade_muxed_mpic() handler implemented appropriately. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 85xx/86xx: refactor RSTCR reset codeKumar Gala2007-10-08
| | | | | | | | | On the majority of 85xx & 86xx we have a register that's ability to assert HRESET_REQ to reset the board. We refactored that code so it can be shared between both platforms into fsl_soc.c and removed all the duplication in each platform directory. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] FSL: Access PCIe LTSSM register with correct sizeKumar Gala2007-10-08
| | | | | | | The LTSSM register is actual 32-bits wide so we should be doing a dword access. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Treat 8610 PCIe host bridge as transparentJason Jin2007-10-08
| | | | | | Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] qe: miscellaneous code improvements and fixes to the QE libraryTimur Tabi2007-10-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes numerous miscellaneous code improvements to the QE library. 1. Remove struct ucc_common and merge ucc_init_guemr() into ucc_set_type() (every caller of ucc_init_guemr() also calls ucc_set_type()). Modify all callers of ucc_set_type() accordingly. 2. Remove the unused enum ucc_pram_initial_offset. 3. Refactor qe_setbrg(), also implement work-around for errata QE_General4. 4. Several printk() calls were missing the terminating \n. 5. Add __iomem where needed, and change u16 to __be16 and u32 to __be32 where appropriate. 6. In ucc_slow_init() the RBASE and TBASE registers in the PRAM were programmed with the wrong value. 7. Add the protocol type to struct us_info and updated ucc_slow_init() to use it, instead of always programming QE_CR_PROTOCOL_UNSPECIFIED. 8. Rename ucc_slow_restart_x() to ucc_slow_restart_tx() 9. Add several macros in qe.h (mostly for slow UCC support, but also to standardize some naming convention) and remove several unused macros. 10. Update ucc_geth.c to use the new macros. 11. Add ucc_slow_info.protocol to specify which QE_CR_PROTOCOL_xxx protcol to use when initializing the UCC in ucc_slow_init(). 12. Rename ucc_slow_pram.rfcr to rbmr and ucc_slow_pram.tfcr to tbmr, since these are the real names of the registers. 13. Use the setbits, clrbits, and clrsetbits where appropriate. 14. Refactor ucc_set_qe_mux_rxtx(). 15. Remove all instances of 'volatile'. 16. Simplify get_cmxucr_reg(); 17. Replace qe_mux.cmxucrX with qe_mux.cmxucr[]. 18. Updated struct ucc_geth because struct ucc_fast is not padded any more. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] MPC8568E-MDS: add support for ds1374 rtcAnton Vorontsov2007-10-04
| | | | | | | | | | | | MPC8568E-MDS have DS1374 chip on the I2C bus, thus let's use it. This patch also adds #address-cells and #size-cells to the I2C controllers nodes. p.s. DS1374 rtc class driver is in the -mm tree, its name is rtc-rtc-class-driver-for-the-ds1374.patch. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] fsl_soc: fix uninitialized i2c_board_info structureAnton Vorontsov2007-10-04
| | | | | | | | | i2c_board_info used semi-initialized, causing garbage in the info->flags, and that, in turn, causes various symptoms of i2c malfunctioning, like PEC mismatches. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] cpm: Describe multi-user ram in its own device node.Scott Wood2007-10-04
| | | | | | | | | | | | | | | | | | | | | The way the current CPM binding describes available multi-user (a.k.a. dual-ported) RAM doesn't work well when there are multiple free regions, and it doesn't work at all if the region doesn't begin at the start of the muram area (as the hardware needs to be programmed with offsets into this area). The latter situation can happen with SMC UARTs on CPM2, as its parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't support moving it. It is now described with a muram node, similar to QE. The current CPM binding is sufficiently recent (i.e. never appeared in an official release) that compatibility with existing device trees is not an issue. The code supporting the new binding is shared between cpm1 and cpm2, rather than remain separated. QE should be able to use this code as well, once minor fixes are made to its device trees. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] fsl_soc: rtc-ds1307 supportPeter Korsgaard2007-10-04
| | | | | | | | | Add support for the I2C devices handled by the rtc-ds1307 driver to of_register_i2c_devices. Cc: G. Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] fsl_soc: Fix trivial printk typo.Peter Korsgaard2007-10-04
| | | | | | | | Fix a trivial printk typo in fsl_soc. Cc: G. Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] cpm2: Add cpm2_set_pin().Scott Wood2007-10-04
| | | | | | | | This provides a generic way for board code to set up CPM pins, rather than directly poking magic values into registers. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] cpm2: Add SCCs to cpm2_clk_setup(), and cpm2_smc_clk_setup().Scott Wood2007-10-04
| | | | | Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] cpm2: Infrastructure code cleanup.Scott Wood2007-10-04
| | | | | | | | Mostly sparse fixes (__iomem annotations, etc); also, cpm2_immr is used rather than creating many temporary mappings. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 8xx: Add pin and clock setting functions.Scott Wood2007-10-03
| | | | | | | | | | | These let board code set up pins and clocks without having to put magic numbers directly into the registers. The clock function is mostly duplicated from the cpm2 version; hopefully this stuff can be merged at some point. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] 8xx: Infrastructure code cleanup.Scott Wood2007-10-03
| | | | | | | | | | | | | | | | | | | | | 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Add early debug console for CPM serial ports.Scott Wood2007-10-03
| | | | | | | | | This code assumes that the ports have been previously set up, with buffers in DPRAM. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Introduce new CPM device bindings.Scott Wood2007-10-03
| | | | | | | | | | | | | | | | | | | | | | | | | | This introduces a new device binding for the CPM and other devices on these boards. Some of the changes include: 1. Proper namespace scoping for Freescale compatibles and properties. 2. Use compatible rather than things like device_type and model to determine which particular variant of a device is present. 3. Give the drivers the relevant CPM command word directly, rather than requiring it to have a lookup table based on device-id, SCC v. SMC, and CPM version. 4. Specify the CPCR and the usable DPRAM region in the CPM's reg property. Boards that do not require the legacy bindings should select CONFIG_PPC_CPM_NEW_BINDING to enable the of_platform CPM devices. Once all existing boards are converted and tested, the config option can become default y to prevent new boards from using the old model. Once arch/ppc is gone, the config option can be removed altogether. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] CPM: Change from fsl,brg-frequency to brg/clock-frequencyScott Wood2007-10-03
| | | | | | | | | | | | | As suggested by David Gibson, now that we have a separate node for the baud rate generators, it's better to use the standard clock-frequency property than a cpm-node-level fsl,brg-frequency property. This patch updates existing places where fsl,brg-frequency is used. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Virtex: add xilinx interrupt controller driverGrant Likely2007-10-03
| | | | | | | Adds support for the Xilinx opb-intc interrupt controller Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* Merge branch 'linux-2.6' into for-2.6.24Paul Mackerras2007-10-03
|\
| * [POWERPC] Fix copy'n'paste typo in commproc.cJochen Friedrich2007-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The powerpc version of commproc.c exports cpm_dpram_addr twice and cpm_dpram_phys not at all due to a typo. This patch fixes this problem. CC arch/powerpc/sysdev/commproc.o arch/powerpc/sysdev/commproc.c:398: error: redefinition of '__kcrctab_cpm_dpram_addr' arch/powerpc/sysdev/commproc.c:392: error: previous definition of '__kcrctab_cpm_dpram_addr' was here arch/powerpc/sysdev/commproc.c:398: error: redefinition of '__kstrtab_cpm_dpram_addr' arch/powerpc/sysdev/commproc.c:392: error: previous definition of '__kstrtab_cpm_dpram_addr' was here arch/powerpc/sysdev/commproc.c:398: error: redefinition of '__ksymtab_cpm_dpram_addr' arch/powerpc/sysdev/commproc.c:392: error: previous definition of '__ksymtab_cpm_dpram_addr' was here make[1]: *** [arch/powerpc/sysdev/commproc.o] Error 1 make: *** [arch/powerpc/sysdev] Error 2 Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | [POWERPC] Update mpic to use dcr_host_t.baseMichael Ellerman2007-10-02
| | | | | | | | | | | | | | | | | | Now that dcr_host_t contains the base address, we can use that in the mpic code, rather than storing it separately. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Store the base address in dcr_host_tMichael Ellerman2007-10-02
| | | | | | | | | | | | | | | | | | | | In its current form, dcr_map() doesn't remember the base address you passed it, which means you need to store it somewhere else. Rather than adding the base to another struct it seems simpler to store it in the dcr_host_t. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Implement {read,update}_persistent_clockTony Breeds2007-10-02
| | | | | | | | | | | | | | | | With these functions implemented we cooperate better with the generic timekeeping code. This obsoletes the need for the timer sysdev as a bonus. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Inline u3msi_compose_msi_msg()Michael Ellerman2007-10-02
| | | | | | | | | | | | | | | | | | | | In the MPIC U3 MSI code, we call u3msi_compose_msi_msg() once for each MSI. This is overkill, as the address is per pci device, not per MSI. So setup the address once, and just set the data per MSI. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Simplify error logic in u3msi_setup_msi_irqs()Michael Ellerman2007-10-02
| | | | | | | | | | | | | | | | | | | | u3msi_setup_msi_irqs() doesn't need to call teardown() itself, the generic code will do this for us as long as we return a non zero value. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Support setting affinity for U3/U4 MSI sourcesOlof Johansson2007-09-22
| | | | | | | | | | | | | | | | | | | | | | Hook up affinity-setting for U3/U4 MSI interrupt sources. Tested on Quad G5 with myri10ge. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
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