litmus-rt.git - The LITMUS^RT kernel.

	Commit message (Collapse)	Author	Age
*	powerpc: Initialize TLB and LPID register on HV mode Power7	Benjamin Herrenschmidt	2011-04-19
\| \| \| \| \| \|	In case entry from the bootloader isn't "clean" Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
*	powerpc: Initialize LPCR:DPFD on power7 to a sane default	Benjamin Herrenschmidt	2011-04-19
\| \| \| \| \| \| \| \|	This sets the default data stream prefetch size for operating systems that don't set their own value in DSCR. We use 4 which is "medium". Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
*	powerpc: Base support for exceptions using HSRR0/1	Benjamin Herrenschmidt	2011-04-19
\| \| \| \| \| \| \| \| \|	Pass the register type to the prolog, also provides alternate "HV" version of hardware interrupt (0x500) and adjust LPES accordingly We tag those interrupts by setting bit 0x2 in the trap number Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
*	powerpc: Define CPU feature for Architected 2.06 HV mode	Benjamin Herrenschmidt	2011-04-19
	This bit indicates that we are operating in hypervisor mode on a CPU compliant to architecture 2.06 or later (currently server only). We set it on POWER7 and have a boot-time CPU setup function that clears it if MSR:HV isn't set (booting under a hypervisor). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>