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* [PATCH] Pass struct dev pointer to dma_cache_sync()Ralf Baechle2006-12-07
| | | | | | | | | | | | | | | | | Pass struct dev pointer to dma_cache_sync() dma_cache_sync() is ill-designed in that it does not have a struct device pointer argument which makes proper support for systems that consist of a mix of coherent and non-coherent DMA devices hard. Change dma_cache_sync to take a struct device pointer as first argument and fix all its callers to pass it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Add struct dev pointer to dma_is_consistent()Ralf Baechle2006-12-07
| | | | | | | | | | | | | | | dma_is_consistent() is ill-designed in that it does not have a struct device pointer argument which makes proper support for systems that consist of a mix of coherent and non-coherent DMA devices hard. Change dma_is_consistent to take a struct device pointer as first argument and fix the sole caller to pass it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] elf: include terminating zero in n_nameszMagnus Damm2006-12-07
| | | | | | | | | | | The ELF32 spec says we should plus we include the zero on other platforms. Signed-off-by: Magnus Damm <magnus@valinux.co.jp> Cc: Daniel Jacobowitz <drow@false.org> Cc: Roland McGrath <roland@redhat.com> Cc: Jakub Jelinek <jakub@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] elf: Always define elf_addr_t in linux/elf.hMagnus Damm2006-12-07
| | | | | | | | | | | | | Define elf_addr_t in linux/elf.h. The size of the type is determined using ELF_CLASS. This allows us to remove the defines that today are spread all over .c and .h files. Signed-off-by: Magnus Damm <magnus@valinux.co.jp> Cc: Daniel Jacobowitz <drow@false.org> Cc: Roland McGrath <roland@redhat.com> Cc: Jakub Jelinek <jakub@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] mm: pagefault_{disable,enable}()Peter Zijlstra2006-12-07
| | | | | | | | | | | | | | | | | | | | Introduce pagefault_{disable,enable}() and use these where previously we did manual preempt increments/decrements to make the pagefault handler do the atomic thing. Currently they still rely on the increased preempt count, but do not rely on the disabled preemption, this might go away in the future. (NOTE: the extra barrier() in pagefault_disable might fix some holes on machines which have too many registers for their own good) [heiko.carstens@de.ibm.com: s390 fix] Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: Nick Piggin <npiggin@suse.de> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2006-12-06
|\ | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Import updates from i386's i8259.c [MIPS] *-berr: Header inclusions for DEC bus error handlers [MIPS] Compile __do_IRQ() when really needed [MIPS] genirq: use name instead of typename [MIPS] Do not use handle_level_irq for ioasic_dma_irq_type. [MIPS] pte_offset(dir,addr): parenthesis fix
| * [MIPS] Import updates from i386's i8259.cAtsushi Nemoto2006-12-06
| | | | | | | | | | | | | | Import many updates from i386's i8259.c, especially genirq transitions. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] *-berr: Header inclusions for DEC bus error handlersMaciej W. Rozycki2006-12-06
| | | | | | | | | | | | | | | | A fixup to add missing header inclusions for bus error handlers for DECstation system after the recent switch to get_irq_regs(). Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Compile __do_IRQ() when really neededFranck Bui-Huu2006-12-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | __do_IRQ() is needed only by irq handlers that can't use default handlers defined in kernel/irq/chip.c. For others platforms there's no need to compile this function since it won't be used. For those platforms this patch defines GENERIC_HARDIRQS_NO__DO_IRQ symbol which is used exactly for this purpose. Futhermore for platforms which do not use __do_IRQ(), end() method which is part of the 'irq_chip' structure is not used. This patch simply removes this method in this case. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] genirq: use name instead of typenameAtsushi Nemoto2006-12-06
| | | | | | | | | | | | | | The "typename" field was obsoleted by the "name" field. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Do not use handle_level_irq for ioasic_dma_irq_type.Atsushi Nemoto2006-12-06
| | | | | | | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | WorkQueue: Fix up arch-specific work items where possibleDavid Howells2006-12-05
|/ | | | | | | | | | Fix up arch-specific work items where possible to use the new work_struct and delayed_work structs. Three places that enqueue bits of their stack and then return have been marked with #error as this is not permitted. Signed-Off-By: David Howells <dhowells@redhat.com>
* [MIPS] Cleanup memory barriers for weakly ordered systems.Ralf Baechle2006-12-04
| | | | | | | Also the R4000 / R4600 LL/SC instructions imply a sync so no explicit sync needed. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Alchemy: Automatically enable CONFIG_RESOURCES_64BIT for PCI configs.Ralf Baechle2006-12-04
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Unify csum_partial.SAtsushi Nemoto2006-12-04
| | | | | | | | | The 32-bit version and 64-bit version are almost equal. Unify them. This makes further improvements (for example, copying with parallel, supporting PREFETCH, etc.) easier. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SWARM: Fix a typo in #error directivesMaciej W. Rozycki2006-12-04
| | | | | | | | This is a fix for a typo repeated several times in #error directives for invalid SiByte configurations. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Use SYSVIPC_COMPAT to fix various problems on N32Atsushi Nemoto2006-12-04
| | | | | | | | | | | | | | N32 SysV IPC system calls should use 32-bit compatible code. arch/mips/kernel/linux32.c have similar compatible code for O32, but ipc/compat.c seems more complete. We can use it for both N32 and O32. This patch should fix these problems (and other possible problems): http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=1149188824.6986.6.camel%40diimka-laptop http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=44C6B829.8050508%40caviumnetworks.com Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [NET]: MIPS checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | * sanitize prototypes, annotate * kill shift-by-16 in checksum calculations * htons->shift in l-e checksum calculations Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2006-12-01
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (31 commits) [MIPS] Remove duplicate ISA DMA code for 0 DMA channel case. [MIPS] Remove unused definition of cpu_to_lelongp() [MIPS] Remove userspace proofing from <asm/bitops.h>. [MIPS] Remove old junk left from old atomic_lock. [MIPS] Use conditional traps for BUG_ON on MIPS II and better. [MIPS] mips HPT cleanup: make clocksource_mips public [MIPS] do_IRQ cleanup [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants. [MIPS] Remove redundant r4k_blast_icache() calls [MIPS] Work around bogus gcc warnings. [MIPS] Fix double inclusions [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq [MIPS] IRQ cleanups [MIPS] mips hpt cleanup: get rid of mips_hpt_init [MIPS] PB1200: Remove duplicate definitions [MIPS] Fix alignment hole in struct cache_desc; shrink struct. [MIPS] Oprofile: kernel support for the R10000. [MIPS] Remove unused R10000 performance counter definitions. [MIPS] Add support for kexec [MIPS] Don't print presence of WAIT instruction on bootup. ...
| * [MIPS] Remove duplicate ISA DMA code for 0 DMA channel case.Ralf Baechle2006-11-29
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Use conditional traps for BUG_ON on MIPS II and better.Ralf Baechle2006-11-29
| | | | | | | | | | | | | | This shaves of around 4kB and a few cycles for the average kernel that has CONFIG_BUG enabled. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] mips HPT cleanup: make clocksource_mips publicAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | Make clocksource_mips public and get rid of mips_hpt_read, mips_hpt_mask. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] do_IRQ cleanupAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | | | Now we have both function and macro version of do_IRQ() and the former is used only by DEC and non-preemptive kernel. This patch makes everyone use the macro version and removes the function version. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.Ralf Baechle2006-11-29
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Remove redundant r4k_blast_icache() callsAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | | | | | | | | | r4k_flush_cache_all() and r4k_flush_cache_mm() case: these are noop if the CPU did not have dc_aliases. It would mean we do not need to care about icache here. r4k_flush_cache_range case: if r4k_flush_cache_mm() did not need to care about icache, it would be same for this function. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Work around bogus gcc warnings.Ralf Baechle2006-11-29
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Fix double inclusionsNicolas Kaiser2006-11-29
| | | | | | | | | | Signed-off-by: Nicolas Kaiser <nikai@nikai.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irqAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Further incorporation of generic irq framework. Replacing __do_IRQ() by proper flow handler would make the irq handling path a bit simpler and faster. * use generic_handle_irq() instead of __do_IRQ(). * use handle_level_irq for obvious level-type irq chips. * use handle_percpu_irq for irqs marked as IRQ_PER_CPU. * setup .eoi routine for irq chips possibly used with handle_percpu_irq. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] IRQ cleanupsAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a big irq cleanup patch. * Use set_irq_chip() to register irq_chip. * Initialize .mask, .unmask, .mask_ack field. Functions for these method are already exist in most case. * Do not initialize .startup, .shutdown, .enable, .disable fields if default routines provided by irq_chip_set_defaults() were suitable. * Remove redundant irq_desc initializations. * Remove unnecessary local_irq_save/local_irq_restore, spin_lock. With this cleanup, it would be easy to switch to slightly lightwait irq flow handlers (handle_level_irq(), etc.) instead of __do_IRQ(). Though whole this patch is quite large, changes in each irq_chip are not quite simple. Please review and test on your platform. Thanks. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] mips hpt cleanup: get rid of mips_hpt_initAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | | | Currently nobody outside time.c require mips_hpt_init(). Remove it and call c0_hpt_timer_init() directly if R4k counter was used for timer interrupt. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] PB1200: Remove duplicate definitionsYoichi Yuasa2006-11-29
| | | | | | | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Oprofile: kernel support for the R10000.Ralf Baechle2006-11-29
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Add support for kexecNicolas Schichan2006-11-29
| | | | | | | | | | | | | | | | | | A tiny userland application loading the kernel and invoking kexec_load for mips is available here: http://chac.le-poulpe.net/~nico/kexec/kexec-2006-10-18.tar.gz Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Don't print presence of WAIT instruction on bootup.Ralf Baechle2006-11-29
| | | | | | | | | | | | Not useful and quite a big of noise on bootup of large systems. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Fast path for rdhwr emulation for TLSAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | Add special short path for emulationg RDHWR which is used to support TLS. Add an extra prologue for cpu_has_vtag_icache case. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=nAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a patch to load 64-bit modules to CKSEG0 so that can be compiled with -msym32 option. This makes each module ~10% smaller. * introduce MODULE_START and MODULE_END * custom module_alloc() * PGD for modules * change XTLB refill handler synthesizer * enable -msym32 for modules again (revert ca78b1a5c6a6e70e052d3ea253828e49b5d07c8a) New XTLB refill handler looks like this: 80000080 dmfc0 k0,C0_BADVADDR 80000084 bltz k0,800000e4 # goto l_module_alloc 80000088 lui k1,0x8046 # %high(pgd_current) 8000008c ld k1,24600(k1) # %low(pgd_current) 80000090 dsrl k0,k0,0x1b # l_vmalloc_done: 80000094 andi k0,k0,0x1ff8 80000098 daddu k1,k1,k0 8000009c dmfc0 k0,C0_BADVADDR 800000a0 ld k1,0(k1) 800000a4 dsrl k0,k0,0x12 800000a8 andi k0,k0,0xff8 800000ac daddu k1,k1,k0 800000b0 dmfc0 k0,C0_XCONTEXT 800000b4 ld k1,0(k1) 800000b8 andi k0,k0,0xff0 800000bc daddu k1,k1,k0 800000c0 ld k0,0(k1) 800000c4 ld k1,8(k1) 800000c8 dsrl k0,k0,0x6 800000cc mtc0 k0,C0_ENTRYLO0 800000d0 dsrl k1,k1,0x6 800000d4 mtc0 k1,C0_ENTRYL01 800000d8 nop 800000dc tlbwr 800000e0 eret 800000e4 dsll k1,k0,0x2 # l_module_alloc: 800000e8 bgez k1,80000008 # goto l_vmalloc 800000ec lui k1,0xc000 800000f0 dsubu k0,k0,k1 800000f4 lui k1,0x8046 # %high(module_pg_dir) 800000f8 beq zero,zero,80000000 800000fc nop 80000000 beq zero,zero,80000090 # goto l_vmalloc_done 80000004 daddiu k1,k1,0x4000 80000008 dsll32 k1,k1,0x0 # l_vmalloc: 8000000c dsubu k0,k0,k1 80000010 beq zero,zero,80000090 # goto l_vmalloc_done 80000014 lui k1,0x8046 # %high(swapper_pg_dir) Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Rewrite GALILEO_INL/GALILEO_OUTL to GT_READ/GT_WRITEYoichi Yuasa2006-11-29
| | | | | | | | | | | | | | | | This patch has rewritten GALILEO_INL/GALILEO_OUTL using GT_READ/GT_WRITE. This patch tested on Cobalt Qube2. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Make free_init_pages() arguments to be physical addressesFranck Bui-Huu2006-11-29
| | | | | | | | | | | | | | | | | | | | | | It allows caller of this function to not care about CKSEG0/XKPHYS address mixes. It's now automatically done by free_init_pages(). We can now safely remove hack needed by 64 bit kernels with CONFIG_BUILD_ELF64=n in free_initmem(). Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] setup.c: clean up initrd related codeFranck Bui-Huu2006-11-29
| | | | | | | | | | Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] setup.c: use __pa_symbol() where neededFranck Bui-Huu2006-11-29
| | | | | | | | | | | | | | It should fix the broken code in resource_init() too. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] setup.c: get ride of CPHYSADDR()Franck Bui-Huu2006-11-29
| | | | | | | | | | | | | | | | | | and use new __pa() implementation instead introduced by the previous patch. Indeed this macro can be used now even by the 64 bit kernels with CONFIG_BUILD_ELF64=n config. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] page.h: remove __pa() usages.Franck Bui-Huu2006-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | __pa() was used by virt_to_page() and virt_addr_valid(). These latter are used when kernel is initialised so __pa() is not appropriate, we use virt_to_phys() instead. Futhermore __pa() is going to take care of CKSEG0/XKPHYS address mix for 64 bit kernels. This makes __pa() more complex than virt_to_phys() and this extra work is not needed by virt_to_page() and virt_addr_valid(). Eventually it consolidates virt_to_phys() prototype by making its argument 'const'. this avoids some warnings that was due to some virt_to_page() usages which pass const pointer. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | Fix misc Kconfig typosMatt LaPlante2006-11-29
|/ | | | | | | | Fix various Kconfig typos. Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com> Acked-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* [MIPS] Do topology_init even on uniprocessor kernels.Ralf Baechle2006-11-29
| | | | | | Otherwise CPU 0 doesn't show up in sysfs which breaks some software. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix Bonito bootup message.Ralf Baechle2006-11-28
| | | | | | | Even when enabling Bonito IOBC coherence the kernel would actually claim it was disabling it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Hack for SB1 cache issuesThiemo Seufer2006-11-22
| | | | | | | | | Removing flush_icache_page a while ago broke SB1 which was using an empty flush_data_cache_page function. This glues things well enough so a more efficient but also more intrusive solution can be found later. Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix EV64120 and Ocelot builds by providing a plat_timer_setup().Ralf Baechle2006-11-06
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] EV64120: Fix PCI interrupt allocation.Ralf Baechle2006-11-06
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Make irq number allocator generally available for fixing EV64120.Ralf Baechle2006-11-06
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] EV64120: Fix timer initialization for HZ != 100.Ralf Baechle2006-11-06
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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