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* | [MIPS] Register PCI host bridge resource earlierThomas Bogendoerfer2007-04-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCI based SNI RM machines have their EISA bus behind an Intel PCI/EISA bridge. So the PCI IO range must start at 0x0000. Changing that will break the PCI bus, because i8259.c already has registered it's IO addresses before the PCI bus gets initialized. Below is a patch, which will register the PCI host bridge resources inside register_pci_controller(). It also changes i8259.c to use insert_region(), because request_resource() will fail, if the IO space of the PIT hanging of the PCI host bridge (maybe passing the resource parent to init_i8259_irqs() is a cleaner fix for that). Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Remove pnx8550-v2pci_defconfigYoichi Yuasa2007-04-27
| | | | | | | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Add bcm1480 ZBus trace support, fix wait related bugsMark Mason2007-04-27
| | | | | | | | | | | | | | | | | | Make ZBus tracing generic - moving it to a common direcotry under arch/mips/sibyte, add bcm1480 support and fix some wait related bugs (thanks to Ralf for assistance on that). Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Remove unused argument from kunmap_coherent().Ralf Baechle2007-04-27
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Malta: Delete unused prototype of mips_timer_interrupt.Ralf Baechle2007-04-27
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Select ZONE_DMA only if GENERIC_ISA_DMA selectedAtsushi Nemoto2007-04-27
| | | | | | | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] MIPS Tech: Get rid of volatile in core code.Ralf Baechle2007-04-27
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] IP22: Get rid of volatile in IP22 core code.Ralf Baechle2007-04-27
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] JMR3927 cleanupAtsushi Nemoto2007-04-27
| | | | | | | | | | | | | | | | | | * Kill dead codes * Rearrange irq chip handlers * Minimize defconfig Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] merge GT64111 PCI routines and GT64120 PCI_0 routinesYoichi Yuasa2007-04-27
| | | | | | | | | | | | | | | | | | This patch has merged GT64111 PCI routines and GT64120 PCI_0 routines. GT64111 PCI is almost the same as GT64120's PCI_0. This patch don't change GT64120 PCI routines. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Cobalt: Split PCI codes from setup.cYoichi Yuasa2007-04-27
| | | | | | | | | | | | | | It's removed #ifdef CONFIG_PCI/#endif from cobalt setup.c . Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Cobalt: clean up include filesYoichi Yuasa2007-04-27
| | | | | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
* | [MIPS] Fix AP/SP to work in the reality of modern kernels.Ralf Baechle2007-04-27
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Fix oprofile logic to physical counter remappingRalf Baechle2007-04-24
| | | | | | | | | | | | | | | | | | This did cause oprofile to fail on non-multithreaded systems with more than 2 processors such as the BCM1480. Reported by Manish Lachwani (mlachwani@mvista.com). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Fix BUG(), BUG_ON() handlingAtsushi Nemoto2007-04-20
| | | | | | | | | | | | | | | | | | | | With commit 63dc68a8cf60cb110b147dab1704d990808b39e2, kernel can not handle BUG() and BUG_ON() properly since get_user() returns false for kernel code. Use __get_user() to skip unnecessary access_ok(). This patch also make BRK_BUG code encoded in the TNE instruction. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Retry {save,restore}_fp_context if failed in atomic context.Atsushi Nemoto2007-04-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The save_fp_context()/restore_fp_context() might sleep on accessing user stack and therefore might lose FPU ownership in middle of them. If these function failed due to "in_atomic" test in do_page_fault, touch the sigcontext area in non-atomic context and retry these save/restore operation. This is a replacement of a (broken) fix which was titled "Allow CpU exception in kernel partially". Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Disallow CpU exception in kernel again.Atsushi Nemoto2007-04-20
| | | | | | | | | | | | | | | | | | The commit 4d40bff7110e9e1a97ff8c01bdd6350e9867cc10 ("Allow CpU exception in kernel partially") was broken. The commit was to fix theoretical problem but broke usual case. Revert it for now. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Add missing silicon revisions for BCM112xMark Mason2007-04-20
| | | | | | | | | | | | | | | | | | Recent versions of the BCM112X processors aren't recognized by Linux (preventing Linux from booting on those processors). This patch adds support for those that are missing. Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] SMTC: Fix recursion in instant IPI replay code.Ralf Baechle2007-03-29
| | | | | | | | | | | | | | | | | | | | | | | | local_irq_restore -> raw_local_irq_restore -> irq_restore_epilog -> smtc_ipi_replay -> smtc_ipi_dq -> spin_unlock_irqrestore -> _spin_unlock_irqrestore -> local_irq_restore The recursion does abort when there is no more IPI queued for a CPU, so this isn't usually fatal which is why we got away with this for so long until this was discovered by code inspection. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] BCM1480: Fix setting of irq affinity.Mark Mason2007-03-29
| | | | | | | | | | Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] do_page_fault() needs to use raw_smp_processor_id().Ralf Baechle2007-03-29
| | | | | | | | | | | | Original patch posted by Deepak Saxena <dsaxena@plexity.net>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] SMTC: Fix false trigger of debug code on single VPE.Ralf Baechle2007-03-29
| | | | | | | | | | | | | | | | Make smtc_setup_irq() update the list of interrupts which need to be watched by the debug code itself. Also there is no need to initialize the IPI swint when running with a single VPE, so don't initialize it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] SMTC: irq_{enter,leave} and kstats keeping for relayed timer ints.Ralf Baechle2007-03-29
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] lockdep: Deal with interrupt disable hazard in TRACE_IRQFLAGSChris Dearman2007-03-29
| | | | | | | | | | | | | | | | | | | | | | Between the mtc0 or di instruction that disables interrupts and the following hazard barrier a processor may still take interrupts. If an interrupt is taken after interrupts are disabled but before the state is updated it will appear to restore_all that it is incorrectly returning with interrupts disabled. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] lockdep: Handle interrupts in R3000 style c0_status register.Chris Dearman2007-03-29
| | | | | | | | | | | | | | | | Check the IEP bit for R3000 style processors when checking to see if interrupts will be reenabled in restore_all. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] MT: MIPS_MT_SMTC_INSTANT_REPLAY currently conflicts with PREEMPT.Ralf Baechle2007-03-29
| | | | | | | | | | | | | | So until MIPS_MT_SMTC_INSTANT_REPLAY has been rewritten to solve this issue, don't allow selecting it with PREEMPT. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] EV64120: Include <asm/irq.h> to fix warning.Ralf Baechle2007-03-29
| | | | | | | | | | | | arch/mips/pci/pci-ev64120.c:10: warning: implicit declaration of function 'allocate_irqno' Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Ocelot: Fix warning.Ralf Baechle2007-03-29
| | | | | | | | | | | | Remove unused variable. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Ocelot: Give PMON_v1_setup a proper prototype.Ralf Baechle2007-03-29
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] SB1250: Fix bugs/warnings by creative use of volatile.Ralf Baechle2007-03-24
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] SB1: Fix pile of gcc's bogus format string warnings.Ralf Baechle2007-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CC arch/mips/mm/cerr-sb1.o arch/mips/mm/cerr-sb1.c: In function 'sb1_cache_error': arch/mips/mm/cerr-sb1.c:235: warning: format '%010llx' expects type 'long long unsigned int', but argument 2 has type 'uint64_t' arch/mips/mm/cerr-sb1.c: In function 'extract_ic': arch/mips/mm/cerr-sb1.c:385: warning: format '%016llx' expects type 'long long unsigned int', but argument 3 has type 'uint64_t' arch/mips/mm/cerr-sb1.c:385: warning: format '%016llX' expects type 'long long unsigned int', but argument 6 has type 'uint64_t' arch/mips/mm/cerr-sb1.c: In function 'extract_dc': arch/mips/mm/cerr-sb1.c:523: warning: format '%010llx' expects type 'long long unsigned int', but argument 3 has type 'uint64_t' arch/mips/mm/cerr-sb1.c:523: warning: format '%016llX' expects type 'long long unsigned int', but argument 7 has type 'uint64_t' arch/mips/mm/cerr-sb1.c:570: warning: format '%016llX' expects type 'long long unsigned int', but argument 3 has type 'uint64_t' LD arch/mips/mm/built-in.o Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Jazz: Fix warning.Ralf Baechle2007-03-24
| | | | | | | | | | | | arch/mips/jazz/jazzdma.c:70: warning: assignment makes integer from pointer without a cast Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] R3000: local_flush_data_cache_page take a pointer argument.Ralf Baechle2007-03-24
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Implement flush_anon_page().Ralf Baechle2007-03-24
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] SPARSEMEM: The first pfn of zone should be min_low_pfn, not 0.Atsushi Nemoto2007-03-24
| | | | | | | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Always use virt_to_phys() when translating kernel addressesFranck Bui-Huu2007-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes two places where we used plain 'x - PAGE_OFFSET' to achieve virtual to physical address convertions. This type of convertion is no more allowed since commit 6f284a2ce7b8bc49cb8455b1763357897a899abb. Reported-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> [Build fixes for machines that don't use the generic dma-coherence.h] Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Export except_vec_vi_{mori,lui,ori} as text symbols.Ralf Baechle2007-03-19
| | | | | | | | | | | | Otherwise objdump will screw up disassembly. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] mips-boards: More liberal check for mips-board consoleThiemo Seufer2007-03-19
| | | | | | | | | | | | | | | | Allows overriding the MALTA/ATLAS/etc. default console setting with non-serial console devices. Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Misc fixes for plat_irq_dispatch functionsThiemo Seufer2007-03-19
| | | | | | | | | | | | | | | | | | | | | | | | o adds missing ST0_IM masks, which caused the logging of valid interrupts as spurious o stops pnx8550 to log every interrupt as spurious o adds cause register masks for ip22/ip32, which caused handling of masked interrupts o removes some superfluous parentheses in the SNI interrupt code Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Qemu: Fix Symmetric Uniprocessor support.Atsushi Nemoto2007-03-19
| | | | | | | | | | | | | | | | | | | | | | | | Might be useful for SMP debugging. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> [Rewritten Kconfig bits to deal better fit in the usual pattern of doing things - Ralf] Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] VI: TRACE_IRQS_OFF clobbers $v0, so save & restore around call.Ralf Baechle2007-03-19
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Kconfig: Move missplaced NR_CPUS default from SMTC to VSMP.Ralf Baechle2007-03-16
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] RTLX: Handle copy_*_user return values.Ralf Baechle2007-03-16
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] RTLX: Protect rtlx_{read,write} with mutex.Ralf Baechle2007-03-16
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] RTLX: Harden against compiler reordering and optimization.Ralf Baechle2007-03-16
| | | | | | | | | | | | | | | | | | | | | | RTLX communication is based on lock-free shared memory buffers. It happened to be working by luck so far but relies on the optimizer doing certain optimizations but no reordering. Fixed by inserting proper barriers in rtlx_read and rtlx_write, and careful pointer dereferencing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] RTLX: Don't use volatile; it's fragile.Ralf Baechle2007-03-16
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Lasat: Downgrade 64-bit kernel from experimental to broken.Ralf Baechle2007-03-16
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Compat: Fix build if CONFIG_SYSVIPC is disabled.Ralf Baechle2007-03-16
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] FPU ownership management & preemption fixesAtsushi Nemoto2007-03-16
| | | | | | | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [MIPS] Check FCSR for pending interrupts, alternative versionAtsushi Nemoto2007-03-16
| | | | | | | | | | | | | | | | | | | | | | Commit 6d6671066a311703bca1b91645bb1e04cc983387 is incomplete and misses non-r4k CPUs. This patch reverts the commit and fixes in other way. o Do FCSR checking in caller of restore_fp_context. o Send SIGFPE if the signal handler set any FPU exception bits. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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