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| * | | | MIPS: Netlogic: Fix cop0 prid check in AHCI initGanesan Ramalingam2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PRID register should be masked with IMP_MASK to get processor ID. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8883/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Netlogic: Fix nlm_xlp2_get_pic_frequency to use ref_divQingmin Liu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The variable ref_div is initialized to the correct divisor but not used in the frequency calculation. This caused incorrect frequency to be reported when the clock divisor is not 3. Signed-off-by: Qingmin Liu <qingmin@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8884/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Netlogic: Fix wait for slave CPUsShanghui Liu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For core 0, the condition of "cpu == bootcpu" is always true, so it does not wait for other three threads to become ready. Fix this by using correct check. Signed-off-by: Shanghui Liu <shliu@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8881/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: LLVMLinux: Silence variable self-assignment warnings.Toma Tabacu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove variable self-assignments. This silences a bunch of -Wself-assign warnings reported by clang. The changed code can be compiled without warnings by both gcc and clang. Signed-off-by: Toma Tabacu <toma.tabacu@imgtec.com> Signed-off-by: Daniel Sanders <daniel.sanders@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9314/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: LLVMLinux: Fix an 'inline asm input/output type mismatch' error.Daniel Sanders2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace incorrect matching constraint that caused the error with an alternative that still has the required constraints on the inline assembly. This is the error message reported by clang: arch/mips/include/asm/checksum.h:285:27: error: unsupported inline asm: input with type '__be32' (aka 'unsigned int') matching output with type 'unsigned short' "0" (htonl(len)), "1" (htonl(proto)), "r" (sum)); ^~~~~~~~~~~~ The changed code can be compiled successfully by both gcc and clang. Signed-off-by: Daniel Sanders <daniel.sanders@imgtec.com> Signed-off-by: Toma Tabacu <toma.tabacu@imgtec.com> Suggested-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9313/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: LLVMLinux: Fix a 'cast to type not present in union' error.Toma Tabacu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove a cast to the 'mips16e_instruction' union inside an if condition and instead do an assignment to a local 'union mips16e_instruction' variable's 'full' member before the if statement and use this variable in the if condition. This is the error message reported by clang: arch/mips/kernel/branch.c:38:8: error: cast to union type from type 'unsigned short' not present in union if (((union mips16e_instruction)inst).ri.opcode ^ ~~~~ The changed code can be compiled successfully by both gcc and clang. Signed-off-by: Toma Tabacu <toma.tabacu@imgtec.com> Signed-off-by: Daniel Sanders <daniel.sanders@imgtec.com> Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com> Cc: David Daney <david.daney@cavium.com> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9312/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Changed current_thread_info() to an equivalent supported by both clang ↵Daniel Sanders2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and GCC Without this, a 'break' instruction is executed very early in the boot and the boot hangs. The problem is that clang doesn't honour named registers on local variables and silently treats them as normal uninitialized variables. However, it does honour them on global variables. Signed-off-by: Daniel Sanders <daniel.sanders@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: David Daney <ddaney.cavm@gmail.com> Acked-by: Behan Webster <behanw@converseincode.com> Patchwork: https://patchwork.linux-mips.org/patch/9311/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: XPA: Add new configuration file.Steven J. Hill2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add in new config files for enabling a XPA platform. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9354/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: OCTEON: Use correct CSR to soft resetChandrakala Chavva2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes reboot for Octeon III boards [ralf@linux-mips.org: Dropped segment for function cvmx_reset_octeon() which was removed by the preceeding commit.] Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9464/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Octeon: Remove unused function cvmx_reset_octeon().Ralf Baechle2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As suggested by David Daney. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: OCTEON: Use device tree to probe for flash chips.David Daney2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't assume they are there, the device tree will tell us. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9461/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: OCTEON: Protect accesses to bootbus flash with octeon_bootbus_sem.David Daney2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this, we get bus errors. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9460/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: OCTEON: Add semaphore to serialize bootbus accesses.David Daney2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some hardware blocks attached to the OCTEON bootbus run asynchronously to accesses from the CPUs. These include MMC/SD host, CF(when using DMA), and NAND controller. A bus error, or corrupt data may occur if a CPU is trying to access a bootbus connected device at the same time the bus is running asynchronous operations. To work around these problems we add this semaphore that must be acquired before initiating bootbus activity. Subsequent patches will add users for this. Signed-off-by: David Daney <david.daney@cavium.com> [aleksey.makarov@auriga.com: combine the patches] Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9459/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: BMIPS: Add DTS files for several platformsKevin Cernekee2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the supported chips use legacy (non-DT) bootloaders, so they will need to select an appropriate builtin DTB at compile time until the bootloader is updated. Provide suitable DTS files, and a means to compile one of them into the kernel image. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Cc: f.fainelli@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8858/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: BMIPS: Refresh BCM3384 DTS filesKevin Cernekee2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DT bindings for this platform have changed as the bootloader and product requirements evolved. In particular, there are both Linux-on-Zephyr and Linux-on-Viper configurations. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8856/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: BMIPS: Enable additional peripheral and CPU support in defconfigKevin Cernekee2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also, add an LE defconfig for set-top box (BCM7xxx). This will allow the BMIPS kernel to run on several non-BCM3384 platforms. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Cc: f.fainelli@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8855/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: BMIPS: Use a non-default FIXADDR_TOP settingKevin Cernekee2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will be required to support BMIPS3300 platforms. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8854/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: BMIPS: Delete the irqchip driver from irq.cKevin Cernekee2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BCM3384/BCM63xx can use the common drivers/irqchip/irq-bcm7120-l2.c for this purpose; BCM7xxx will use drivers/irqchip/irq-bcm7038-l1.c. We no longer need this code under arch/mips. [ralf@linux-mips.org: Fix conflicts.] Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8853/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: BMIPS: Add quirks for several Broadcom platformsKevin Cernekee2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A couple of chips require special handling in order to make SMP secondary boot and/or exception vectors work correctly. Take care of these in setup.c. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8852/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: BMIPS: Remove bogus bus nameKevin Cernekee2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no "bcm3384" bus so let's just remove it to avoid confusion. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8851/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: BMIPS: Rewrite DMA code to use "dma-ranges" propertyKevin Cernekee2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a more standardized way of handling DMA remapping, and it is suitable for the memory map found on BCM3384. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8850/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Reorder MIPS_L1_CACHE_SHIFT prioritiesKevin Cernekee2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabling support for more than one BMIPS CPU in the same build may result in different L1_CACHE_SHIFT values, e.g. CPU_BMIPS5000 selects MIPS_L1_CACHE_SHIFT_7 CPU_BMIPS4380 selects MIPS_L1_CACHE_SHIFT_6 anything else defaults to MIPS_L1_CACHE_SHIFT_5 Ensure that if more than one MIPS_L1_CACHE_SHIFT_x option is selected, Kconfig sets CONFIG_MIPS_L1_CACHE_SHIFT to the highest value. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8847/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Let __dt_register_buses accept a single bus typeKevin Cernekee2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some machines only have one bus type to register (e.g. "simple-bus"). Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8845/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: bcm3384: Rename "bcm3384" target to "bmips"Kevin Cernekee2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This platform is configured primarily through device tree, and we can reuse the same code to support a bunch of other chips. Change the name to reflect this. [ralf@linux-mips.org: Fix conflicts with other patches.] Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8838/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Add dtbs_install targetAndrew Bresticker2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the dtbs_install Makefile target to install the dtb files into $INSTALL_DTBS_PATH. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Tested-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8836/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Move device-trees into vendor sub-directoriesAndrew Bresticker2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the MIPS device-trees into the appropriate vendor sub-directories. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Tested-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8835/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Add support for fine granularity task level IRQ time accountingDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With sched_clock being ready, it makes sense to add the option of IRQ time accounting -- When we have a fast enough sched_clock, IRQ time accounting will be enabled (see sched_clock_register). Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9489/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: csrc-sb1250: Implement read_sched_clockDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use sb1250 hpt for sched_clock source. This implementation will give high resolution cputime accounting. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9488/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: csrc-sb1250: Remove FSF mail address from GPL noticeDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is to make checkpatch.pl happy for the next patch. It would otherwise say -- ERROR: Do not include the paragraph about writing to the Free Software Foundation's mailing address from the sample GPL notice. The FSF has changed addresses in the past, and may do so again. Linux already includes a copy of the GPL. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9487/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: csrc-sb1250: Extract hpt cycle acquisition from sb1250_hpt_readDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is to prepare for the upcoming read_sched_clock implementation, which will also need to get cycles from the high precision timer. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9486/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: jz4740: Implement read_sched_clockDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use jz4740 timer counter for sched_clock source. This implementation will give high resolution cputime accounting. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9485/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: cevt-txx9: Implement read_sched_clockDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use txx9 up-counter for sched_clock source. This implementation will give high resolution cputime accounting. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9484/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: sgi-ip27: Implement read_sched_clockDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use ip27 hub real time counter for sched_clock source. This implementation will give high resolution cputime accounting. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9483/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: csrc-ioasic: Implement read_sched_clockDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use DEC I/O ASIC's free-running counter for sched_clock source. This implementation will give high resolution cputime accounting. Acked-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9482/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: csrc-ioasic: Remove FSF mail address from GPL noticeDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is to make checkpatch.pl happy for the next patch. It would otherwise say -- ERROR: Do not include the paragraph about writing to the Free Software Foundation's mailing address from the sample GPL notice. The FSF has changed addresses in the past, and may do so again. Linux already includes a copy of the GPL. Acked-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9481/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: csrc-bcm1480: Implement read_sched_clockDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the ZBbus cycle counter for sched_clock source. This implementation will give high resolution cputime accounting. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9480/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: csrc-bcm1480: Remove FSF mail address from GPL noticeDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is to make checkpatch.pl happy for the next patch. It would otherwise say -- ERROR: Do not include the paragraph about writing to the Free Software Foundation's mailing address from the sample GPL notice. The FSF has changed addresses in the past, and may do so again. Linux already includes a copy of the GPL. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9479/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: csrc-r4k: Implement read_sched_clockDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use c0 count register for sched_clock source. This implementation will give high resolution cputime accounting. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9478/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Add sched_clock supportDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will provide sched_clock interface to implement individual read_sched_clock(). Not for CAVIUM_OCTEON_SOC as it defines its own sched_clock() directly (not using the sched_clock_register interface). Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9477/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Add support for full dynticks CPU time accountingDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the correct cmpxchg64 on 32-bit platforms, we can now add the config HAVE_VIRT_CPU_ACCOUNTING_GEN into arch/mips/Kconfig. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9475/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Fall back to generic implementation of cmpxchg64 on 32-bit platformsDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is in preparation of adding HAVE_VIRT_CPU_ACCOUNTING_GEN support in the next patch. Without having cmpxchg64 to use the generic implementation, kernel linking will complain: kernel/built-in.o: In function `cputime_adjust': cputime.c:(.text+0x33748): undefined reference to `__cmpxchg_called_with_bad_pointer' cputime.c:(.text+0x33810): undefined reference to `__cmpxchg_called_with_bad_pointer' Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9474/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Add SCHED_HRTICK supportDeng-Cheng Zhu2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have HIGH_RES_TIMERS to support SCHED_HRTICK. But SCHED_HRTICK is in kernel/Kconfig.hz where HZ values unsuitable for MIPS are defined. So we simply add this config in arch/mips/Kconfig as opposed to including the whole kernel/Kconfig.hz. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-mips@linux-mips.org Cc: macro@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9473/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: OCTEON: Enable little endian kernel.David Daney2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now it is supported, so let people select it. [ralf@linux-mips.org: Folded in fix for bogus CONFIG_ kconfig symbol prefix. Issue reported by Valentin Rothberg <valentinrothberg@gmail.com>.] Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Leonid Rosenboim <lrosenboim@caviumnetworks.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9592/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: OCTEON: Add mach-cavium-octeon/mangle-port.hDavid Daney2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Needed for little-endian ioport access. This fixes NOR flash in little-endian mode Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9591/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Octeon: Handle bootloader structures in little-endian mode.David Daney2015-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compensate for the differences in the layout of in-memory bootloader information as seen from little-endian mode. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9590/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Malta: malta-time: Ensure GIC counter is runningMarkos Chandras2015-03-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start the GIC counter before we try to determine its frequency. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9596/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS, ttyFDC: Add early FDC console supportJames Hogan2015-03-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for early console of MIPS Fast Debug Channel (FDC) on channel 1 with a call very early from the MIPS setup_arch(). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.cz> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9145/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: idle: Workaround wait + FDC problemsJames Hogan2015-03-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On certain cores (namely proAptiv and P5600) incoming data via a Fast Debug Channel (FDC) while the core is blocked on a wait instruction will cause the wait not to wake up even when another interrupt is received. This makes an idle target stop as soon as you send FDC data to it, until the debug probe interrupts it and restarts the wait instruction. This is worked around by avoiding using r4k_wait on these cores if CONFIG_MIPS_EJTAG_FDC_TTY is enabled (which would imply the user intends to use the FDC). [ralf@linux-mips.org: Fix conflict.] Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9144/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Malta: Implement get_c0_fdc_int()James Hogan2015-03-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement the weak get_c0_fdc_int() function for Malta. The Fast Debug Channel (FDC) interrupt is obtained mainly depending on whether a GIC is present. Vectored external interrupt mode isn't yet supported. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9143/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Read CPU IRQ line that FDC to routed toJames Hogan2015-03-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read the CPU IRQ line reportedly used for the Fast Debug Channel (FDC) interrupt from the IntCtl register and store it in cp0_fdc_irq where platform implementations of the new weak platform function get_c0_fdc_int() can refer to it. [ralf@linux-mips.org: Fixed conflict.] Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: James Hogan <james.hogan@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/9140/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-01 20:33:47 -0400