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path: root/arch/mips/txx9/generic/pci.c
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* MIPS: TXx9: Disable PM capability of TX493[89] internal etherAtsushi Nemoto2009-09-17
| | | | | | | | | Some TC35815 variants (i.e. TX493[89] internal ether) report existance of PM registers though they are not supported. Disable PM features by clearing pdev->pm_cap. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] TXx9: Add some pci optionsAtsushi Nemoto2008-07-30
| | | | | | | | Add pci options for backplane type, clock selection, error handling, timeout values. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] TXx9: Make single kernel can support multiple boardsAtsushi Nemoto2008-07-15
| | | | | | | | Make single kernel can be used on RBTX4927/37/38. Also make some SoC-specific code independent from board-specific code. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] TXx9: Reorganize PCI codeAtsushi Nemoto2008-07-15
Split out PCIC dependent code and SoC dependent code from board dependent code. Now TX4927 PCIC code is independent from TX4927/TX4938 SoC code. Also fix some build problems on CONFIG_PCI=n. As a bonus, "FPCIB0 Backplane Support" is available for all TX39/TX49 boards and PCI66 support is available for all TX49 boards. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>