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* MIPS: Fixup last users of irq_chip->typename Thomas Gleixner2009-12-16
| | | | | | | | | | | | The typename member of struct irq_chip was kept for migration purposes and is obsolete since more than 2 years. Fix up the leftovers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org To: LKML <linux-kernel@vger.kernel.org> Cc: Ingo Molnar <mingo@elte.hu> Patchwork: http://patchwork.linux-mips.org/patch/661/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Enable GENERIC_HARDIRQS_NO__DO_IRQ for all platformsRalf Baechle2009-03-30
| | | | | | __do_IRQ() is deprecated and will go away. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] RM: Collected changesThomas Bogendoerfer2008-01-29
| | | | | | | | | | | | | | | | - EISA support for non PCI RMs (RM200 and RM400-xxx). The major part is the splitting of the EISA and onboard ISA of the RM200, which makes the EISA bus on the RM200 look like on other RMs. - 64bit kernel support - system type detection is now common for big and little endian - moved sniprom code to arch/mips/fw - added call_o32 function to arch/mips/fw/lib, which uses a private stack for calling prom functions - fix problem with ISA interrupts, which makes using PIT clockevent possible Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle2007-10-11
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] RM: Use only phyiscal address for 82596 and 53c710Thomas Bogendoerfer2007-07-12
| | | | | | | Use physical address for 82596 and 53c710 base address Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SNI RM updatesThomas Bogendoerfer2007-07-10
| | | | | | | | | | | | - use RTC_CLASS instead of GEN_RTC - get rid of ds1216 in favour of a RTC_CLASS driver - use correct console device for older RM400 - use physical addresses for 82596 device - use 128 byte L1 cache line size (this is needed because most of the SNI caches are using 128 L2 cache lines) Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Support for several more SNI RM models.Thomas Bogendoerfer2007-02-18
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>