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* Merge branch 'mips-next-3.9' of ↵Ralf Baechle2013-02-21
|\ | | | | | | git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
| * MIPS: Add support for the M14KEc core.Steven J. Hill2013-02-16
| | | | | | | | | | | | Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4682/ Signed-off-by: John Crispin <blogic@openwrt.org>
* | MIPS: Whitespace cleanup.Ralf Baechle2013-02-01
|/ | | | | | | | Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: oprofile: Support for XLR/XLS processorsMadhusudan Bhat2012-11-09
| | | | | | | | | | | | | | | Add support for XLR and XLS processors in MIPS Oprofile code. These processors are multi-threaded and have two counters per core. Each counter can track either all the events in the core (global mode), or events in just one thread. We use the counters in the global mode, and use only the first thread in each core to handle the configuration etc. Signed-off-by: Madhusudan Bhat <mbhat@netlogicmicro.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4471 Signed-off-by: John Crispin <blogic@openwrt.org>
*-. Merge branches 'next/generic', 'next/alchemy', 'next/bcm63xx', ↵Ralf Baechle2012-07-25
|\ \ | | | | | | | | | 'next/cavium', 'next/jz4740', 'next/lantiq', 'next/loongson1b' and 'next/netlogic' into mips-for-linux-next
| | * MIPS: Add CPU support for Loongson1BKelvin Cheung2012-07-23
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology (ICT) and the Chinese Academy of Sciences (CAS), which implements the MIPS32 release 2 instruction set. [ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device which also is why it identifies itself with the Legacy Vendor ID in the PrID register. When applying the patch I shoveled some code around to keep things in alphabetical order and avoid forward declarations.] Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: To: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: wuzhangjin@gmail.com Cc: zhzhl555@gmail.com Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3976/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Remove dead code related to 1004K oprofile support.Steven J. Hill2012-07-23
|/ | | | | | | Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3854/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add support for the M14Kc core.Steven J. Hill2012-07-06
| | | | | | | | | [ralf@linux-mips.org: Fixed whitespace damage.] Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3773/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: make oprofile use cp0_perfcount_irq if it is setFelix Fietkau2012-05-15
| | | | | | | | | | Make the oprofile code use the performance counters irq. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3723/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* generic-ipi: more merge falloutIngo Molnar2008-07-15
| | | | | | fix more API change fallout in recently merged upstream changes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
* [MIPS] Fix build failure in mips oprofile codeThiemo Seufer2008-05-12
| | | | | | | | This patch fixes a warning-as-error induced build failure of 64bit MIPS kernels. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] unexport null_perf_irq() and make it staticDmitri Vorobiev2008-04-28
| | | | | | | | This patch unexports the null_perf_irq() symbol, and simultaneously makes this function static. Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Add support for MIPS CMP platform.Ralf Baechle2008-04-28
| | | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Extend performance counter event field.Ralf Baechle2008-01-29
| | | | | | | | The latest draft version of the MIPS Architecture Specification extends the 6 bit event field by adding a directly adjacent 4-bit EventExt field for a total of 10 bits. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Oprofile: Fix computation of number of counters.Ralf Baechle2007-12-06
| | | | | | | VSMP kernels will split the available performance counters between the two processors / cores. But don't do this when we're not on a VSMP system ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle2007-10-11
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Allow hardwiring of the CPU type to a single type for optimization.Ralf Baechle2007-10-11
| | | | | | This saves a few k on systems which only ever ship with a single CPU type. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Separate performance counter interruptsChris Dearman2007-06-14
| | | | | | | | Support for performance counter overflow interrupt that is on a separate interrupt from the timer. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix oprofile logic to physical counter remappingRalf Baechle2007-04-24
| | | | | | | | | This did cause oprofile to fail on non-multithreaded systems with more than 2 processors such as the BCM1480. Reported by Manish Lachwani (mlachwani@mvista.com). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Oprofile: Reset all performance registers for MIPS_MT_SMP configsChris Dearman2007-03-13
| | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Oprofile: Add missing break statements.Ralf Baechle2007-03-04
| | | | | | This was causing oprofile to fail on R10000, R12000, R14000. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Oprofile: kernel support for the R10000.Ralf Baechle2006-11-29
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Oprofile: Fix MIPSxx counter number detection.Ralf Baechle2006-10-30
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Oprofile: fix on non-VSMP / non-SMTC SMP configurations.Ralf Baechle2006-10-30
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Complete fixes after removal of pt_regs argument to int handlers.Ralf Baechle2006-10-07
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Oprofile: Fix build failure due to warning and -Werror.Thiemo Seufer2006-07-13
| | | | | Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Oprofile: Support VSMP on 34K.Ralf Baechle2006-06-29
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix modpost warning: Rename op_model_xxx to op_model_xxx_ops.Atsushi Nemoto2006-06-05
| | | | | | | | | | | The modpost uses a whitelist for commonly used suffix on checking the section mismatch. Adding "_ops" suffix to op_modex_xxx get rid of this modpost warning. WARNING: arch/mips/oprofile/oprofile.o - Section mismatch: reference to .init.text: from .data after 'op_model_mipsxx' (at offset 0x528) Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix detection and handling of the 74K processor.Chris Dearman2006-05-31
| | | | | | | | Nothing exciting; Linux just didn't know it yet so this is most adding a value to a case statement. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Oprofile: Support for 34K UP kernels.Ralf Baechle2006-02-07
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SB1: Add oprofile support.Mark Mason2006-02-07
| | | | | Signed-off-by: Mark Mason <mason@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Oprofile: Add 5K, 20K and 25K support.Ralf Baechle2006-01-10
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Oprofile: Print error message if the CPU happen to have no counters.Ralf Baechle2006-01-10
| | | | Signed-off-by: Ralf Baechle <ralf@ongar.mips.com>
* MIPS: Oprofile: Fixup the loose ends in the plumbing.Ralf Baechle2006-01-10
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* More oprofile bits for MIPS32-style performance counters. The code toRalf Baechle2005-10-29
bolt this into the actual hardware interrupt is yet missing from this commit. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> FEXPORT(ret_from_fork)
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