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* mm: now that all old mmu_gather code is gone, remove the storagePeter Zijlstra2011-05-25
| | | | | | | | | | | | | | | | | | | | | | Fold all the mmu_gather rework patches into one for submission Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Reported-by: Hugh Dickins <hughd@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: David Miller <davem@davemloft.net> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Jeff Dike <jdike@addtoit.com> Cc: Richard Weinberger <richard@nod.at> Cc: Tony Luck <tony.luck@intel.com> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: Mel Gorman <mel@csn.ul.ie> Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Cc: Nick Piggin <npiggin@kernel.dk> Cc: Namhyung Kim <namhyung@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2011-05-23
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits) b43: fix comment typo reqest -> request Haavard Skinnemoen has left Atmel cris: typo in mach-fs Makefile Kconfig: fix copy/paste-ism for dell-wmi-aio driver doc: timers-howto: fix a typo ("unsgined") perf: Only include annotate.h once in tools/perf/util/ui/browsers/annotate.c md, raid5: Fix spelling error in comment ('Ofcourse' --> 'Of course'). treewide: fix a few typos in comments regulator: change debug statement be consistent with the style of the rest Revert "arm: mach-u300/gpio: Fix mem_region resource size miscalculations" audit: acquire creds selectively to reduce atomic op overhead rtlwifi: don't touch with treewide double semicolon removal treewide: cleanup continuations and remove logging message whitespace ath9k_hw: don't touch with treewide double semicolon removal include/linux/leds-regulator.h: fix syntax in example code tty: fix typo in descripton of tty_termios_encode_baud_rate xtensa: remove obsolete BKL kernel option from defconfig m68k: fix comment typo 'occcured' arch:Kconfig.locks Remove unused config option. treewide: remove extra semicolons ...
| * Merge branch 'master' into for-nextJiri Kosina2011-04-26
| |\ | | | | | | | | | | | | Fast-forwarded to current state of Linus' tree as there are patches to be applied for files that didn't exist on the old branch.
| * | update David Miller's old email addressJustin P. Mattock2011-04-06
| | | | | | | | | | | | | | | | | | Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | | MIPS: Move arch_get_unmapped_area and gang to new file.Ralf Baechle2011-05-19
| | | | | | | | | | | | | | | | | | | | | It never really belonged into syscall.c and it's about to become well more complex. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | MIPS: Kconfig and Makefile update for Netlogic XLR/XLSJayachandran C2011-05-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add NLM_XLR_BOARD, CPU_XLR and other config options Makefile updates, mostly based on r4k Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2334/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | MIPS: Netlogic: Cache, TLB support and feature overrides for XLRJayachandran C2011-05-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU_XLR case added to mm/tlbex.c CPU_XLR case added to mm/c-r4k.c for PINDEX attribute Feature overrides for XLR cpu. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2333/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | MIPS: tlbex: Fix GCC 4.6.0 build errorRalf Baechle2011-05-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CC arch/mips/mm/tlbex.o arch/mips/mm/tlbex.c: In function 'build_r4000_tlb_refill_handler': arch/mips/mm/tlbex.c:1155:22: error: variable 'vmalloc_mode' set but not used [-Werror=unused-but-set-variable] arch/mips/mm/tlbex.c:1154:28: error: variable 'htlb_info' set but not used [-Werror=unused-but-set-variable] cc1: all warnings being treated as errors Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | MIPS: c-r4k: Fix GCC 4.6.0 build errorRalf Baechle2011-05-10
| |/ |/| | | | | | | | | | | | | | | | | | | | | CC arch/mips/mm/c-r4k.o arch/mips/mm/c-r4k.c: In function 'probe_scache': arch/mips/mm/c-r4k.c:1078:6: error: variable 'tmp' set but not used [-Werror=unused-but-set-variable] cc1: all warnings being treated as errors Older GCC versions didn't warn about the unused variable tmp because it was getting initialized. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | Fix common misspellingsLucas De Marchi2011-03-31
|/ | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* MIPS: Fix GCC-4.6 'set but not used' warning in arch/mips/mm/init.cDavid Daney2011-03-14
| | | | | | | | | | Under some combinations of CONFIG_*, lastpfn in page_is_ram is 'set but not used'. Mark it as __maybe_unused to quiet the warning/error. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2033/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add an unreachable return statement to satisfy buggy GCCs.David Daney2011-03-14
| | | | | | | | | | | It was reported that GCC-4.3.3 (with CodeSourcery extensions) fails without this. Reported-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2010/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Use WARN() in uasm for better diagnostics.David Daney2011-01-18
| | | | | | | | | | | | | | On the off chance that uasm ever warns about overflow, there is no way to know what the offending instruction is. Change the printks to WARNs, so we can get a nice stack trace. It has the added benefit of being much more noticeable than the short single line warning message, so is less likely to be ignored. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1905/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Optimize TLB handlers for Octeon CPUsDavid Daney2011-01-18
| | | | | | | | | | Octeon can use scratch registers in the TLB handlers. Octeon II can use LDX instructions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1904/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add LDX and LWX instructions to uasm.David Daney2011-01-18
| | | | | | | | | Needed by Octeon II optimized TLB handlers. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Pachwork: https://patchwork.linux-mips.org/patch/1903/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Use BBIT instructions in TLB handlersDavid Daney2011-01-18
| | | | | | | | | | | If the CPU supports BBIT0 and BBIT1, use them in TLB handlers as they are more efficient than an AND followed by an branch and then restoring the clobbered register. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1873/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Use C0_KScratch (if present) to hold PGD pointer.David Daney2011-01-18
| | | | | | | | | | Decide at runtime to use either Context or KScratch to hold the PGD pointer. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1876/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add DINSM to uasm.David Daney2011-01-18
| | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1875/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix build errors in sc-mips.cKevin Cernekee2010-12-17
| | | | | | | | | | | | | | | | | | | | | Seen with malta_defconfig on Linus' tree: CC arch/mips/mm/sc-mips.o arch/mips/mm/sc-mips.c: In function 'mips_sc_is_activated': arch/mips/mm/sc-mips.c:77: error: 'config2' undeclared (first use in this function) arch/mips/mm/sc-mips.c:77: error: (Each undeclared identifier is reported only once arch/mips/mm/sc-mips.c:77: error: for each function it appears in.) arch/mips/mm/sc-mips.c:81: error: 'tmp' undeclared (first use in this function) make[2]: *** [arch/mips/mm/sc-mips.o] Error 1 make[1]: *** [arch/mips/mm] Error 2 make: *** [arch/mips] Error 2 [Ralf: Cosmetic changes to minimize the number of arguments passed to mips_sc_is_activated] Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/1752/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Rename mips_dma_cache_sync back to dma_cache_syncRalf Baechle2010-12-16
| | | | | | This fixes IP22 and IP28 build errors. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Honor L2 bypass bitKevin Cernekee2010-10-29
| | | | | | | | | | | | | | | | On many of the newer MIPS32 cores, CP0 CONFIG2 bit 12 (L2B) indicates that the L2 cache is disabled and therefore Linux should not attempt to use it. [Ralf: Moved the code added by Kevin's original patch into a separate function that can easily be replaced for platforms that need more a different probe.] Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: linux-mips@linux-mips.org> Cc: <linux-kernel@vger.kernel.org> Patchwork: https://patchwork.linux-mips.org/patch/1723/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC codeKevin Cernekee2010-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | BMIPS processor cores are used in 50+ different chipsets spread across 5+ product lines. In many cases the chipsets do not share the same peripheral register layouts, the same register blocks, the same interrupt controllers, the same memory maps, or much of anything else. But, across radically different SoCs that share nothing more than the same BMIPS CPU, a few things are still mostly constant: SMP operations Access to performance counters DMA cache coherency quirks Cache and memory bus configuration So, it makes sense to treat each BMIPS processor type as a generic "building block," rather than tying it to a specific SoC. This makes it easier to support a large number of BMIPS-based chipsets without unnecessary duplication of code, and provides the infrastructure needed to support BMIPS-proprietary features. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: mbizon@freebox.fr Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Tested-by: Florian Fainelli <ffainelli@freebox.fr> Patchwork: https://patchwork.linux-mips.org/patch/1706/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
* MIPS: add support for software performance eventsDeng-Cheng Zhu2010-10-29
| | | | | | | | | | | | | | | | | | | | | | | Software events are required as part of the measurable stuff by the Linux performance counter subsystem. Here is the list of events added by this patch: PERF_COUNT_SW_PAGE_FAULTS PERF_COUNT_SW_PAGE_FAULTS_MIN PERF_COUNT_SW_PAGE_FAULTS_MAJ PERF_COUNT_SW_ALIGNMENT_FAULTS PERF_COUNT_SW_EMULATION_FAULTS Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com> To: linux-mips@linux-mips.org Cc: a.p.zijlstra@chello.nl Cc: paulus@samba.org Cc: mingo@elte.hu Cc: acme@redhat.com Cc: jamie.iles@picochip.com Acked-by: David Daney <ddaney@caviumnetworks.com> Reviewed-by: Matt Fleming <matt@console-pimps.org> Patchwork: https://patchwork.linux-mips.org/patch/1686/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Apply CN63XXP1 errata workarounds.David Daney2010-10-29
| | | | | | | | | | | | | | | The CN63XXP1 needs a couple of workarounds to ensure memory is not written in unexpected ways. All PREF with hints in the range 0-4,6-24 are replaced with PREF 28. We pass a flag to the assembler to cover compiler generated code, and patch uasm for the dynamically generated code. The write buffer threshold is reduced to 4. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1672/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Handle Octeon II caches.David Daney2010-10-29
| | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1664/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Convert DMA to use dma-mapping-common.hDavid Daney2010-10-29
| | | | | | | | | | | | | | | | | | | | Use asm-generic/dma-mapping-common.h to handle all DMA mapping operations and establish a default get_dma_ops() that forwards all operations to the existing code. Augment dev_archdata to carry a pointer to the struct dma_map_ops, allowing DMA operations to be overridden on a per device basis. Currently this is never filled in, so the default dma_map_ops are used. A follow-on patch sets this for Octeon PCI devices. Also initialize the dma_debug system as it is now used if it is configured. Includes fixes by Kevin Cernekee <cernekee@gmail.com>. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1637/ Patchwork: http://patchwork.linux-mips.org/patch/1678/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Remove wait argument of r4k_on_each_cpuRalf Baechle2010-10-29
| | | | | | All callers were passing in 1 anyway. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: More detailed description of r4k_on_each_cpuRalf Baechle2010-10-29
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mm: fix race in kunmap_atomic()Peter Zijlstra2010-10-27
| | | | | | | | | | | | | | | | | | | | | Christoph reported a nice splat which illustrated a race in the new stack based kmap_atomic implementation. The problem is that we pop our stack slot before we're completely done resetting its state -- in particular clearing the PTE (sometimes that's CONFIG_DEBUG_HIGHMEM). If an interrupt happens before we actually clear the PTE used for the last slot, that interrupt can reuse the slot in a dirty state, which triggers a BUG in kmap_atomic(). Fix this by introducing kmap_atomic_idx() which reports the current slot index without actually releasing it and use that to find the PTE and delay the _pop() until after we're completely done. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Reported-by: Christoph Hellwig <hch@infradead.org> Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mm: stack based kmap_atomic()Peter Zijlstra2010-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Keep the current interface but ignore the KM_type and use a stack based approach. The advantage is that we get rid of crappy code like: #define __KM_PTE \ (in_nmi() ? KM_NMI_PTE : \ in_irq() ? KM_IRQ_PTE : \ KM_PTE0) and in general can stop worrying about what context we're in and what kmap slots might be appropriate for that. The downside is that FRV kmap_atomic() gets more expensive. For now we use a CPP trick suggested by Andrew: #define kmap_atomic(page, args...) __kmap_atomic(page) to avoid having to touch all kmap_atomic() users in a single patch. [ not compiled on: - mn10300: the arch doesn't actually build with highmem to begin with ] [akpm@linux-foundation.org: coding-style fixes] [akpm@linux-foundation.org: fix up drivers/gpu/drm/i915/intel_overlay.c] Acked-by: Rik van Riel <riel@redhat.com> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: Chris Metcalf <cmetcalf@tilera.com> Cc: David Howells <dhowells@redhat.com> Cc: Hugh Dickins <hughd@google.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: David Miller <davem@davemloft.net> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Dave Airlie <airlied@linux.ie> Cc: Li Zefan <lizf@cn.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* MIPS: DMA: Fix computation of DMA flags from device's coherent_dma_mask.Ralf Baechle2010-10-04
| | | | | | | | | This only matters for ISA devices with a 24-bit DMA limit or for devices with a 32-bit DMA limit on systems with ZONE_DMA32 enabled. The latter currently only affects 32-bit PCI cards on Sibyte-based systems with more than 1GB RAM installed. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: RM7000: Symbol should be staticRicardo Mendoza2010-10-04
| | | | | | | Signed-off-by: Ricardo Mendoza <ricmm@gentoo.org> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1540/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* dma-mapping: remove dma_is_consistent APIFUJITA Tomonori2010-08-11
| | | | | | | | | | | | | | | | | | | | | Architectures implement dma_is_consistent() in different ways (some misinterpret the definition of API in DMA-API.txt). So it hasn't been so useful for drivers. We have only one user of the API in tree. Unlikely out-of-tree drivers use the API. Even if we fix dma_is_consistent() in some architectures, it doesn't look useful at all. It was invented long ago for some old systems that can't allocate coherent memory at all. It's better to export only APIs that are definitely necessary for drivers. Let's remove this API. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: James Bottomley <James.Bottomley@HansenPartnership.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* kmap_atomic: make kunmap_atomic() harder to misuseCesar Eduardo Barros2010-08-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | kunmap_atomic() is currently at level -4 on Rusty's "Hard To Misuse" list[1] ("Follow common convention and you'll get it wrong"), except in some architectures when CONFIG_DEBUG_HIGHMEM is set[2][3]. kunmap() takes a pointer to a struct page; kunmap_atomic(), however, takes takes a pointer to within the page itself. This seems to once in a while trip people up (the convention they are following is the one from kunmap()). Make it much harder to misuse, by moving it to level 9 on Rusty's list[4] ("The compiler/linker won't let you get it wrong"). This is done by refusing to build if the type of its first argument is a pointer to a struct page. The real kunmap_atomic() is renamed to kunmap_atomic_notypecheck() (which is what you would call in case for some strange reason calling it with a pointer to a struct page is not incorrect in your code). The previous version of this patch was compile tested on x86-64. [1] http://ozlabs.org/~rusty/index.cgi/tech/2008-04-01.html [2] In these cases, it is at level 5, "Do it right or it will always break at runtime." [3] At least mips and powerpc look very similar, and sparc also seems to share a common ancestor with both; there seems to be quite some degree of copy-and-paste coding here. The include/asm/highmem.h file for these three archs mention x86 CPUs at its top. [4] http://ozlabs.org/~rusty/index.cgi/tech/2008-03-30.html [5] As an aside, could someone tell me why mn10300 uses unsigned long as the first parameter of kunmap_atomic() instead of void *? Signed-off-by: Cesar Eduardo Barros <cesarb@cesarb.net> Cc: Russell King <linux@arm.linux.org.uk> (arch/arm) Cc: Ralf Baechle <ralf@linux-mips.org> (arch/mips) Cc: David Howells <dhowells@redhat.com> (arch/frv, arch/mn10300) Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> (arch/mn10300) Cc: Kyle McMartin <kyle@mcmartin.ca> (arch/parisc) Cc: Helge Deller <deller@gmx.de> (arch/parisc) Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> (arch/parisc) Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> (arch/powerpc) Cc: Paul Mackerras <paulus@samba.org> (arch/powerpc) Cc: "David S. Miller" <davem@davemloft.net> (arch/sparc) Cc: Thomas Gleixner <tglx@linutronix.de> (arch/x86) Cc: Ingo Molnar <mingo@redhat.com> (arch/x86) Cc: "H. Peter Anvin" <hpa@zytor.com> (arch/x86) Cc: Arnd Bergmann <arnd@arndb.de> (include/asm-generic) Cc: Rusty Russell <rusty@rustcorp.com.au> ("Hard To Misuse" list) Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* MIPS: kprobe: Add support.David Daney2010-08-05
| | | | | | | | | | | | | | | | | | | | This patch is based on previous work by Sony and Himanshu Chauhan. I have done some cleanup and implemented JProbes and KRETPROBES. The KRETPROBES part is pretty much copied verbatim from powerpc. A possible future enhance might be to factor out the common code. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: Himanshu Chauhan <hschauhan@nulltrace.org> To: linux-mips@linux-mips.org To: ananth@in.ibm.com, To: anil.s.keshavamurthy@intel.com To: davem@davemloft.net To: masami.hiramatsu.pt@hitachi.com Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1525/ Patchwork: https://patchwork.linux-mips.org/patch/1530/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: uasm: Add option to export uasm API.David Daney2010-08-05
| | | | | | | | | | | | | | | | A 'select EXPORT_UASM' in Kconfig will cause the uasm to be exported for use in modules. When it is exported, all the uasm data and code cease to be __init and __initdata. Also daddiu_bug cannot be __cpuinitdata if uasm is exported. The cleanest thing is to just make it normal data. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1500/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: uasm: Add BBIT0 and BBIT1 instructionsDavid Daney2010-08-05
| | | | | | | | | | | These are OCTEON specific instructions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1496/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: uasm: Add drotr32 and uasm_i_drotr_safe.David Daney2010-08-05
| | | | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1495/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add base support for Ingenic JZ4740 System-on-a-ChipLars-Peter Clausen2010-08-05
| | | | | | | | | | | | Adds a new cpu type for the JZ4740 to the Linux MIPS architecture code. It also adds the iomem addresses for the different components found on a JZ4740 SoC. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1464/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: RM7000: Add support for tertiary cacheRicardo Mendoza2010-08-05
| | | | | | | | | | Add support for the external T-cache interface. Allow for platform independent size probing from 512KB to 8MB in powers of two. Signed-off-by: Ricardo Mendoza <ricmm@gentoo.org> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1477/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: RM7000: Make use of cache_op() instead of inline asmRicardo Mendoza2010-08-05
| | | | | | | | | | Small cleanup of the cache code to get rid of inline asm, in preparation to give tertiary cache support. Signed-off-by: Ricardo Mendoza <ricmm@gentoo.org> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1476/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Remove unnecessary header file inclusion from fault.c.Ralf Baechle2010-08-05
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add -Werror to arch/mips/KbuildSam Ravnborg2010-08-05
| | | | | | | | | | | | | | | | | | | | | | | | | | Adding subdirs-ccflags-y := -Werror to arch/mips/Kbuild let us in one go cover all files with -Werror. In addition this allows us to remove the individual -Werror definition in various Makefile. Adding the definition to Kbuild as a recursive option help us not to forget to do so. With this change we now compile arch/mips/kernel/cpufreq with -Werror One drawback: When specifying a subdirectory covered by the Kbuild file like this: make arch/mips/kernel/ then kbuild fails to pick up the -Werror definition. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> To: linux-mips <linux-mips@linux-mips.org> To: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/1301/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Check for accesses beyond the end of the PGD.David Daney2010-04-30
| | | | | | | | | | | | | | | | | | | | | | | | | For some combinations of PAGE_SIZE and vmbits, it is possible to have userspace access that are beyond what is covered by the PGD, but within vmbits. Such an access would cause the TLB refill handler to load garbage values for PMD and PTE potentially giving userspace access to parts of the physical address space to which it is not entitled. In the TLB refill hot path, we add a single dsrl instruction so we can check if any bits outside of the range covered by the PGD are set. In the vmalloc side we then separate the bad case from the normal vmalloc case and call tlb_do_page_fault_0 if warranted. This slows us down a bit, but has the benefit of yielding deterministic behavior. [Ralf: Fixed build error for 32-bit kernels.] [Ralf: Folded lmo commit c8c0e22b2aa3982852b44279638ef37f9aa31b7d into this commit.] Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1152/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---
* MIPS: Use uasm_i_ds{r,l}l_safe() instead of uasm_i_ds{r,l}l() in tlbex.cDavid Daney2010-04-30
| | | | | | | | | | This makes the code somewhat cleaner while reducing the risk of shift amount overflows when various page table related options are changed. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1154/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix __vmalloc() etc. on MIPS for non-GPL modulesAnton Altaparmakov2010-04-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit b3594a089f1c17ff919f8f78505c3f20e1f6f8ce (lmo) rsp. 351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (kernel.org) break non-GPL modules that use __vmalloc() or any of the vmap(), vm_map_ram(), etc functions on MIPS. All those functions are EXPORT_SYMBOL() so are meant to be allowed to be used by non-GPL kernel modules. These calls all take page protection as an argument which is normally a constant like PAGE_KERNEL. This commit causes all protection constants like PAGE_KERNEL to not be constants and instead to contain the GPL-only symbol _page_cachable_default. This means that all calls to __vmalloc(), vmap(), etc, cause non-GPL modules to fail to link with the complaint that they are trying to use the GPL-only symbol _page_cachable_default... Change EXPORT_SYMBOL_GPL(_page_cachable_default) to EXPORT_SYMBOL() for non-GPL modules that call __vmalloc(), vmap(), vm_map_ram() etc. Signed-off-by: Anton Altaparmakov <aia21@cantab.net> Cc: Chris Dearman <chris@mips.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: http://patchwork.linux-mips.org/patch/1084/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Sibyte: Fix M3 TLB exception handler workaround.Ralf Baechle2010-04-12
| | | | | | The M3 workaround needs to cmpare the region and VPN2 fields only. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: uasm: Add OR instruction.Ralf Baechle2010-04-12
| | | | | | This is needed for the fix of the M3 workaround. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add SYSCALL to uasm.David Daney2010-04-12
| | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/976/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* include cleanup: Update gfp.h and slab.h includes to prepare for breaking ↵Tejun Heo2010-03-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
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