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* mips: use generic show_mem()Johannes Weiner2008-07-26
* dma-mapping: add the device argument to dma_mapping_error()FUJITA Tomonori2008-07-26
* Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2008-07-15
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| * [MIPS] Make two functions staticDmitri Vorobiev2008-07-15
* | Merge branch 'generic-ipi' into generic-ipi-for-linusIngo Molnar2008-07-15
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| * smp_call_function: get rid of the unused nonatomic/retry argumentJens Axboe2008-06-26
* | [MIPS] Fix 32bit kernels on R4k with 128 byte cache line sizeThomas Bogendoerfer2008-07-08
* | [MIPS] Atlas, decstation: Fix section mismatches triggered by defconfigsShane McDonald2008-07-08
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* [MIPS] Fix buggy use of kmap_coherent.Ralf Baechle2008-06-16
* [MIPS] Fix the fix for divide by zero error in build_{clear,copy}_pageAtsushi Nemoto2008-06-16
* [MIPS] Fix build for PNX platforms.Ralf Baechle2008-06-16
* [MIPS] Export empty_zero_page for sake of the ext4 module.Ralf Baechle2008-06-16
* Fix divide by zero error in build_clear_page() and build_copy_page()Yoichi Yuasa2008-06-05
* [MIPS] R4700: Fix build_tlb_probe_entryThomas Bogendoerfer2008-06-05
* [MIPS] unexport __kmap_atomic_to_pageAdrian Bunk2008-05-12
* [MIPS] unexport copy_from_user_page()Dmitri Vorobiev2008-04-28
* [MIPS] unexport copy_to_user_page()Dmitri Vorobiev2008-04-28
* [MIPS] unexport copy_user_highpage()Dmitri Vorobiev2008-04-28
* [MIPS] remove redundant display of free swap space in show_mem()Johannes Weiner2008-04-28
* [MIPS] Add support for MIPS CMP platform.Ralf Baechle2008-04-28
* [MIPS] Allow setting of the cache attribute at run time.Chris Dearman2008-04-28
* [MIPS] All MIPS32 processors support64-bit physical addresses.Chris Dearman2008-04-28
* [MIPS] Reimplement clear_page/copy_pageThiemo Seufer2008-04-28
* [MIPS] Handle aliases in vmalloc correctly.Ralf Baechle2008-04-07
* [MIPS] Add missing 4KEC TLB refill handlerThomas Bogendoerfer2008-04-01
* [MIPS] Fix loads of section missmatchesRalf Baechle2008-03-12
* [MIPS] Fix typo in commentThiemo Seufer2008-03-12
* [MIPS] SB1: Fix CONFIG_SIBYTE_DMA_PAGEOPS build failure.Thiemo Seufer2008-02-19
* [MIPS] Fix buggy invocations of kmap_coherent()Ralf Baechle2008-02-19
* [MIPS] Handle I-cache coherency in flush_cache_range()Ralf Baechle2008-02-19
* arch/mips/: Spelling fixesJoe Perches2008-02-03
* [MIPS] Split the micro-assembler from tlbex.c.Thiemo Seufer2008-02-01
* [MIPS] Alchemy: Au1210/Au1250 CPU supportManuel Lauss2008-01-29
* [MIPS] Use correct dma flushing in dma_cache_sync()Thomas Bogendoerfer2008-01-29
* [MIPS] Use real cache invalidateThomas Bogendoerfer2008-01-29
* [MIPS] tlbex.c: cleanup debug codeFranck Bui-Huu2008-01-29
* [MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align Franck Bui-Huu2008-01-29
* [MIPS] tlbex.c: cleanup include filesFranck Bui-Huu2008-01-29
* [MIPS] tlbex.c: Cleanup __init usages.Franck Bui-Huu2008-01-29
* [MIPS] Remove useless S-cache flushes.Ralf Baechle2008-01-29
* [MIPS] Use pte_present instead of open coded test for _PAGE_PRESENT.Ralf Baechle2008-01-29
* [MIPS] R4000/R4400 daddiu erratum workaroundMaciej W. Rozycki2008-01-29
* [MIPS] tlbex: Cleanup handling of R2 hazards in TLB handlers.Ralf Baechle2008-01-29
* [MIPS] Wrong CONFIG option prevents setup of DMA zone.Thomas Bogendoerfer2008-01-11
* [MIPS] 64-bit Sibyte kernels need DMA32.Ralf Baechle2007-11-26
* [MIPS] Sibyte: Replace use of removed IO_SPACE_BASE with IOADDR.Ralf Baechle2007-11-15
* [MIPS] Convert reference to mem_map to pfn_to_page().Ralf Baechle2007-11-15
* [MIPS] Sibyte: resurrect old cache hack.Ralf Baechle2007-11-15
* [MIPS] MT: Fix bug in multithreaded kernels.Ralf Baechle2007-10-29
* [MIPS] c-r3k: Implement flush_cache_range()Maciej W. Rozycki2007-10-29
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-10 07:41:12 -0400
pt">); fp |= (~sw & IEEE_TRAP_ENABLE_DNO) << 41; return fp; } static inline unsigned long ieee_fpcr_to_swcr(unsigned long fp) { unsigned long sw; sw = (fp >> 35) & IEEE_STATUS_MASK; sw |= (fp >> 36) & IEEE_MAP_DMZ; sw |= (~fp >> 48) & (IEEE_TRAP_ENABLE_INV | IEEE_TRAP_ENABLE_DZE | IEEE_TRAP_ENABLE_OVF); sw |= (~fp >> 57) & (IEEE_TRAP_ENABLE_UNF | IEEE_TRAP_ENABLE_INE); sw |= (fp >> 47) & IEEE_MAP_UMZ; sw |= (~fp >> 41) & IEEE_TRAP_ENABLE_DNO; return sw; } #ifdef __KERNEL__ /* The following two functions don't need trapb/excb instructions around the mf_fpcr/mt_fpcr instructions because (a) the kernel never generates arithmetic faults and (b) call_pal instructions are implied trap barriers. */ static inline unsigned long rdfpcr(void) { unsigned long tmp, ret; #if defined(__alpha_cix__) || defined(__alpha_fix__) __asm__ __volatile__ ( "ftoit $f0,%0\n\t" "mf_fpcr $f0\n\t" "ftoit $f0,%1\n\t" "itoft %0,$f0" : "=r"(tmp), "=r"(ret)); #else __asm__ __volatile__ ( "stt $f0,%0\n\t" "mf_fpcr $f0\n\t" "stt $f0,%1\n\t" "ldt $f0,%0" : "=m"(tmp), "=m"(ret)); #endif return ret; } static inline void wrfpcr(unsigned long val) { unsigned long tmp; #if defined(__alpha_cix__) || defined(__alpha_fix__) __asm__ __volatile__ ( "ftoit $f0,%0\n\t" "itoft %1,$f0\n\t" "mt_fpcr $f0\n\t" "itoft %0,$f0" : "=&r"(tmp) : "r"(val)); #else __asm__ __volatile__ ( "stt $f0,%0\n\t" "ldt $f0,%1\n\t" "mt_fpcr $f0\n\t" "ldt $f0,%0" : "=m"(tmp) : "m"(val)); #endif } static inline unsigned long swcr_update_status(unsigned long swcr, unsigned long fpcr) { /* EV6 implements most of the bits in hardware. Collect the acrued exception bits from the real fpcr. */ if (implver() == IMPLVER_EV6) { swcr &= ~IEEE_STATUS_MASK; swcr |= (fpcr >> 35) & IEEE_STATUS_MASK; } return swcr; } extern unsigned long alpha_read_fp_reg (unsigned long reg); extern void alpha_write_fp_reg (unsigned long reg, unsigned long val); extern unsigned long alpha_read_fp_reg_s (unsigned long reg); extern void alpha_write_fp_reg_s (unsigned long reg, unsigned long val); #endif /* __KERNEL__ */ #endif /* __ASM_ALPHA_FPU_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-10 07:41:11 -0400