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* MIPS: Remove useless zero initializations.Ralf Baechle2009-09-17
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.Ralf Baechle2009-06-24
| | | | | | | | | Some of the were relying into smp.h being dragged in by another header which of course is fragile. <asm/cpu-info.h> uses smp_processor_id() only in macros and including smp.h there leads to an include loop, so don't change cpu-info.h. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: TLB support for hugetlbfs.David Daney2009-06-17
| | | | | | | | | | | | | | | | | The TLB handlers need to check for huge pages and give them special handling. Huge pages consist of two contiguous sub-pages of physical memory. * Loading entrylo0 and entrylo1 need to be handled specially. * The page mask must be set for huge pages and then restored after writing the TLB entries. * The PTE for huge pages resides in the PMD, we halt traversal of the tables there. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: 64-bit: Fix system lockup.Greg Ungerer2009-05-20
| | | | | | | | | | | | | | | | The address range size calculation inside local_flush_tlb_kernel_range() is being truncated by a too small size variable holder on 64-bit systems. The truncated size can result in an erroneous tlbsize check that means we sit spinning inside a loop trying to flush a hige number of TLB entries. This is for all intents and purposes a system hang. Fix by using an appropriately sized valiable to hold the size. [Ralf: Greg's original patch submission identified the issue and fixed one instance in tlb-r4k.c but there there were several more. For consistency I also modified tlb-r3k.c even though that file is only used on 32-bit.] Signed-off-by: Greg Ungerer <gerg@snapgear.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Only write c0_framemask on CPUs which have this register.Ralf Baechle2009-01-11
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] All MIPS32 processors support64-bit physical addresses.Chris Dearman2008-04-28
| | | | | | | Still, only the 4K may actually implement it. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix loads of section missmatchesRalf Baechle2008-03-12
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix typo in commentThiemo Seufer2008-03-12
| | | | | | | We support now other page sizes as well. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle2007-10-11
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2Fuxin Zhang2007-07-10
| | | | | Signed-off-by: Fuxin Zhang <zhangfx@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Delete duplicate call to load_irq_save.Ralf Baechle2007-01-18
| | | | | | | This call may have resulted to local_tlb_flush_range returning with interrupts disabled resulting in excessive interrupt latency. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Replace BARRIER with more appropriate hazard barrier.Ralf Baechle2006-09-27
| | | | | | This is the unchanged part 2 of Chris' hazard cleanup. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Remove obsolete #include <linux/config.h>Jörn Engel2006-06-30
| | | | | Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* [MIPS] Remove prototype for non-existing function.Ralf Baechle2006-06-19
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] MT: Improved multithreading support.Ralf Baechle2006-04-18
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Kill tlb-andes.c.Thiemo Seufer2006-03-21
| | | | | | | Basically identical to c-r4k.c, so maintaining one is really enough. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.Ralf Baechle2005-10-29
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Fix race conditions for read_c0_entryhi. Remove broken ASID masks inThiemo Seufer2005-10-29
| | | | | | | tlb-sb1.c. Make tlb-r4k.c and tlb-sb1.c more similiar and more efficient. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Update MIPS to use the 4-level pagetable code thereby getting rid ofRalf Baechle2005-10-29
| | | | | | the compacrapability headers. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Formatting fixes.Maciej W. Rozycki2005-10-29
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-16
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!