Commit message (Expand) | Author | Age | |
---|---|---|---|
* | [MIPS] Allow hardwiring of the CPU type to a single type for optimization. | Ralf Baechle | 2007-10-11 |
* | [MIPS] TX39: Remove redundant tx39_blast_icache() calls | Atsushi Nemoto | 2007-03-06 |
* | [MIPS] Remove __flush_icache_page | Atsushi Nemoto | 2006-10-01 |
* | [MIPS] Retire flush_icache_page from mm use. | Ralf Baechle | 2006-09-27 |
* | [MIPS] Handle IDE PIO cache aliases on SMP. | Ralf Baechle | 2006-04-18 |
* | [MIPS] local_r4k_flush_cache_page fix | Atsushi Nemoto | 2006-03-18 |
* | [MIPS] Add protected_blast_icache_range, blast_icache_range, etc. | Atsushi Nemoto | 2006-02-14 |
* | Cleanup the mess in cpu_cache_init. | Ralf Baechle | 2005-10-29 |
* | Sync c-tx39.c with c-r4k.c. | Atsushi Nemoto | 2005-10-29 |
* | Avoid SMP cacheflushes. This is a minor optimization of startup but | Ralf Baechle | 2005-10-29 |
* | Update MIPS to use the 4-level pagetable code thereby getting rid of | Ralf Baechle | 2005-10-29 |
* | Linux-2.6.12-rc2v2.6.12-rc2 | Linus Torvalds | 2005-04-16 |