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* MIPS: Build uasm-generated code only once to avoid CPU Hotplug problemHuacai Chen2013-05-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This and the next patch resolve memory corruption problems while CPU hotplug. Without these patches, memory corruption can triggered easily as below: On a quad-core MIPS platform, use "spawn" of UnixBench-5.1.3 (http:// code.google.com/p/byte-unixbench/) and a CPU hotplug script like this (hotplug.sh): while true; do echo 0 >/sys/devices/system/cpu/cpu1/online echo 0 >/sys/devices/system/cpu/cpu2/online echo 0 >/sys/devices/system/cpu/cpu3/online sleep 1 echo 1 >/sys/devices/system/cpu/cpu1/online echo 1 >/sys/devices/system/cpu/cpu2/online echo 1 >/sys/devices/system/cpu/cpu3/online sleep 1 done Run "hotplug.sh" and then run "spawn 10000", spawn will get segfault after a few minutes. This patch: Currently, clear_page()/copy_page() are generated by Micro-assembler dynamically. But they are unavailable until uasm_resolve_relocs() has finished because jump labels are illegal before that. Since these functions are shared by every CPU, we only call build_clear_page()/ build_copy_page() only once at boot time. Without this patch, programs will get random memory corruption (segmentation fault, bus error, etc.) while CPU Hotplug (e.g. one CPU is using clear_page() while another is generating it in cpu_cache_init()). For similar reasons we modify build_tlb_refill_handler()'s invocation. V2: 1, Rework the code to make CPU#0 can be online/offline. 2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU need a per-CPU tlb_refill_handler(). Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongbing Hu <huhb@lemote.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4994/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: Whitespace cleanup.Ralf Baechle2013-02-01
| | | | | | | | Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle2012-12-13
| | | | | | | Nobody seems to be interested anymore and upstream also never had an ethernet driver. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.Ralf Baechle2012-10-11
| | | | | | | | Most supported systems currently hardwire cpu_has_dsp to 0, so we also can disable support for cpu_has_dsp2 resulting in a slightly smaller kernel. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 2: Sort out clock managment.Ralf Baechle2012-08-01
| | | | | | | For unexplainable reasons the Loongson 2 clock API was implemented in a module so fixing this involved shifting large amounts of code around. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: loongson: use IS_ENABLED()Florian Fainelli2012-07-23
| | | | | | | Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3336/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Remove pointless return statement from empty void functions.Ralf Baechle2011-07-25
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> To: Sergei Shtylyov <sshtylyov@mvista.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2391/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Fix common misspellingsLucas De Marchi2011-03-31
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* MIPS: Add missing #inclusions of <linux/irq.h>David Howells2010-10-07
| | | | | | | | | | | | | | Add missing #inclusions of <linux/irq.h> to a whole bunch of files that should really include it. Note that this can replace #inclusions of <asm/irq.h>. This is required for the patch to sort out irqflags handling function naming to compile on MIPS. The problem is that these files require access to things like setup_irq() - which isn't available by #including <linux/interrupt.h> Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Oprofile: add a new do_perfcnt_IRQ()Wu Zhangjin2010-08-05
| | | | | | | | | | | | | | On FuLoong-2F IP6 is shared by the performance counter overflow interrupt and the Bonito northbridge interrupt. To reduce overhead only call do_IRQ() when oprofile is enabled to reduce overhead. This patch adds an inline function do_perfcnt_IRQ() to hide the #if's , which can be shared by the other Loongson machines, i.e. gdium. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1492/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Remove set_irq_trigger_mode()Wu Zhangjin2010-08-05
| | | | | | | | | | | | | set_irq_trigger_mode() is not needed on all platforms so remove it and move the related source code to mach_init_irq(). This will allow gdium to share the common irq.c without adding an empty set_irq_trigger_mode(). Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1493/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 2F: Add gpio/gpioilb supportArnaud Patard2010-05-21
| | | | | | | Signed-off-by: Arnaud Patard <apatard@mandriva.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1163/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: update cpu-feature-overrides.hWu Zhangjin2010-05-21
| | | | | | | | | | | Loongson doesn't support MIPSR2, therefore, MIPSR2 vectored interrupts (cpu_has_vint) and MIPSR2 external interrupt controller mode (cpu_has_veic) are 0. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1112/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Fix LOONGSON_ADDRWIN_CFG macro.Arnaud Patard2010-04-30
| | | | | | | | | | | | There's a typo in the LOONGSON_ADDRWIN_CFG macro. The cpu window mmap register address should contain the destination parameters not the source one. This has not been noticed because the code is only using source = destination. Signed-off-by: Arnaud Patard <apatard@mandriva.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1162/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Change the Email address of Wu ZhangjinWu Zhangjin2010-02-27
| | | | | | | | | | | | Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/829/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Cleanup of the environment variablesWu Zhangjin2010-02-27
| | | | | | | | | | | | | | | | | Changes: o Move bus_clock into prom_init_env() o Initialize the cpu_clock_freq to the default values for the correspoding processor revisions if no such environment variable passed by BIOS/Bootloader. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/826/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Cleanups of serial port supportWu Zhangjin2009-12-16
| | | | | | | | | | | This patchs uses a loongson_uart_base variable instead of the uart_base[] array and adds a new kernel option to avoid to compile uart_base.c all the time, which will save a little bit of memory for us. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org http://patchwork.linux-mips.org/patch/727/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Yeeloong 2F: Add LID open event as the wakeup eventWu Zhangjin2009-12-16
| | | | | | | | | | | | | | Yeeloong 2F netbook has an KB3310B embedded controller to manage the LID action. When the LID is closed or opened a SCI interrupt is sent out and the corresponding event is saved to an EC register for later query. Allow the LID open interrupt to wake the processor from wait mode if it is in the suspend mode. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/685/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 2F: Add CPU frequency scaling supportWu Zhangjin2009-12-16
| | | | | | | | | | | | | | | | | | | | Loongson 2F supports CPU clock scaling. When put it into wait mode by setting the frequency as ZERO it will stay in this mode until an external interrupt wakes the CPU again. To enable clock scaling support, an external timer of a known stable rate is required. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: cpufreq@vger.kernel.org, Cc: Dave Jones <davej@redhat.com>, Cc: Dominik Brodowski <linux@dominikbrodowski.net>, Cc: yanh@lemote.com Cc: huhb@lemote.com, Patchwork: http://patchwork.linux-mips.org/patch/660/ Patchwork: http://patchwork.linux-mips.org/patch/751/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lemote 2F: Add cs5536 MFGPT timer supportWu Zhangjin2009-12-16
| | | | | | | | | | | | | | | | | | | | CPUFreq support for Loongson 2F requires an external timer. Because the frequency of the MIPS Timer is related to the CPU frequency which itself is variable another timer of constant frequency is required. Export the mfgpt0 counter disable / enable operations for the coming suspend support to suspend / resume the timer. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: cpufreq@vger.kernel.org, Cc: Dave Jones <davej@redhat.com>, Cc: Dominik Brodowski <linux@dominikbrodowski.net>, Cc: yanh@lemote.com Cc: huhb@lemote.com, Patchwork: http://patchwork.linux-mips.org/patch/658/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 2F: Cleanup the #if clausesWu Zhangjin2009-12-16
| | | | | | | | | | | | | | This patch adds two new kernel options: CPU_SUPPORTS_CPUFREQ and CPU_SUPPORTS_ADDRWINCFG to describe the new features of Loongons 2F and replaces the several ugly #if clauses by them. These two options will be utilized by the future loongson revisions and related drivers such as the coming Loongson 2F CPUFreq driver. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lemote 2F: Add reset supportWu Zhangjin2009-12-16
| | | | | | | | | | | | | | | Fuloong 2F, Yeeloong 2F and Menglong 2F have different reset / shutdown logic. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: zhangfx@lemote.com Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: Nicholas Mc Guire <hofrat@hofr.at> Cc: Arnaud Patard <apatard@mandriva.com> Cc: loongson-dev@googlegroups.com Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lemote 2F: Add basic CS5536 VSM supportWu Zhangjin2009-12-16
| | | | | | | | | | | | | | | | | | | Lemote Loongson 2F family machines use CS5536 as their south bridge and need these lowlevel interfaces to access the devices on CS5536. Virtualize the legacy devices on CS5536 as PCI devices. This way users can access the CS5536 PCI config space directly as a normal multi-function PCI 2.2 device. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: zhangfx@lemote.com Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: Nicholas Mc Guire <hofrat@hofr.at> Cc: Arnaud Patard <apatard@mandriva.com> Cc: loongson-dev@googlegroups.com Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lemote 2F: Add a LEMOTE_MACH2F kernel optionWu Zhangjin2009-12-16
| | | | | | | | | | | | | | | | | | | | Add a new kernel option for Lemote Loongson 2F family machines. Lemote loongson2f family machines utilize the 2f revision of loongson processor and the AMD CS5536 south bridge. Family members include Fuloong 2F mini PC, Yeeloong 2F notebook, LingLoong all-in-one PC and others. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: zhangfx@lemote.com Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: Nicholas Mc Guire <hofrat@hofr.at> Cc: Arnaud Patard <apatard@mandriva.com> Cc: loongson-dev@googlegroups.com Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add basic Loongson 2F supportWu Zhangjin2009-12-16
| | | | | | | | | | | | | | | | | | | | | | | | | Loongson 2F has built-in DDR2 and PCI-X controller. The PCI-X controller has a programming interface similiar to the the FPGA northbridge used on Loongson 2E. The main differences between Loongson 2E and Loongson 2F include: 1. Loongson 2F has an extra address window configuration module, which is used to map CPU address space to DDR or PCI address space, or map the PCI-DMA address space to DDR or LIO address space. 2. Loongson 2F supports 8 levels of software configurable CPu frequency which can be configured in the LOONGSON_CHIPCFG0 register. The coming cpufreq and standby support are based on this feature. Loongson.h abstracts the modules and corresponding methods are abstracted. Add other Loongson-2F-specific source code including gcc 4.4 support, PCI memory space, PCI IO space, DMA address. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Cleanup the serial port supportWu Zhangjin2009-12-16
| | | | | | | | | | | | | | | | | To share the same kernel image amon different machines we have added the machtype command line support. In the old serial port implementation the UART base address is hardcoded as a macro in machine.h which breaks with machtype, so change that to discover the address dynamically. Also move the initialization of the UART base address to uart_base.c to avoid remapping twice for early_printk.c and serial.c. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/581/ Patchwork: http://patchwork.linux-mips.org/patch/682/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Cleanup machtype supportWu Zhangjin2009-12-16
| | | | | | | | | | To choose code for different machines by the value of machtype it needs to be initialized as early as possible. So move initialization of mips_machtype to prom_init(). Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Bonito64: Make Loongson independent from Bonito64 code.Wu Zhangjin2009-12-16
| | | | | | | | | | | | | | | | | | The built-in Loongson 2E/2F northbridge in is bonito64-compatible but not identical with it. To avoid influencing the original bonito64 support and make the loongson support more maintainable, it's better to separate the Bonito64 code from the Loongson code. This also prepares the kernel for the coming Loongson 2f machines family support. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: Zhang Le <r0bertz@gentoo.org> Cc: zhangfx@lemote.com, Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_storeZhang Le2009-11-02
| | | | | | | | | | Loongson 2 does not have dcache aliases when is using 16k pages. and the And because Loongson 2 doesn't do SMP , cpu_icache_snoops_remote_store does not matter here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add a machtype kernel command line argumentWu Zhangjin2009-09-17
| | | | | | | | | | | | | | | | | The difference between some loongson-based machines is very small, so, if there is no necessary to add new kernel config options to cope with this difference, it will be better to share the same kernel image file between them, benefit from this, the linux distribution developers only have a need to compile the kernel one time. This machtype kernel command line argument will be used later to share the same kernel image file between two different machines(menglong & yeeloong) made by lemote. Thanks very much to Zhang Le for cleaning up the machtype implementation. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Split common loongson source code outWu Zhangjin2009-09-17
| | | | | | | | | | | To share common loongson source code between all of the loongson-based machines. there is a need to split it out of the fuloong-2e/ directory. at the same time, other according tuning is needed. the machine-specific parts are defined as macros in relative header file, pci.h, mem.h, machine.h. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Change naming methodsWu Zhangjin2009-09-17
To make source code of loongson sharable to the machines(such as gdium) made by the other companies, we rename arch/mips/lemote to arch/mips/loongson, asm/mach-lemote to asm/mach-loongson, and rename lm2e to the name of the machine: fuloong-2e. accordingly, FULONG are renamed to FULOONG2E to make it distinguishable to the future FULOONG2F. and also, some other relative tuning is needed. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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