aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/ath79/irq.c
Commit message (Collapse)AuthorAge
* MIPS: ath79: add IRQ handling code for the QCA955X SoCsGabor Juhos2013-02-19
| | | | | | | | | | | | | The IRQ routing in the QCA955x SoCs is slightly different from the routing implemented in the already supported SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4955/ Signed-off-by: John Crispin <blogic@openwrt.org>
* ath79: remove ATH79_MISC_IRQ_* definesGabor Juhos2013-02-16
| | | | | | | | Use the ATH79_MISC_IRQ() macro instead. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4930/ Signed-off-by: John Crispin <blogic@openwrt.org>
* ath79: add ATH79_CPU_IRQ() macroGabor Juhos2013-02-16
| | | | | | | | | Remove the individual ATH79_CPU_IRQ_* constants and use the new macro instead of those. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4929/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: ath79: simplify MISC IRQ handlingGabor Juhos2013-02-16
| | | | | | | | | | | | | | | The current code uses multiple if statements for demultiplexing the different interrupt sources. Additionally, the MISC interrupt controller has 32 interrupt sources and the current code does not handles all of them. Get rid of the if statements and process all interrupt sources in a loop to fix these issues. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4874/ Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: ath79: add IRQ handling code for AR934XGabor Juhos2012-05-15
| | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3510/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: rework IP2/IP3 interrupt handlingGabor Juhos2012-05-15
| | | | | | | | | | | | | | | | The current implementation assumes that flushing the DDR writeback buffer is required for IP2/IP3 interrupts, however this is not true for all SoCs. Use SoC specific IP2/IP3 handlers instead of flushing the buffers in the dispatcher code. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3509/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: Add AR933X specific IRQ initializationGabor Juhos2011-12-07
| | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kathy Giori <kgiori@qca.qualcomm.com> Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com> Patchwork: https://patchwork.linux-mips.org/patch/2530/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: Handle more MISC IRQsGabor Juhos2011-12-07
| | | | | | | | | | The AR724X SoCs have more IRQ sources hooked into the MISC IRQ controller. The patch adds support for them. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2440/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Convert the irq functions to the new namesThomas Gleixner2011-03-29
| | | | | | Scripted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* MIPS: ath79: Convert to new irq_chip functionsThomas Gleixner2011-03-25
| | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2175/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Remove useless initialization.Ralf Baechle2011-03-25
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCsGabor Juhos2011-01-18
This patch adds initial support for various Atheros SoCs based on the MIPS 24Kc core. The following models are supported at the moment: - AR7130 - AR7141 - AR7161 - AR9130 - AR9132 - AR7240 - AR7241 - AR7242 The current patch contains minimal support only, but the resulting kernel can boot into user-space with using of an initramfs image on various boards which are using these SoCs. Support for more built-in devices and individual boards will be implemented in further patches. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Cc: Kathy Giori <Kathy.Giori@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1947/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-10 00:54:24 -0400