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* MIPS: Idle: Consolidate all declarations in <asm/idle.h>.Ralf Baechle2013-05-21
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Kconfig: remove "config MIPS_DISABLE_OBSOLETE_IDE"Paul Bolle2013-05-07
| | | | | | | | | | | | | | | | | | The Kconfig symbol MIPS_DISABLE_OBSOLETE_IDE was added in v2.6.10. It has never been used. Let's remove it. The symbol was originally introduced by the following commit commit 2bfa662b64a7ee593f3039c1d3fd81a7766a63cd Author: Pete Popov <ppopov@embeddedalley.com> Date: Tue Oct 12 06:24:19 2004 +0000 - Db1550 bug fixes - updated defconfig - updated Kconfig to use DMA_COHERENT since new silicon is coherent Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Patchwork: http://patchwork.linux-mips.org/patch/5064/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: remove obsolete Kconfig macrosPaul Bolle2013-05-07
| | | | | | | | | | | | | | | | | | The support for PB1100, PB1500, and PB1550 got merged into the code for DB1000 and DB1550 code in v3.7. When that was done the three related Kconfig symbols were dropped. But not all related Kconfig macros were removed. Do so now. Note that the PB1100 code in the Au1100 LCD driver is removed entirely and not converted to use its current Kconfig macro. That is done because the macros it uses (PB1100_G_CONTROL, PB1100_G_CONTROL_BL, and PB1100_G_CONTROL_VDD) are never defined. Actually only one of these was ever defined (PB1100_G_CONTROL) but that define was removed in v2.6.34. So, as far as I can tell, this code could have never compiled. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Patchwork: http://patchwork.linux-mips.org/patch/5040/ Acked-by: John Crispin <blogic@openwrt.org>
* MIPS: Whitespace cleanup.Ralf Baechle2013-02-01
| | | | | | | | Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Make 32kHz and r4k timer coexist peacefullyManuel Lauss2012-12-27
| | | | | | | | | | | | | | | | Now that the r4k timer is registered no matter what, bump the rating of the Alchemy 32kHz timer so that it gets used when it is working, and fall back on the r4k when it isn't. This fixes a timer-related hang on platform with a working 32kHz timer (the better rated c0 timer stops while executing 'wait' leading to (almost) eternal sleep) and an oops on boot on platforms without a working 32kHz timer (due to double registration of the r4k timer). Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/4728/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* USB: move common alchemy USB routines to arch/mips/alchemy/common.cFlorian Fainelli2012-10-22
| | | | | | | | | | | | A previous patch converted the Alchemy platform to use the OHCI and EHCI platform drivers. As a result, all the common logic to handle USB present in drivers/usb/host/alchemy-common.c has no reason to remain here, so we move it to arch/mips/alchemy/common/usb.c which is a more appropriate place. This change was suggested by Manuel Lauss. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* MIPS: Alchemy: use the OHCI platform driverFlorian Fainelli2012-10-22
| | | | | | | | | | | | | | | | | Convert the Alchemy platform to register the ohci-platform driver, now that the ohci-platform driver properly handles the specific ohci-au1xxx resume from suspend case. This also greatly simplifies the power_{on,off} callbacks and make them work on platform device id instead of checking the OHCI controller base address like what was done in ohci-au1xxx.c. Impacted defconfigs are also updated accordingly to select the OHCI platform driver. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* MIPS: Alchemy: use the ehci platform driverFlorian Fainelli2012-10-22
| | | | | | | | | | | Use the ehci platform driver power_{on,suspend,off} callbacks to perform the USB block gate enabling/disabling as what the ehci-au1xxx.c driver does. Update the db1200 and db1300 defconfigs to now select the EHCI platform driver. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* MIPS: Alchemy: Merge PB1100/1500 support into DB1000 code.Manuel Lauss2012-10-11
| | | | | | | | | | | | | The PB1100/1500 are similar to their DB-cousins but with a few more devices on the bus. This patch adds PB1100/1500 support to the existing DB1100/1500 code. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: lnux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4338/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: merge PB1550 support into DB1550 codeManuel Lauss2012-10-11
| | | | | | | | | | | | | | The PB1550 is more or less a DB1550 without the PCI IDE controller, a more complicated (read: configurable) Flash setup and some other minor changes. Like the DB1550 it can be automatically detected by reading the CPLD ID register bits. This patch adds PB1550 detection and setup to the DB1550 code. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4337/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Single kernel for DB1200/1300/1550Manuel Lauss2012-10-11
| | | | | | | | | | | | Combine support for the DB1200/PB1200, DB1300 and DB1550 boards into a single kernel image. defconfig-generated image verified on DB1200, DB1300 and DB1550. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4335/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTX-1: Add udelay to mtx1_pci_idselBruno Randolf2012-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this udelay(1) PCI idsel does not work correctly on the "singleboard" (T-Mobile Surfbox) for the MiniPCI device. The result is that PCI configuration fails and the MiniPCI card is not detected correctly. Instead of PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff] pci_bus 0000:00: root bus resource [io 0x1000-0xffff] pci 0000:00:03.0: BAR 0: assigned [mem 0x40000000-0x4000ffff] pci 0000:00:00.0: BAR 0: assigned [mem 0x40010000-0x40010fff] pci 0000:00:00.1: BAR 0: assigned [mem 0x40011000-0x40011fff] We see only the CardBus device: PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff] pci_bus 0000:00: root bus resource [io 0x1000-0xffff] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x40000fff] pci 0000:00:00.1: BAR 0: assigned [mem 0x40001000-0x40001fff] Later the device driver shows this error: ath5k 0000:00:03.0: cannot remap PCI memory region ath5k: probe of 0000:00:03.0 failed with error -5 I assume that the logic chip which usually supresses the signal to the CardBus card has some settling time and without the delay it would still let the Cardbus interfere with the response from the MiniPCI card. What I cannot explain is why this behaviour shows up now and not in earlier kernel versions before. Maybe older PCI code was slower? Signed-off-by: Bruno Randolf <br1@einfach.org> Cc: linux-mips@linux-mips.org Cc: manuel.lauss@googlemail.com Cc: florian@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/4087/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
*-. Merge branches 'next/generic', 'next/alchemy', 'next/bcm63xx', ↵Ralf Baechle2012-07-25
|\ \ | | | | | | | | | 'next/cavium', 'next/jz4740', 'next/lantiq', 'next/loongson1b' and 'next/netlogic' into mips-for-linux-next
| | * MIPS: Alchemy: handle db1200 cpld ints as they come inManuel Lauss2012-07-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the loop in the cascade handler and instead unconditionally handle just the first set interrupt coming from the CPLD. This gets rid of a lot of spurious interrupts being triggered for the SMSC91111 ethernet chip especially under high(er) IDE load: "eth0: spurious interrupt (mask = 0xb3)" Verified on DB1200 and DB1300. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3288/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: Alchemy: devboards: kill prom.cManuel Lauss2012-07-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | move contents to already existing platform.c file. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3287/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * MIPS: Alchemy: use 64MB RAM as minimum for devboardsManuel Lauss2012-07-23
| |/ |/| | | | | | | | | | | | | | | | | | | YAMON on all devboards provides the "memsize" envvar; in the unlikely case that it can't be parsed just assume 64MB, which all boards have at least. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3286/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Use kmemdup rather than duplicating its implementationThomas Meyer2012-07-23
| | | | | | | | | | | | | | | | | | | | | | The semantic patch that makes this change is available in scripts/coccinelle/api/memdup.cocci. Signed-off-by: Thomas Meyer <thomas@m3y3r.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3058/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: use IS_ENABLED() macroFlorian Fainelli2012-07-23
|/ | | | | | | Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3331/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtdLinus Torvalds2012-06-01
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull mtd update from David Woodhouse: - More robust parsing especially of xattr data in JFFS2 - Updates to mxc_nand and gpmi drivers to support new boards and device tree - Improve consistency of information about ECC strength in NAND devices - Clean up partition handling of plat_nand - Support NAND drivers without dedicated access to OOB area - BCH hardware ECC support for OMAP - Other fixes and cleanups, and a few new device IDs Fixed trivial conflict in drivers/mtd/nand/gpmi-nand/gpmi-nand.c due to added include files next to each other. * tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtd: (75 commits) mtd: mxc_nand: move ecc strengh setup before nand_scan_tail mtd: block2mtd: fix recursive call of mtd_writev mtd: gpmi-nand: define ecc.strength mtd: of_parts: fix breakage in Kconfig mtd: nand: fix scan_read_raw_oob mtd: docg3 fix in-middle of blocks reads mtd: cfi_cmdset_0002: Slight cleanup of fixup messages mtd: add fixup for S29NS512P NOR flash. jffs2: allow to complete xattr integrity check on first GC scan jffs2: allow to discriminate between recoverable and non-recoverable errors mtd: nand: omap: add support for hardware BCH ecc ARM: OMAP3: gpmc: add BCH ecc api and modes mtd: nand: check the return code of 'read_oob/read_oob_raw' mtd: nand: remove 'sndcmd' parameter of 'read_oob/read_oob_raw' mtd: m25p80: Add support for Winbond W25Q80BW jffs2: get rid of jffs2_sync_super jffs2: remove unnecessary GC pass on sync jffs2: remove unnecessary GC pass on umount jffs2: remove lock_super mtd: gpmi: add gpmi support for mx6q ...
| * mips: Use the plat_nand default partition parserH Hartley Sweeten2012-05-13
| | | | | | | | | | | | | | | | Use the default partition parser, cmdlinepart, provided by the plat_nand driver. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* | MIPS: Fix several implicit uses of export.h/module.hPaul Gortmaker2012-05-15
|/ | | | | | | | | | | | | | | | | | | | | | These will show up as a build failure once we clean up a misuse of module.h in the mips termios header. Uses export.h: (EXPORT_SYMBOL) arch/mips/cavium-octeon/setup.c arch/mips/pmc-sierra/yosemite/setup.c arch/mips/rb532/devices.c arch/mips/sni/setup.c Uses module.h: (symbol_get/put) arch/mips/alchemy/devboards/db1200.c Uses module.h: (print_modules) arch/mips/kernel/traps.c Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3448/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Alchemy: Increase minimum timeout for 32kHz timer.Manuel Lauss2012-02-20
| | | | | | | | | | | | | | | | | | | | | Since a clocksource change post 3.2-rc1, tasks on my DB1500 board hang after random amounts of time (from a few minutes to a few hours), regardless of load. Debugging showed that the compare-match register value is a few seconds lower than the current counter value. The minimum value of 8 was initialy determined by a trial-and-error approach. Currently it is sufficient for all Alchemys (without PCI apparently), independent of CPU clock; only the DB1500 and DB1550 boards experience these timer-related tasks hangs now. This patch increases the minimum timeout by 1 (to 9 counter ticks) which seems sufficient since the systems are still working perfectly fine after over 24 hours. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3214/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'next/alchemy' into mips-for-linux-nextRalf Baechle2012-01-11
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| * MIPS: Alchemy: db1200: Improve PB1200 detection.Manuel Lauss2011-12-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PB1200 has the CPLD located at an address which on the DB1200 is RAM; reading the Board-ID sometimes results in a PB1200 being detected instead (especially during reboots after long uptimes). On the other hand, the address of the DB1200's CPLD is hosting Flash chips on the PB1200. Test for the DB1200 first and additionally do a quick write-test to the hexleds register to make sure we're writing to the CPLD. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3005/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.Manuel Lauss2011-12-08
| | | | | | | | | | | | | | | | | | | | | | With a generic plat_irq_dispatch (for Alchemy at least) code for both interrupt controller types can coexist in a single kernel image and be autodetected at runtime. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2935/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controllerManuel Lauss2011-12-08
| | | | | | | | | | | | | | | | | | IC and GPIC are now chain handlers of the traditional MIPS IRQ controller. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2933/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: irq: register pm at irq init timeManuel Lauss2011-12-08
| | | | | | | | | | | | | | | | | | No need for a device_initcall. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2934/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Touchscreen support on DB1100Manuel Lauss2011-12-08
| | | | | | | | | | | | | | | | | | Wire up the ADS7846 touchscreen controller on the DB1100. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2879/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Hook up IrDA on DB1000/DB1100Manuel Lauss2011-12-08
| | | | | | | | | | | | | | | | | | | | Add necessary transceiver control platform data and hook up the IrDA peripheral on the DB1000 and DB1100 boards. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2878/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: remove unused board headersManuel Lauss2011-12-08
| | | | | | | | | | | | | | | | | | The information in those headers is no longer necessary. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2876/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MTD: nand: make au1550nd.c a platform_driverManuel Lauss2011-12-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Transform the au1550nd.c driver into a platform_driver and hook it up in the PB1550 board (gen_nand works fine on the DB1550, but since I don't have a PB1550 to test this driver stays for now). Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mtd@lists.infradead.org To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2875/ Patchwork: https://patchwork.linux-mips.org/patch/3160/ Acked-by: Artem Bityutskiy <dedekind1@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Add RTC device to all devboardsManuel Lauss2011-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | All Devboards can use the 32kHz counter as a RTC device. Also delete the custom CMOS RTC header, which can be used for the DS1693 on the PB1500. But since it doesn't have a buffer battery it is as useful as the on-chip RTC which I prefer. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2874/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: MMC for DB1100Manuel Lauss2011-12-07
| | | | | | | | | | | | | | | | | | | | This patch hooks up the 2 MMC sockets on the DB1100 board. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2873/ Patchwork: https://patchwork.linux-mips.org/patch/2920/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: one kernel for DB1000/DB1500/DB1100Manuel Lauss2011-12-07
| | | | | | | | | | | | | | | | | | | | | | | | These 3 boards are very similar; with this patch a single kernel image which runs on all three can be built. Tested on DB1500 and DB1100. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2872/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Merge PB1200 support into DB1200 code.Manuel Lauss2011-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PB1200 is basically a DB1200 with additional MMC and camera sockets and different base addresses for external hardware (CPLD, IDE, Net, NAND). This patch implements the missing PB1200 features in DB1200 support code and runtime board detection. Tested on DB1200 only. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2880/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: move au1200fb global functions to platform dataManuel Lauss2011-12-07
| | | | | | | | | | | | | | | | | | | | | | au1200fb calls 3 functions which have to be defined in board code. Fix this ugliness with the introduction of platform_data. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-fbdev@vger.kernel.org To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2871/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: merge devboard code into single per-board files.Manuel Lauss2011-12-07
| | | | | | | | | | | | | | Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2884/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: merge GPR/MTX-1/XXS1500 board code into single filesManuel Lauss2011-12-07
| | | | | | | | | | | | | | | | | | | | Most of these files are have more comments than real code; merge them all into single board-<name>.c files. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2869/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Improved DB1550 support, with audio and serial busses.Manuel Lauss2011-12-07
| | | | | | | | | | | | | | Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2868/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Basic support for the DB1300 board.Manuel Lauss2011-12-07
| | | | | | | | | | | | | | | | | | Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2867/ Patchwork: https://patchwork.linux-mips.org/patch/2919/ Patchwork: https://patchwork.linux-mips.org/patch/2928/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Au1300 SoC supportManuel Lauss2011-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic support for the Au1300 variant(s): - New GPIO/Interrupt controller - DBDMA ids - USB setup - MMC support - enable various PSC drivers - detection code. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2866/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: devboards: remove unneeded BCSR IRQ reg accManuel Lauss2011-12-07
| | | | | | | | | | | | | | | | | | | | | | | | Initially I had to write to both the MASK and ENABLE registers, otherwise the CPLD would generate tons of spurious interrupts. With the change to the demux handler to disable the muxed line, it is now sufficient to disable the interrupt by writing either the enable or mask register. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2865/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Drop MIRAGE/BOSPORUS board supportManuel Lauss2011-12-07
| | | | | | | | | | | | | | | | | | | | | | | | No test hardware and no (apparent) users. These boards seem very similar to the DB1500, so if required support can be brought back again (I have datasheets) but then with dedicated board code, not tacked on to DB1000 support. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2864/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: remove PB1000 supportManuel Lauss2011-12-07
| | | | | | | | | | | | | | | | | | | | | | | | Noone seems to have test hardware or care anymore. Drop PB1000 support and along with it the old Alchemy PCMCIA socket driver. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: linux-pcmcia@lists.infradead.org Patchwork: https://patchwork.linux-mips.org/patch/2881/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: irq: Remove IRQF_DISABLEDYong Zhang2011-12-07
|/ | | | | | | | | | | | | | | | | | | | Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled], We run all interrupt handlers with interrupts disabled and we even check and yell when an interrupt handler returns with interrupts enabled (see commit [b738a50a: genirq: Warn when handler enables interrupts]). So now this flag is a NOOP and can be removed. [ralf@linux-mips.org: Fixed up conflicts in arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and arch/mips/kernel/perf_event.c.] Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> To: linux-kernel@vger.kernel.org Cc: tglx@linutronix.de linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2835/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2011-11-03
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (37 commits) MIPS: O32: Provide definition of registers ta0 .. ta3. MIPS: perf: Add Octeon support for hardware perf. MIPS: perf: Add support for 64-bit perf counters. MIPS: perf: Reorganize contents of perf support files. MIPS: perf: Cleanup formatting in arch/mips/kernel/perf_event.c MIPS: Add accessor macros for 64-bit performance counter registers. MIPS: Add probes for more Octeon II CPUs. MIPS: Add more CPU identifiers for Octeon II CPUs. MIPS: XLR, XLS: Add comment for smp setup MIPS: JZ4740: GPIO: Check correct IRQ in demux handler MIPS: JZ4740: GPIO: Simplify IRQ demuxer MIPS: JZ4740: Use generic irq chip MIPS: Alchemy: remove all CONFIG_SOC_AU1??? defines MIPS: Alchemy: kill au1xxx.h header MIPS: Alchemy: clean DMA code of CONFIG_SOC_AU1??? defines MIPS, IDE: Alchem, au1xxx-ide: Remove pb1200/db1200 header dep MIPS: Alchemy: Redo PCI as platform driver MIPS: Alchemy: more base address cleanup MIPS: Alchemy: rewrite USB platform setup. MIPS: Alchemy: abstract USB block control register access ... Fix up trivial conflicts in: arch/mips/alchemy/devboards/db1x00/platform.c drivers/ide/Kconfig drivers/mmc/host/au1xmmc.c drivers/video/Kconfig sound/mips/Kconfig
| * MIPS: Alchemy: remove all CONFIG_SOC_AU1??? definesManuel Lauss2011-10-24
| | | | | | | | | | | | | | | | | | | | | | | | | | Now that no driver any longer depends on the CONFIG_SOC_AU1??? symbols, it's time to get rid of them: Move some of the platform devices to the boards which can use them, Rename a few (unused) constants in the header, Replace them with MIPS_ALCHEMY in the various Kconfig files. Finally delete them altogether from the Alchemy Kconfig file. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2707/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: kill au1xxx.h headerManuel Lauss2011-10-24
| | | | | | | | | | | | | | | | | | | | | | No longer required Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2705/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/include/asm/mach-au1x00/au1xxx.h
| * MIPS: Alchemy: clean DMA code of CONFIG_SOC_AU1??? definesManuel Lauss2011-10-24
| | | | | | | | | | | | | | | | | | | | This patch gets rid of all CONFIG_SOC_AU1XXX defines in DMA/DBDMA-related code. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2704/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS, IDE: Alchem, au1xxx-ide: Remove pb1200/db1200 header depManuel Lauss2011-10-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | au1xxx-ide uses defines from the pb1200/db1200 headers: get DBDMA ID through platform resource information, hardcode register spacing. The only 2 users of this driver (and the only boards it can really work on realiably) use the same register layout. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-ide@vger.kernel.org To: Linux-MIPS <linux-mips@linux-mips.org> Cc: linux-ide@vger.kernel.org Acked-by: David S. Miller <davem@davemloft.net> Patchwork: https://patchwork.linux-mips.org/patch/2716/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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