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* m68k: merge m68k and m68knommu arch directoriesGreg Ungerer2011-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a lot of common code that could be shared between the m68k and m68knommu arch branches. It makes sense to merge the two branches into a single directory structure so that we can more easily share that common code. This is a brute force merge, based on a script from Stephen King <sfking@fdwdc.com>, which was originally written by Arnd Bergmann <arnd@arndb.de>. > The script was inspired by the script Sam Ravnborg used to merge the > includes from m68knommu. For those files common to both arches but > differing in content, the m68k version of the file is renamed to > <file>_mm.<ext> and the m68knommu version of the file is moved into the > corresponding m68k directory and renamed <file>_no.<ext> and a small > wrapper file <file>.<ext> is used to select between the two version. Files > that are common to both but don't differ are removed from the m68knommu > tree and files and directories that are unique to the m68knommu tree are > moved to the m68k tree. Finally, the arch/m68knommu tree is removed. > > To select between the the versions of the files, the wrapper uses > > #ifdef CONFIG_MMU > #include <file>_mm.<ext> > #else > #include <file>_no.<ext> > #endif On top of this file merge I have done a simplistic merge of m68k and m68knommu Kconfig, which primarily attempts to keep existing options and menus in place. Other than a handful of options being moved it produces identical .config outputs on m68k and m68knommu targets I tested it on. With this in place there is now quite a bit of scope for merge cleanups in future patches. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* m68knommu: introduce little-endian bitopsAkinobu Mita2011-03-23
| | | | | | | | | | | | | | | | | Introduce little-endian bit operations by renaming native ext2 bit operations. The ext2 bit operations are kept as wrapper macros using little-endian bit operations to maintain bisectability until the conversions are finished. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Greg Ungerer <gerg@uclinux.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Andreas Schwab <schwab@linux-m68k.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* bitops: introduce CONFIG_GENERIC_FIND_BIT_LEAkinobu Mita2011-03-23
| | | | | | | | | | | | | | | | | | This introduces CONFIG_GENERIC_FIND_BIT_LE to tell whether to use generic implementation of find_*_bit_le() in lib/find_next_bit.c or not. For now we select CONFIG_GENERIC_FIND_BIT_LE for all architectures which enable CONFIG_GENERIC_FIND_NEXT_BIT. But m68knommu wants to define own faster find_next_zero_bit_le() and continues using generic find_next_{,zero_}bit(). (CONFIG_GENERIC_FIND_NEXT_BIT and !CONFIG_GENERIC_FIND_BIT_LE) Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2011-03-16
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (41 commits) m68knommu: external interrupt support to ColdFire intc-simr controller m68knommu: external interrupt support to ColdFire intc-2 controller m68knommu: remove ColdFire CLOCK_DIV config option m68knommu: fix gpio warnings for ColdFire 5407 targets m68knommu: fix gpio warnings for ColdFire 532x targets m68knommu: fix gpio warnings for ColdFire 5307 targets m68knommu: fix gpio warnings for ColdFire 527x targets m68knommu: fix gpio warnings for ColdFire 5272 targets m68knommu: fix gpio warnings for ColdFire 5249 targets m68knommu: fix gpio warnings for ColdFire 523x targets m68knommu: fix gpio warnings for ColdFire 520x targets m68knommu: fix gpio warnings for ColdFire 5206e targets m68knommu: fix gpio warnings for ColdFire 5206 targets m68knommu: fixing compiler warnings m68knommu: limit interrupts supported by ColdFire intc-simr driver m68knommu: move some init code out of unmask routine for ColdFire intc-2 m68knommu: limit interrupts supported by ColdFire intc-2 driver m68knommu: add basic support for the ColdFire based FireBee board m68knommu: make ColdFire internal peripheral region configurable m68knommu: clean up definitions of ColdFire peripheral base registers ...
| * m68knommu: external interrupt support to ColdFire intc-simr controllerGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | The EDGE Port module of some ColdFire parts using the intc-simr interrupt controller provides support for 7 external interrupts. These interrupts go off-chip (that is they are not for internal peripherals). They need some special handling and have some extra setup registers. Add code to support them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: external interrupt support to ColdFire intc-2 controllerGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | The EDGE Port module of some ColdFire parts using the intc-2 interrupt controller provides support for 7 external interrupts. These interrupts go off-chip (that is they are not for internal peripherals). They need some special handling and have some extra setup registers. Add code to support them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove ColdFire CLOCK_DIV config optionGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | The reality is that you do not need the abiltity to configure the clock divider for ColdFire CPUs. It is a fixed ratio on any given ColdFire family member. It is not the same for all ColdFire parts, but it is always the same in a model range. So hard define the divider for each supported ColdFire CPU type and remove the Kconfig option. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 5407 targetsGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/5407/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5407/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5407/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 532x targetsGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/532x/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:51:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:54:3: warning: initialisation makes pointer from integer without a cast ... Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 5307 targetsGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/5307/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5307/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5307/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 527x targetsGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/527x/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:38:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:39:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:54:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:55:3: warning: initialisation makes pointer from integer without a cast ... Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 5272 targetsGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/5272/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:51:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:67:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:68:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:69:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 5249 targetsGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/5249/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:51:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 523x targetsGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/523x/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/523x/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/523x/gpio.c:38:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/523x/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/523x/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast ... Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 520x targetsGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: rch/m68knommu/platform/520x/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/520x/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/520x/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/520x/gpio.c:51:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/520x/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast ... Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 5206e targetsGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/5206e/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast CC kernel/panic.o arch/m68knommu/platform/5206e/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5206e/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 5206 targetsGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/5206/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5206/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5206/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fixing compiler warningsAlexander Kurz2011-03-15
| | | | | | | | | | Signed-off-by: Alexander Kurz <linux@kbdbabel.org> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: limit interrupts supported by ColdFire intc-simr driverGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | The intc-simr interrupt controller on some ColdFire CPUs has a set range of interrupts its supports (64 through 128 or 192 depending on model). We shouldn't be setting this handler for every possible interrupt from 0 to 255. Set more appropriate limits, and this means we can drop the interrupt number check in the mask and unmask routines. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: move some init code out of unmask routine for ColdFire intc-2Greg Ungerer2011-03-15
| | | | | | | | | | | | | | | | Use a proper irq_startup() routine to intialize the interrupt priority and level register in the ColdFire intc-2 controller code. We shouldn't be checking if the priority/level has been set on every unmask operation. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: limit interrupts supported by ColdFire intc-2 driverGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | The intc-2 interrupt controller on some ColdFire CPUs has a set range of interrupts its supports (64 through 128 or 192 depending on model). We shouldn't be setting this handler for every possible interrupt from 0 to 255. Set more appropriate limits, and this means we can drop the interrupt number check in the mask and unmask routines. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: add basic support for the ColdFire based FireBee boardGreg Ungerer2011-03-15
| | | | | | | | | | | | | | The FireBee is a ColdFire 5475 based board. Add a configuration option to support it, and the basic platform flash layout code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: make ColdFire internal peripheral region configurableGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | | | | | Most ColdFire CPUs have an internal peripheral set that can be mapped at a user selectable address. Different ColdFire parts either use an MBAR register of an IPSBAR register to map the peripheral region. Most boards use the Freescale default mappings - but not all. Make the setting of the MBAR or IPSBAR register configurable. And only make the selection available on the appropriate ColdFire CPU types. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: clean up use of MBAR for DRAM registers on ColdFire startGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | | | | | In some of the RAM size autodetection code on ColdFire CPU startup we reference DRAM registers relative to the MBAR register. Not all of the supported ColdFire CPUs have an MBAR, and currently this works because we fake an MBAR address on those registers. In an effort to clean this up, and eventually remove the fake MBAR setting make the DRAM register address definitions actually contain the MBAR (or IPSBAR as appropriate) value as required. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove use of MBAR in old-style ColdFire timerGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | Not all ColdFire CPUs that use the old style timer hardware module use an MBAR set peripheral region. Move the TIMER base address defines to the per-CPU header files where we can set it correctly based on how the peripherals are mapped - instead of using a fake MBAR for some platforms. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: move ColdFire DMA register addresses to per-cpu headersGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | | | The base addresses of the ColdFire DMA unit registers belong with all the other address definitions in the per-cpu headers. The current definitions assume they are relative to an MBAR register. Not all ColdFire CPUs have an MBAR register. A clean address define can only be acheived in the per-cpu headers along with all the other chips peripheral base addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove use of MBAR value for ColdFire 528x peripheral addressingGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | The ColdFire 528x family of CPUs does not have an MBAR register, so don't define its peripheral addresses relative to one. Its internal peripherals are relative to the IPSBAR register, so make sure to use that. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove use of MBAR value for ColdFire 527x peripheral addressingGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | The ColdFire 527x family of CPUs does not have an MBAR register, so don't define its peripheral addresses relative to one. Its internal peripherals are relative to the IPSBAR register, so make sure to use that. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove use of MBAR value for ColdFire 523x peripheral addressingGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | The ColdFire 523x family of CPUs does not have an MBAR register, so don't define its peripheral addresses relative to one. Its internal peripherals are relative to the IPSBAR register, so make sure to use that. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove MBAR and IPSBAR hacks for the ColdFire 520x CPUsGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | The ColdFire 5207 and 5208 CPUs have fixed peripheral addresses. They do not use the setable peripheral address registers like the MBAR and IPSBAR used on many other ColdFire parts. Don't use fake values of MBAR and IPSBAR when using peripheral addresses for them, there is no need to. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: move ColdFire PIT timer base addressesGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | | | | | The PIT hardware timer module used in some ColdFire CPU's is not always addressed relative to an IPSBAR register. Parts like the ColdFire 5207 and 5208 have fixed peripheral addresses. So lets not define the register addresses of the PIT relative to an IPSBAR definition. Move the base address definitions into the per-part headers. This is a lot more consistent since all the other peripheral base addresses are defined in the per-part header files already. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove kludge seting of MCF_IPSBAR for ColdFire 54xxGreg Ungerer2011-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ColdFire 54xx family shares the same interrupt controller used on the 523x, 527x and 528x ColdFire parts, but it isn't offset relative to the IPSBAR register. The 54xx doesn't have an IPSBAR register. By including the base address of the peripheral registers in the register definitions (MCFICM_INTC0 and MCFICM_INTC1 in this case) we can avoid having to define a fake IPSBAR for the 54xx. And this makes the register address definitions of these more consistent, the majority of the other register address defines include the peripheral base address already. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Select GENERIC_HARDIRQS_NO_DEPRECATEDThomas Gleixner2011-03-15
| | | | | | | | | | | | | | All chips converted and proper accessor functions used. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Use proper irq_desc accessors inThomas Gleixner2011-03-15
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert 5249 intc irq_chip to new functionsThomas Gleixner2011-03-15
| | | | | | | | | | | | | | /me idly wonders what sets the handlers for this chip. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert 5272 intc irq_chip to new functionsThomas Gleixner2011-03-15
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert 68360 ints irq_chip to new functionsThomas Gleixner2011-03-15
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert 68328 ints irq_chip to new functionsThomas Gleixner2011-03-15
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert coldfire intc-simr irq_chip to newThomas Gleixner2011-03-15
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert coldfire intc-2 irq_chip to newThomas Gleixner2011-03-15
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert coldfire intc irq_chip to newThomas Gleixner2011-03-15
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: 5772: Replace private irq flow handlerThomas Gleixner2011-03-15
| | | | | | | | | | | | | | | | | | | | | | That handler lacks the minimal checks for action being zero etc. Keep the weird flow - ack before handling - intact and call into handle_simple_irq which does the right thing. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Greg Ungerer <gerg@uclinux.org> LKML-Reference: <20110202212552.413849952@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | Merge branch 'timers-core-for-linus' of ↵Linus Torvalds2011-03-15
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (62 commits) posix-clocks: Check write permissions in posix syscalls hrtimer: Remove empty hrtimer_init_hres_timer() hrtimer: Update hrtimer->state documentation hrtimer: Update base[CLOCK_BOOTTIME].offset correctly timers: Export CLOCK_BOOTTIME via the posix timers interface timers: Add CLOCK_BOOTTIME hrtimer base time: Extend get_xtime_and_monotonic_offset() to also return sleep time: Introduce get_monotonic_boottime and ktime_get_boottime hrtimers: extend hrtimer base code to handle more then 2 clockids ntp: Remove redundant and incorrect parameter check mn10300: Switch do_timer() to xtimer_update() posix clocks: Introduce dynamic clocks posix-timers: Cleanup namespace posix-timers: Add support for fd based clocks x86: Add clock_adjtime for x86 posix-timers: Introduce a syscall for clock tuning. time: Splitout compat timex accessors ntp: Add ADJ_SETOFFSET mode bit time: Introduce timekeeping_inject_offset posix-timer: Update comment ... Fix up new system-call-related conflicts in arch/x86/ia32/ia32entry.S arch/x86/include/asm/unistd_32.h arch/x86/include/asm/unistd_64.h arch/x86/kernel/syscall_table_32.S (name_to_handle_at()/open_by_handle_at() vs clock_adjtime()), and some due to movement of get_jiffies_64() in: kernel/time.c
| * m68k: Switch do_timer() to xtime_update()Torben Hohn2011-01-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xtime_update() properly takes the xtime_lock Signed-off-by: Torben Hohn <torbenh@gmx.de> Cc: Sam Creasey <sammy@sammy.net> Cc: Peter Zijlstra <peterz@infradead.org> Cc: johnstul@us.ibm.com Cc: Roman Zippel <zippel@linux-m68k.org> Cc: hch@infradead.org Cc: yong.zhang0@gmail.com Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Greg Ungerer <gerg@uclinux.org> LKML-Reference: <20110127150006.23248.71790.stgit@localhost> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | m68knommu: set flow handler for secondary interrupt controller of 5249Greg Ungerer2011-02-15
| | | | | | | | | | | | | | The secondary interrupt controller of the ColdFire 5249 code is not setting the edge triggered flow handler. Set it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | m68knommu: remove use of IRQ_FLG_LOCK from 68360 platform supportGreg Ungerer2011-02-15
| | | | | | | | | | | | | | The m68knommu arch does not define or use IRQ_FLG_LOCK in its irq subsystem. Remove obsolete use of it. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | m68knommu: add missing linker __modver sectionGreg Ungerer2011-02-15
| | | | | | | | | | | | | | | | | | Add missing linker section __modver to fix: LD vmlinux /usr/local/bin/../m68k-uclinux/bin/ld.real: error: no memory region specified for loadable section `__modver' Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | m68knommu: fix mis-named variable int set_irq_chip loopGreg Ungerer2011-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | Compiling for 68360 targets gives: CC arch/m68knommu/platform/68360/ints.o arch/m68knommu/platform/68360/ints.c: In function ‘init_IRQ’: arch/m68knommu/platform/68360/ints.c:135:16: error: ‘irq’ undeclared (first use in this function) arch/m68knommu/platform/68360/ints.c:135:16: note: each undeclared identifier is reported only once for each function it appears in Fix variable name used. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | m68knommu: add optimize memmove() functionGreg Ungerer2011-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an m68k/coldfire optimized memmove() function for the m68knommu arch. This is the same function as used by m68k. Simple speed tests show this is faster once buffers are larger than 4 bytes, and significantly faster on much larger buffers (4 times faster above about 100 bytes). This also goes part of the way to fixing a regression caused by commit ea61bc461d09e8d331a307916530aaae808c72a2 ("m68k/m68knommu: merge MMU and non-MMU string.h"), which breaks non-coldfire non-mmu builds (which is the 68x328 and 68360 families). They currently have no memmove() fucntion defined, since there was none in the m68knommu/lib functions. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | m68knommu: fix use of un-defined _TIF_WORK_MASKGreg Ungerer2011-02-08
|/ | | | | | | | | | | | | | The _TIF_WORK_MASK definition was removed in the clean up of MMU and non-MMU arch/m68k/include/asm/thread_info*.h files (this was commit cddafa3500fde4a07e5bf899ec97a04069f8f7ce, "merge MMU and non-MMU thread_info.h"). It didn't get cleaned out of the entry.S code for the 68328 and 68360 based platforms. And it was replaced by a hard coded constant mask for coldfire platforms. There is currently no need to mask any of these bits, so fix all uses (and former uses) to check for any non-zero value. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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