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* Blackfin arch: add error message when IRQ no availableMichael Hennerich2007-07-24
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Initialize the exception vectors early in the boot processBernd Schmidt2007-07-25
| | | | | | | | | Initialize the exception vectors early in the boot process, so that CPLB faults can be handled when memory protection is enabled. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Load P0 before storing through itBernd Schmidt2007-07-24
| | | | | | | | Fortunately this function is only used on old 533 revisions. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: clean up some coding style issuesBryan Wu2007-07-12
| | | | | Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: scrub dead codeMike Frysinger2007-07-11
| | | | | | | | | we converted to using a system call for userspace spinlocks rather than a dedicated exception long ago Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Some memory and code optimizations - Fix SYS_IRQSMichael Hennerich2007-07-12
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Enable BF54x PIN/GPIO interruptsMichael Hennerich2007-07-12
| | | | | | Signed-off-bu: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: cleanup warnings from checkpatch -- no functional changesMike Frysinger2007-07-12
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Clean up trace buffer handling, No major functional changes.Robin Getz2007-06-21
| | | | | | | | | | Turns on trace earlier, so crashes at kernel start should print out a trace, making things easier to debug. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Start untangling the CPLB handling code.Bernd Schmidt2007-07-12
| | | | | | | | | | | | | - Move cache initialization to C from assembly. - Move anomaly workaround for writing [ID]MEM_CONTROL to assembly, so that we don't have to mess around with .align directives in C source. - Fix a bug where bfin_write_DMEM_CONTROL would write to IMEM_CONTROL - Break out CPLB related code from kernel/setup.c into their own file. - Don't define variables in header files, only declare them. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: add missing implementations SIC_IWR crosses several registersMichael Hennerich2007-06-20
| | | | | | | | | | SIC_IWR crosses several registers - add missing implementations - make sure SIC_IWR is SET after boot Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: defines and provides entry points for certain user space ↵Bernd Schmidt2007-06-20
| | | | | | | | | | | | | | | | | | functions at fixed addresses This patch defines (and provides) entry points for certain user space functions at fixed addresses. The Blackfin has no usable atomic instructions, but we can ensure that these code sequences appear atomic from a user space point of view by detecting when we're in the process of executing them during the interrupt handler return path. This allows much more efficient pthread lock implementations than the bfin_spinlock syscall we're currently using. Also provided is a small sys_rt_sigreturn stub which can be used by the signal handler setup code. The signal.c part will be committed separately. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: initial supporting for BF548-EZKITRoy Huang2007-07-12
| | | | | | | | | | | | | | | | | The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will be submitted later. Please enjoy the show. Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: update ANOMALY handlingRobin Getz2007-06-20
| | | | | | | | update lists for 533, 537, and add SSYNC workaround into assembly files. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: add missing gpio.h header to fix compiling in some pm ↵Michael Hennerich2007-06-11
| | | | | | | | configurations Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: fix spelling typo in outputMike Frysinger2007-06-11
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: add proper ENDPROC()Mike Frysinger2007-06-11
| | | | | | | | | add proper ENDPROC() to close out assembly functions so size/type is set properly in the final ELF image Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: spelling fixesSimon Arlott2007-06-11
| | | | | | Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: update pm.c according to power management API change.Bryan Wu2007-05-21
| | | | | Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Blackfin arch: fix signal handling bugBernd Schmidt2007-05-21
| | | | | | | | | | | | | | | | | | There's a forum thread at https://blackfin.uclinux.org/gf/project/uclinux-dist/forum/?action=ForumBrowse&_forum_action=MessageReply&message_id=24741 which has a testcase involving signal handling that crashes quite readily. Inspecting the code I believe what happens is that signal handling can become confused when it is invoked on return from an interrupt, if the contents of P0 and R0 at the time of the interrupt happen to be such that P0 is larger than zero (indicating to the signal code that we're in a syscall), and R0 happens to have a value of something like -EINTR or -ERESTARTSYS. Fixed by setting orig_p0 to -1 if we're returning from an interrupt. The testcase now seems to run without problems. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Blackfin arch: Add Workaround for ANOMALY 05000257Michael Hennerich2007-05-21
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* blackfin architectureBryan Wu2007-05-07
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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