aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/kernel/cplb-mpu
Commit message (Collapse)AuthorAge
* Blackfin arch: fix bug - traps test case 19 for exception 0x2d failsBernd Schmidt2009-02-04
| | | | | | | | | | | Enable null pointer checking for ICPLBs. The code was there but for some reason I had commented it out at some stage during development. Should restrict this to 1K since atomic ops start there. Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: merge adeos blackfin part to arch/blackfin/Yi Li2009-01-07
| | | | | | | | | | | | | | | | | | [Mike Frysinger <vapier.adi@gmail.com>: - handle bf531/bf532/bf534/bf536 variants in ipipe.h - cleanup IPIPE logic for bfin_set_irq_handler() - cleanup ipipe asm code a bit and add missing ENDPROC() - simplify IPIPE code in trap_c - unify some of the IPIPE code and fix style - simplify DO_IRQ_L1 handling with ipipe code - revert IRQ_SW_INT# addition from ipipe merge - remove duplicate get_{c,s}clk() prototypes ] Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Faster C implementation of no-MPU CPLB handlerBernd Schmidt2009-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a mixture ofcMichael McTernan's patch and the existing cplb-mpu code. We ditch the old cplb-nompu implementation, which is a good example of why a good algorithm in a HLL is preferrable to a bad algorithm written in assembly. Rather than try to construct a table of all posible CPLBs and search it, we just create a (smaller) table of memory regions and their attributes. Some of the data structures are now unified for both the mpu and nompu cases. A lot of needless complexity in cplbinit.c is removed. Further optimizations: * compile cplbmgr.c with a lot of -ffixed-reg options, and omit saving these registers on the stack when entering a CPLB exception. * lose cli/nop/nop/sti sequences for some workarounds - these don't * make sense in an exception context Additional code unification should be possible after this. [Mike Frysinger <vapier.adi@gmail.com>: - convert CPP if statements to C if statements - remove redundant statements - use a do...while loop rather than a for loop to get slightly better optimization and to avoid gcc "may be used uninitialized" warnings ... we know that the [id]cplb_nr_bounds variables will never be 0, so this is OK - the no-mpu code was the last user of MAX_MEM_SIZE and with that rewritten, we can punt it - add some BUG_ON() checks to make sure we dont overflow the small cplb_bounds array - add i/d cplb entries for the bootrom because there is functions/data in there we want to access - we do not need a NULL trailing entry as any time we access the bounds arrays, we use the nr_bounds variable ] Signed-off-by: Michael McTernan <mmcternan@airvana.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: smp patch cleanup from LKML reviewGraf Yang2009-01-07
| | | | | | | | | 1. Use inline get_l1_... functions instead of macro 2. Fix compile issue about smp barrier functions Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: unify cplbinfo filesMike Frysinger2008-11-18
| | | | | | | | Merge MPU and noMPU version of CPLB info code to one common version. Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: SMP supporting patchset: Blackfin CPLB related codeGraf Yang2008-11-18
| | | | | | | | | | | Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin CPLB related code Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: use the new bfin_addr_dcachable() functionMike Frysinger2008-10-16
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Make L2 SRAM cacheableSonic Zhang2008-10-09
| | | | | | Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Modify some funtion names to more genernal onesGraf Yang2008-10-08
| | | | | | Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fixing bug - under IRQ stress, running applications may ↵Bernd Schmidt2008-10-07
| | | | | | | | | | | wrongly trigger an ICPLB miss and be killed Disable IRQs while frobbing the CPLB registers, to avoid accessing the data in current_rwx_mask while it isn't covered by CPLBs. Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: mark some functions as __init as they are only called from ↵Mike Frysinger2008-08-14
| | | | | | | | __init functions Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: lose unnecessary dependency on CONFIG_BFIN_ICACHE for MPUBernd Schmidt2008-04-24
| | | | | | Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: add implicit icplb for the bootrom so we can use the ↵Mike Frysinger2008-04-23
| | | | | | | | utility functions in the kernel Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: cplb-mpu code clean upMike Frysinger2008-04-23
| | | | | | | | | | - allow bootrom to be readable from supervisor mode - delete unused local variable "addr" - punt unused local defines of cplbinfo.c Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: add boot messages to quickly distinguish between MPU/NOMPU ↵Mike Frysinger2008-04-23
| | | | | | | | settings Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: support the reserved memory region in the MPU codeBernd Schmidt2008-04-23
| | | | | | | Pointed-out-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: fix bug - a crash on bootup with CONFIG_MPU on the BF548Bernd Schmidt2008-04-23
| | | | | | | | | | | | | | | | | | | The function flush_switched_dcplbs was clearing the CPLB entries covering the process permission bitmasks. This means that the sequence flush_switched_dcplbs (); set_mask_dcplbs(mm->context.page_rwx_mask); has a problem: if kernel code (such as an interrupt) causes a CPLB miss before set_mask_dcplbs completes, the CPLB handler function causes a double fault, with an instantaneous reboot. This bug fix is dedicated to Michael Hennerich, the only person in the world capable of providing working JTAG hardware. Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: fix bug - Make the MPU code aware of the async banks and ↵Bernd Schmidt2008-04-22
| | | | | | | | | | | the uncached DMA area. Bug: CONFIG_MPU doesn't seem to handle access to ASYNC/IO Memory well http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3912 Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: fix up - CONFIG_BLKFIN_WT was renamed CONFIG_BFIN_WT while ↵Bernd Schmidt2008-04-22
| | | | | | | | the MPU code was out-of-tree. Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* [Blackfin] arch: error out if ANOMALY_05000263 applies while enabling the MPUMike Frysinger2008-02-01
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* [Blackfin] arch: Initial checkin of the memory protection support.Bernd Schmidt2008-01-27
Enable it with CONFIG_MPU. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>