aboutsummaryrefslogtreecommitdiffstats
path: root/arch/avr32/mach-at32ap
Commit message (Collapse)AuthorAge
* [AVR32] Add Atmel SSC driver platform device to AT32AP architectureHans-Christian Egtvedt2007-07-18
| | | | | | | This patch adds register definitions, clocks and IRQs to the platform devices. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] CPU frequency scaling for AT32APHans-Christian Egtvedt2007-07-18
| | | | | | | | | | | | | | | | | | | | This patch enables CPU frequency scaling for AT32AP devices. This will enable the CPU to scale between the speed of the high speed bus and the master clock and thus save some power. The patch also adds a parent to cpu_clk and a cpu_clk_set_rate to enable changing the CPU clock divider in a sane way. The driver does not check if the given rate is 0, thus resulting in a div by 0. I think this check should be go into the clk_set_rate framework, and not here. Tested on AT32AP7000/ATSTK1000. Hardware documentation can be found in the AT32AP7000 datasheet. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Split SM device into PM, RTC, WDT and EICHaavard Skinnemoen2007-07-18
| | | | | | | | | | | Split the SM platform device into separate platform devices for PM, RTC, WDT and EIC. This is more correct according to the documentation and allows us to simplify the code a little. Also turn the EIC driver into a real platform driver. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
* [AVR32] Initialize dma_mask and dma_coherent_maskDavid Brownell2007-06-23
| | | | | | | | | | | The current at32ap7000 platform devices aren't declared as supporting DMA, so that layered drivers can't tell whether they need to manage DMA. This patch makes all those platform devices report that they support DMA. Most do, but in a few cases this is inappropriate. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Implement platform hooks for atmel_lcdfb driverHaavard Skinnemoen2007-05-15
| | | | | | | | This modifies and extends the existing lcdc platform code to support the new atmel_lcdfb driver. The ATSTK1000 board code is set up to use the on-board Samsung LTV350QV LCD panel. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* AVR32: Spinlock initializer cleanupThomas Gleixner2007-05-09
| | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Make I/O access macros work with external devicesHaavard Skinnemoen2007-04-27
| | | | | | | | | | | | | | | | | | | Fix the I/O access macros so that they work with externally connected devices accessed in little-endian mode over any bus width: * Use a set of macros to define I/O port- and memory operations borrowed from MIPS. * Allow subarchitecture to specify address- and data-mangling * Implement at32ap-specific port mangling (with build-time configurable bus width. Only one bus width at a time supported for now.) * Rewrite iowriteN and friends to use write[bwl] and friends (not the __raw counterparts.) This has been tested using pata_pcmcia to access a CompactFlash card connected to the EBI (16-bit bus width.) Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Don't enable clocks with no usersHaavard Skinnemoen2007-04-27
| | | | | | | | | Bring the code that sets the initial PM clock masks in line with the comment preceding it by only enabling clocks that have users != 0. Fix SM clock definition and avr32_hpt_init() so that the SM and TC0 clocks keep ticking. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Change system timer from count-compare to Timer/Counter 0Hans-Christian Egtvedt2007-04-27
| | | | | | | | | | | | | | | | | | | | Due to limitation of the count-compare system timer (not able to count when CPU is in sleep), the system timer had to be changed to use a peripheral timer/counter. The old COUNT-COMPARE code is still present in time.c as weak functions. The new timer is added to the architecture directory. This patch sets up TC0 as system timer The new timer has been tested on AT32AP7000/ATSTK1000 at 100 Hz, 250 Hz, 300 Hz and 1000 Hz. For more details about the timer/counter see the datasheet for AT32AP700x available at http://www.atmel.com/dyn/products/product_card.asp?part_id=3903 Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Add mach-specific KconfigHaavard Skinnemoen2007-04-27
| | | | | | | | Include at32ap-specific Kconfig file from top-level Kconfig file. The at32ap Kconfig is currently empty, but it will grow some machine- specific options soon. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Add nwait and tdf parameters to SMC configurationHans-Christian Egtvedt2007-04-27
| | | | | | | | Complete the SMC configuration code by adding nwait and tdf parameter. After this change, we support the same parameters as the hardware. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Add basic HMATRIX supportHaavard Skinnemoen2007-04-27
| | | | | | | | This adds register and clock definitions for the High-speed bus Matrix (HMATRIX) as well as a function that can be used to configure special EBI functionality like CompactFlash and NAND flash support. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [PATCH] gpio_direction_output() needs an initial valueDavid Brownell2007-03-16
| | | | | | | | | | | | | | | | | | | | | | | | | | It's been pointed out that output GPIOs should have an initial value, to avoid signal glitching ... among other things, it can be some time before a driver is ready. This patch corrects that oversight, fixing - documentation - platforms supporting the GPIO interface - users of that call (just one for now, others are pending) There's only one user of this call for now since most platforms are still using non-generic GPIO setup code, which in most cases already couples the initial value with its "set output mode" request. Note that most platforms are clear about the hardware letting the output value be set before the pin direction is changed, but the s3c241x docs are vague on that topic ... so those chips might not avoid the glitches. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Andrew Victor <andrew@sanpeople.com> Acked-by: Milan Svoboda <msvoboda@ra.rockwell.com> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [AVR32] at32_spi_setup_slaves should be __initHaavard Skinnemoen2007-03-07
| | | | Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2007-02-19
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (117 commits) [ARM] 4058/2: iop32x: set ->broken_parity_status on n2100 onboard r8169 ports [ARM] 4140/1: AACI stability add ac97 timeout and retries [ARM] 4139/1: AACI record support [ARM] 4138/1: AACI: multiple channel support for IRQ handling [ARM] 4211/1: Provide a defconfig for ns9xxx [ARM] 4210/1: base for new machine type "NetSilicon NS9360" [ARM] 4222/1: S3C2443: Remove reference to missing S3C2443_PM [ARM] 4221/1: S3C2443: DMA support [ARM] 4220/1: S3C24XX: DMA system initialised from sysdev [ARM] 4219/1: S3C2443: DMA source definitions [ARM] 4218/1: S3C2412: fix CONFIG_CPU_S3C2412_ONLY wrt to S3C2443 [ARM] 4217/1: S3C24XX: remove the dma channel show at startup [ARM] 4090/2: avoid clash between PXA and SA1111 defines [ARM] 4216/1: add .gitignore entries for ARM specific files [ARM] 4214/2: S3C2410: Add Armzone QT2410 [ARM] 4215/1: s3c2410 usb device: per-platform vbus_draw [ARM] 4213/1: S3C2410 - Update definition of ADCTSC_XY_PST [ARM] 4098/1: ARM: rtc_lock only used with rtc_cmos [ARM] 4137/1: Add kexec support [ARM] 4201/1: SMP barriers pair needed for the secondary boot process ... Fix up conflict due to typedef removal in sound/arm/aaci.h
| * [ARM] 4124/1: Rename mach-at91rm9200 and arch-at91rm9200 directoriesAndrew Victor2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that Linux includes support for the Atmel AT91SAM9260 and AT91SAM9261 processors in addition to the original Atmel AT91RM9200 (with support for more AT91 processors pending), the "mach-at91rm9200" and "arch-at91rm9200" directories should be renamed to indicate their more generic nature. The following git commands should be run BEFORE applying this patch: git-mv arch/arm/mach-at91rm9200 arch/arm/mach-at91 git-mv include/asm-arm/arch-at91rm9200 include/asm-arm/arch-at91 Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [AVR32] Use per-controller spi_board_info structuresHaavard Skinnemoen2007-02-16
| | | | | | | | | | | | | | | | | | | | Set up one spi_board_info array per controller and pass this to at32_add_device_spi so that it can set up any GPIO pins for chip selects based on this information. Extracted from a patch by David Brownell and adapted slightly. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | [AVR32] Warn, don't BUG if clk_disable is called too many timesHaavard Skinnemoen2007-02-16
| | | | | | | | | | | | | | | | | | Print a helpful warning along with a stack dump if clk_disable is called on a already-disabled clock. Remove the BUG_ON(). Extracted from a patch by David Brownell. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | [AVR32] Make sure all genclocks have a parentHaavard Skinnemoen2007-02-16
| | | | | | | | | | | | | | | | | | | | | | Initialize the parent field of each generic clock by looking at the PM registers. This means that the genclock operations can always assume that the parent field is non-null, so they don't have to check. Also remove a few unnecessary BUG_ON()s. Extracted from a patch by David Brownell. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | [AVR32] SPI platform code updateHaavard Skinnemoen2007-02-09
| | | | | | | | | | | | | | Move stuff in spi.c into ATSTK1002 board code and update SPI platform device definitions according to the new GPIO API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | [AVR32] Add PIOE device and reserve SDRAM pinsHaavard Skinnemoen2007-02-09
| | | | | | | | | | | | | | | | | | | | | | The PIOE device was left out before because it muxes SDRAM pins (and is therefore a bit dangerous to mess with) and because no existing drivers had any use for it. It is needed for CompactFlash, however, and now that we have a way to protect the SDRAM pins, it can be safely added. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | [AVR32] Introduce at32_reserve_pin()Haavard Skinnemoen2007-02-09
| | | | | | | | | | | | | | | | at32_reserve_pin() can be used for reserving portmux pins without altering their configuration. Useful for e.g. SDRAM pins where we really don't want to change the bootloader-provided configuration. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | [AVR32] Don't reset PIO state at bootupHaavard Skinnemoen2007-02-09
| | | | | | | | | | | | | | Leave the PIO lines as the bootloader left them. This allows us to use PIOE without disturbing the SDRAM muxing. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | [AVR32] GPIO API implementationHaavard Skinnemoen2007-02-09
| | | | | | | | | | | | | | Arch-neutral GPIO calls for AVR32. GPIO IRQ support written by David Brownell. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | [AVR32] ext int fixesDavid Brownell2007-02-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bugfixes for external irq handler set_irq_type(): - If set_irq_type() can't set the type, don't change anything! - It's not OK to change the flow handler as part of set_irq_type(), among other issues that violates spinlock rules. Instead, we can call the relevant handler when we demux the external interrupts. - The external irq demux has no need to grab the spinlock. And in fact grabbing it that way was wrong, since that code might be pre-empted by an irq at a different priority level, and that code might then have tried to grab that spinlock... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | [AVR32] fix serial port setup on ATSTK1000David Brownell2007-02-09
|/ | | | | | | | | Fixes to USART setup on the stk-1000 ... don't configure USART 2, since its TXD/RXD are used for INT-A and INT-B buttons; and configure USART 0 (for IRDA, and with corrected IRQ) iff SW2 has a non-default setting. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Implement intc_get_pending()Haavard Skinnemoen2006-12-08
| | | | | | | | | intc_get_pending() returns a bitmask with pending interrupts in a interrupt controller group (irq). This is used by the upcoming oprofile implementation for avr32 and may also be useful for chained interrupt controller drivers. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Set flow handler for external interruptsHaavard Skinnemoen2006-12-08
| | | | | | | | Make sure that the flow handler for external interrupts is updated whenever they type is changed. Also make sure that the defaults correspond with how the interrupt controller is configured. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Remove unused fileHaavard Skinnemoen2006-12-08
| | | | | | | Remove arch/avr32/mach-at32ap/sm.c, which is not referenced by any Makefile. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Add macb1 platform_deviceHaavard Skinnemoen2006-12-08
| | | | | | | Add platform_device definition and pio init code for the second ethernet controller in AT32AP7000. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Portmux API updateHaavard Skinnemoen2006-12-08
| | | | | | | Rename portmux_set_func to at32_select_periph, add at32_select_gpio and add flags parameter to specify the initial state of the pins. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [PATCH] AVR32: Use __raw MMIO access for internal peripheralsHaavard Skinnemoen2006-10-25
| | | | | | | | | | | | | | | The read[bwl] and write[bwl] functions are meant for accessing PCI devices. How this is achieved on AVR32 is unknown, as there are no systems with a PCI bridge available yet. On-chip peripheral access, however, should not depend on how we end up implementing PCI access, so using __raw_read[bwl]/__raw_write[bwl] is the right thing to do for on-chip peripherals. This patch converts the drivers for the static memory controller, interrupt controller, PIO controller and system manager to use __raw MMIO access. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] IRQ: Fix AVR32 breakageHaavard Skinnemoen2006-10-11
| | | | | | | | Make the necessary changes to AVR32 required by the irq regs stuff. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] AVR32: Allow renumbering of serial devicesHaavard Skinnemoen2006-10-04
| | | | | | | | | | | | | Allow the board to remap actual USART peripheral devices to serial devices by calling at32_map_usart(hw_id, serial_line). This ensures that even though ATSTK1002 uses USART1 as the first serial port, it will still have a ttyS0 device. This also adds a board-specific early setup hook and moves the at32_setup_serial_console() call there from the platform code. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] atmel_serial: Pass fixed register mappings through platform_dataHaavard Skinnemoen2006-10-04
| | | | | | | | | | | | | | | | | | | | | | | | | In order to initialize the serial console early, the atmel_serial driver had to do a hack where it compared the physical address of the port with an address known to be permanently mapped, and used it as a virtual address. This got around the limitation that ioremap() isn't always available when the console is being initalized. This patch removes that hack and replaces it with a new "regs" field in struct atmel_uart_data that the board-specific code can initialize to a fixed virtual mapping for platform devices where this is possible. It also initializes the DBGU's regs field with the address the driver used to check against. On AVR32, the "regs" field is initialized from the physical base address when this it can be accessed through a permanently 1:1 mapped segment, i.e. the P4 segment. If regs is NULL, the console initialization is delayed until the "real" driver is up and running and ioremap() can be used. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] at91_serial -> atmel_serial: Public definitionsHaavard Skinnemoen2006-10-04
| | | | | | | | | | | Rename the following public definitions: * AT91_NR_UART -> ATMEL_MAX_UART * struct at91_uart_data -> struct atmel_uart_data * at91_default_console_device -> atmel_default_console_device Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] at91_serial -> atmel_serial: Platform device nameHaavard Skinnemoen2006-10-04
| | | | | | | | | Rename the "at91_usart" platform driver "atmel_usart" and update platform devices accordingly. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] AVR32 MTD: Static Memory Controller driverHaavard Skinnemoen2006-09-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patchset adds the necessary drivers and infrastructure to access the external flash on the ATSTK1000 board through the MTD subsystem. With this stuff in place, it will be possible to use a jffs2 filesystem stored in the external flash as a root filesystem. It might also be possible to update the boot loader if you drop the write protection of partition 0. As suggested by David Woodhouse, I reworked the patches to use the physmap driver instead of introducing a separate mapping driver for the ATSTK1000. I've also cleaned up the hsmc header by removing useless comments and converting spaces to tabs (my headerfile generator needs some work.) Unfortunately, I couldn't unlock the flash in fixup_use_atmel_lock because the erase regions hadn't been set up yet, so I had to do it from cfi_amdstd_setup instead. This patch: This adds a simple API for configuring the static memory controller along with an implementation for the Atmel HSMC. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] avr32 architectureHaavard Skinnemoen2006-09-26
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000 CPU and the AT32STK1000 development board. AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption and high code density. The AVR32 architecture is not binary compatible with earlier 8-bit AVR architectures. The AVR32 architecture, including the instruction set, is described by the AVR32 Architecture Manual, available from http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It features a 7-stage pipeline, 16KB instruction and data caches and a full Memory Management Unit. It also comes with a large set of integrated peripherals, many of which are shared with the AT91 ARM-based controllers from Atmel. Full data sheet is available from http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf while the CPU core implementation including caches and MMU is documented by the AVR32 AP Technical Reference, available from http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf Information about the AT32STK1000 development board can be found at http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918 including a BSP CD image with an earlier version of this patch, development tools (binaries and source/patches) and a root filesystem image suitable for booting from SD card. Alternatively, there's a preliminary "getting started" guide available at http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links to the sources and patches you will need in order to set up a cross-compiling environment for avr32-linux. This patch, as well as the other patches included with the BSP and the toolchain patches, is actively supported by Atmel Corporation. [dmccr@us.ibm.com: Fix more pxx_page macro locations] [bunk@stusta.de: fix `make defconfig'] Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Dave McCracken <dmccr@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-13 05:18:35 -0500