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| * | | | ARM: 6838/1: etm: fix section mismatch warningMing Lei2011-03-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch fixes the warning below: WARNING: arch/arm/kernel/built-in.o(.data+0x27c): Section mismatch in reference from the variable etb_driver to the function .init.text:etb_probe() The variable etb_driver references the function __init etb_probe() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console, WARNING: arch/arm/kernel/built-in.o(.data+0x2cc): Section mismatch in reference from the variable etm_driver to the function .init.text:etm_probe() The variable etm_driver references the function __init etm_probe() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console, Signed-off-by: Ming Lei <tom.leiming@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 6837/1: remove unused pci_fixup_prpmc1100Colin Cross2011-03-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PrPMC1100 machine was removed in 2.6.11, but left a reference to machine_is_prpmc1100 in arch/arm/kernel/bios32.c. 6f82f4db80189281a8ac42f2e72396accb719b57 removed the machine type, which causes a build failure: CC arch/arm/kernel/bios32.o arch/arm/kernel/bios32.c: In function 'pci_fixup_prpmc1100': arch/arm/kernel/bios32.c:174: error: implicit declaration of function 'machine_is_prpmc1100' Remove the unused pci_fixup_prpcm1100. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 6836/1: kprobes/fix emulation of LDR/STR instruction when Rn == PCViktor Rosendahl2011-03-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Rn value from the emulation is unconditionally written back; this is fine as long as Rn != PC because in that case, even if the instruction isn't a write back instruction, it will only result in the same value being written back. In case Rn == PC, then the emulated instruction doesn't have the actual PC value in Rn but an adjusted value; when this is written back, it will result in the PC being incorrectly updated. An altenative solution would be to check bits 24 and 22 to see whether the instruction actually is a write back instruction or not. I think it's enough to check whether Rn != PC, because: - it's looks cheaper than the alternative - to my understaning it's not permitted to update the PC with a write back instruction, so we don't lose any ability to emulate legal instructions. - in case of writing back for non write back instructions where Rn != PC, it doesn't matter because the values are the same. Regarding the second point above, it would possibly be prudent to add some checking to prep_emulate_ldr_str(), so that instructions with both write back and Rn == PC would be rejected. Signed-off-by: Viktor Rosendahl <viktor.rosendahl@nokia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/nico/orion into fixesRussell King2011-03-28
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| | * | | | Fix the broken build for Marvell Dove platform.Konstantin Porotchkin2011-03-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove call to the old GPIO init function. Fix old MPP control offset value. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Acked-by: Saeed Bishara <saeed.bishara@gmail.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
| | * | | | arm: mach-kirkwood: add led in sheevaplug-setup.cRobin Becker2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a second, red, led for the standard sheevaplug. The sheeva_esata mpp config is left unchanged. Tested on a standard sheevaplug Signed-off-by: Robin Becker <robin@reportlab.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
| | * | | | ARM: orion5x: replace printk with pr_{err,info,...} in ts78xx-setup.cAlexander Clouter2011-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
| * | | | | ARM: 6835/1: perf: ensure overflows aren't missed due to IRQ latencyWill Deacon2011-03-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a counter overflows during a perf stat profiling run it may overtake the last known value of the counter: 0 prev new 0xffffffff |----------|-------|----------------------| In this case, the number of events that have occurred is (0xffffffff - prev) + new. Unfortunately, the event update code will not realise an overflow has occurred and will instead report the event delta as (new - prev) which may be considerably smaller than the real count. This patch adds an extra argument to armpmu_event_update which indicates whether or not an overflow has occurred. If an overflow has occurred then we use the maximum period of the counter to calculate the elapsed events. Acked-by: Jamie Iles <jamie@jamieiles.com> Reported-by: Ashwin Chaugule <ashwinc@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 6834/1: perf: reset counters on all CPUs during initialisationWill Deacon2011-03-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARMv7 dictates that the interrupt-enable and count-enable registers for each PMU counter are UNKNOWN following core reset. This patch adds a new (optional) function pointer to struct arm_pmu for resetting the PMU state during init. The reset function is called on each CPU via an arch_initcall in the generic ARM perf_event code and allows the PMU backend to write sane values to any UNKNOWN registers. Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 6833/1: perf: add required isbs() to ARMv7 backendWill Deacon2011-03-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARMv7 architecture does not guarantee that effects from co-processor writes are immediately visible to following instructions. This patch adds two isbs to the ARMv7 perf code: (1) Immediately after selecting an event register, so that the PMU state following this instruction is consistent with the new event. (2) Immediately before writing to the PMCR, so that any previous writes to the PMU have taken effect before (typically) enabling the counters. Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 6825/1: kernel/sleep.S: fix Thumb2 compilation issuesNicolas Pitre2011-03-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 6807/1: realview: Fix secondary GIC initialisation for EB with MPCore tilePawel Moll2011-03-26
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The second GIC, present when EB board is used with a MPCore tile, was initialised starting with irq number 64, which made interrupts 64-95 in the primary GIC unusable. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | | Merge branch 'for-linus' of ↵Linus Torvalds2011-03-29
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (26 commits) mmc: SDHI should depend on SUPERH || ARCH_SHMOBILE mmc: tmio_mmc: Move some defines into a shared header mmc: tmio: support aggressive clock gating mmc: tmio: fix power-mode interpretation mmc: tmio: remove work-around for unmasked SDIO interrupts sh: fix SDHI IO address-range ARM: mach-shmobile: fix SDHI IO address-range mmc: tmio: only access registers above 0xff, if available mfd: remove now redundant sh_mobile_sdhi.h header sh: convert boards to use linux/mmc/sh_mobile_sdhi.h ARM: mach-shmobile: convert boards to use linux/mmc/sh_mobile_sdhi.h mmc: tmio: convert the SDHI MMC driver from MFD to a platform driver sh: ecovec: use the CONFIG_MMC_TMIO symbols instead of MFD mmc: tmio: split core functionality, DMA and MFD glue mmc: tmio: use PIO for short transfers mmc: tmio-mmc: Improve DMA stability on sh-mobile mmc: fix mmc_app_send_scr() for dma transfer mmc: sdhci-esdhc: enable esdhc on imx53 mmc: sdhci-esdhc: use writel/readl as general APIs mmc: sdhci: add the abort CMDTYPE bits definition ...
| * | | | | ARM: mach-shmobile: fix SDHI IO address-rangeGuennadi Liakhovetski2011-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SDHI registers occupy only a 0x100 byte large window, not 0x200 byte. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Chris Ball <cjb@laptop.org>
| * | | | | ARM: mach-shmobile: convert boards to use linux/mmc/sh_mobile_sdhi.hGuennadi Liakhovetski2011-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Chris Ball <cjb@laptop.org>
* | | | | | arm: Fold irq_set_chip/irq_set_handlerThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: Reorder irq_set_ function callsThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reorder irq_set_chip() irq_set_chip_data() irq_set_handler() to irq_set_chip() irq_set_handler() irq_set_chip_data() so the next patch can combine irq_set_chip() and irq_set_handler() to irq_set_chip_and_handler(). Automated conversion with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: Cleanup the irq namespaceThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: Use generic show_interrupts()Thomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the generic version and just keep the arch specific output. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: dove: Use proper irq accessor functionsThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the obsolete desc_handle_irq() helper. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: gic: Use proper accessor functionsThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: at91: Cleanup irq chipThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid the whole lazy disable dance in the demux handler by providing a irq_disable() callback. Use the proper accessor functions and tidy up gpio_irq_handler() Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: davinci: Cleanup irq chip codeThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make use of the new functionality which ensures that irq_set_type is called with the chip masked. Unmask is only done when the interrupt is not disabled. Retrieve the trigger type from irq_data in unmask Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: ep93xx: Use proper irq accessor functionsThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No need to write the flow type. Core code does already. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: gemini: Use proper irq accessor functionsThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: mxc: Use generic_handle_irq()Thomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: vt8500: Use proper irq accessorsThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: msm: Use proper irq accessor functionsThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: plat-omap: Cleanup irq_desc accessThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1) Core code stores the flow type already 2) Flow type is accessible in irq_data Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: nomadik: Use local irq stateThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Store the enabled mask in the local state, so there is no need to fiddle in the irq descriptor. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: stmp3xxx: Use generic_handle_irq()Thomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: plat-samsung: Use proper irq accessor functionsThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: Cleanup irq_desc accessThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the proper wrappers and use the flow type in irq_data. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: msm: Convert to new irq chip functionsThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: Use irq flag setter functionThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the proper accessor function instead of fiddling in the status bits directly. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arm-kernel@lists.infradead.org
* | | | | | arm: Use genirq lockdep helper to set lock classThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the open coded access to irq_desc which will fail on sparse irq and use the proper wrappers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: tegra: Remove unused bogus irq enable/disable magicThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The core code handles thees already. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Colin Cross <ccross@android.com> Cc: linux-tegra@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org
* | | | | | arm: h720x: Fix irq conversion falloutThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The conversion missed, that one of the irq functions is called from the init code. Split it out, so the irq number based call works. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: nomadik: Remove non existing cpu id checkThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: ns9xxx: Remove non exisiting machine checksThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The machine id cleanup missed to remove the checks for now removed ids. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: dove: Use correct GPIO_BASE and remove orion_gpio_init() leftoverThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 9eac6d0 (ARM: Remove dependency of plat-orion GPIO code on mach directory includes) missed to convert one instance of DOVE_GPIO_VIRT_BASE and left the orion_gpio_init() in mpp.c Fix it up. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: at91: at572d940hf: Fix SDRAMC defineThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | That wants to be AT91_SDRAMC0 Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: footbridge: Make cksrc_dc21285_disable() voidThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This clocksource function needs to be void. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | arm: bios32: Remove non exisiting machine codeThomas Gleixner2011-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The id removal left this machine check in which breaks the build on some platforms. Remove it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | | ARM: mx51_efika: fix build error due to new mfd changesAndres Salomon2011-03-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MFD changes in 4ec1b54c ('mfd: mfd_cell is now implicitly available to mc13xxx drivers') changed the mc13xxx_platform_data struct layout. At the time all users were changed, but this driver was introduced in another tree at the same time. This updates the mc13xxx_platform_data user, fixing a build error. Signed-off-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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*-. \ \ \ \ \ Merge branches 'irq-cleanup-for-linus' and 'irq-fixes-for-linus' of ↵Linus Torvalds2011-03-28
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'irq-cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: vlynq: Convert irq functions * 'irq-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: genirq; Fix cleanup fallout genirq: Fix typo and remove unused variable genirq: Fix new kernel-doc warnings genirq: Add setter for AFFINITY_SET in irq_data state genirq: Provide setter inline for IRQD_IRQ_INPROGRESS genirq: Remove handle_IRQ_event arm: Ns9xxx: Remove private irq flow handler powerpc: cell: Use the core flow handler genirq: Provide edge_eoi flow handler genirq: Move INPROGRESS, MASKED and DISABLED state flags to irq_data genirq: Split irq_set_affinity() so it can be called with lock held. genirq: Add chip flag for restricting cpu_on/offline calls genirq: Add chip hooks for taking CPUs on/off line. genirq: Add irq disabled flag to irq_data state genirq: Reserve the irq when calling irq_set_chip()
| | * | | | | | arm: Ns9xxx: Remove private irq flow handlerThomas Gleixner2011-03-28
| | | |/ / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | handle_prio_irq is almost identical with handle_fasteoi_irq. The subtle differences are 1) The handler checks for IRQ_DISABLED after the device handler has been called. In case it's set it masks the interrupt. 2) When the handler sees IRQ_DISABLED on entry it masks the interupt in the same way as handle_fastoei_irq, but does not set the IRQ_PENDING flag. 3) Instead of gracefully handling a recursive interrupt it crashes the kernel. #1 is just relevant when a device handler calls disable_irq_nosync() and it does not matter whether we mask the interrupt right away or not. We handle lazy masking for disable_irq anyway, so there is no real reason to have this extra mask in place. #2 will prevent the resend of a pending interrupt, which can result in lost interrupts for edge type interrupts. For level type interrupts the resend is a noop in the generic code. According to the datasheet all interrupts are level type, so marking them as such will result in the exact same behaviour as the private handle_prio_irq implementation. #3 is just stupid. Crashing the kernel instead of handling a problem gracefully is just wrong. With the current semantics- all handlers run with interrupts disabled - this is even more wrong. Rename ack to eoi, remove the unused mask_ack, switch to handle_fasteoi_irq and remove the private function. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Acked-by: Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org LKML-Reference: <20110202212552.299898447@linutronix.de>
* | | | | | | Merge branch 'for-torvalds' of ↵Linus Torvalds2011-03-28
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson * 'for-torvalds' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: mach-ux500: configure board for the TPS61052 regulator v2 mach-ux500: provide ab8500 init vector mach-ux500: board support for AB8500 GPIO driver gpio: driver for 42 AB8500 GPIO pins
| * | | | | | | mach-ux500: configure board for the TPS61052 regulator v2Linus Walleij2011-03-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This registers the TPS61052 regulator to the ux500 MOP/HREF boards. Cc: Samuel Ortiz <samuel.ortiz@intel.com> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Ola Lilja <ola.o.lilja@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | | | | mach-ux500: provide ab8500 init vectorBengt Jonsson2011-03-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds an ab8500 regulator initialization vector for the HREF/MOP500 series of boards. This also sets the display regulator to be on at boot so we don't loose our splash screen when the board comes up. Signed-off-by: Bengt Jonsson <bengt.g.jonsson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>