| Commit message (Collapse) | Author | Age |
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If IRQ triggering is enabled, it can trigger a pending interrupt
even for masked interrupts. Any pending GPIO interrupts can
prevent the powerdomain from hitting retention.
Problem found, reported and additional review and testing by Chunquiu
Wang.
Tested-by: Chunquiu Wang <cqwang@motorola.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Powerdomain previous state is checked after restoring new states in
suspend. This patch fixes this problem.
Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Use the min/max settings from CPUfreq policy rather than
processor defined min/max settings.
Without this patch, it's possible to scale frequency outside
the current policy range.
Signed-off-by: Eero Nurkkala <ext-eero.nurkkala@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Use list_add_tail() when adding discovered UART ports. This is so
traversal using list_for_each_entry() will traverse the list in the
order they were found.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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This patch causes the OMAP uarts to honor the sysfs power/wakeup file
for IOPAD wakeups. Before the OMAP was always woken up from off mode
on a rs232 signal change. This patch also creates a different
platform device for each serial port so that the wakeup properties can
be control per port.
By default, IOPAD wakeups are enabled for each UART. To disable,
# echo disabled > /sys/devices/platform/serial8250.0/power/wakeup
Where serial8250.0 can be replaced by .1, or .2 to control the other
ports.
Original idea and original patch from Russ Dill <russ.dill@gmail.com>
Cc: Russ Dill <russ.dill@gmail.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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It was possible for an unhandled interrupt to occur if there was incoming
serial traffic during wakeup from suspend. This was caused by the code
in arch-arm/mach-omap2/serial.c keeping interrupt enabled all the time,
but not acking its interrupts. Applies on top of PM branch.
Use the PM begin/end hooks to ensure that the "serial idle" interrupts
are disabled during the suspend path. Also, since begin/end hooks are
now used, use the suspend_state that is passed in the begin hook instead
of the enter hook as per the platform_suspend_ops docs.
Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Streamline the OMAP4 special IRQ assignments by putting inside
normal init loop instead of having a separate loop.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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By default, prevent functional wakeups from inside a module from
waking up the IVA2. Let DSP Bridge code handle this when loaded.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Any pending reset flags can prevent retention. Ensure they are all
cleared during boot.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Any pending PRCM interrupts can prevent retention. Ensure
they are cleared during boot.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Fix two bugs in the OMAP3 clock tree pertaining to the SSI, DSS,
USBHOST, and HSOTGUSB devices. These devices are both interconnect
initiators and targets. Without this patch, clk_enable()s on clocks for
these modules can be very high latency (potentially up to ~200
milliseconds) and message such as the following are generated:
Clock usbhost_48m_fck didn't enable in 100000 tries
Two bugs are fixed by this patch. First, OMAP hardware only supports
target CM_IDLEST register bits on ES2+ chips and beyond. ES1 chips
should not wait for these clocks to enable. So, split the appropriate
clocks into ES1 and ES2+ variants, so that kernels running on ES1
devices won't try to wait.
Second, the current heuristic in omap2_clk_dflt_find_idlest() will
fail for these clocks. It assumes that the CM_IDLEST bit to wait upon
is the same as the CM_*CLKEN bit, which is false[1]. Fix by
implementing custom clkops .find_idlest function pointers for the
appropriate clocks that return the correct slave IDLEST bit shift.
This was originally fixed in the linux-omap kernel during 2.6.29 in a
slightly different manner[2][3].
In the medium-term future, all of the module IDLEST code will
eventually be moved to the omap_hwmod code.
Problem reported by Jarkko Nikula <jhnikula@gmail.com>:
http://marc.info/?l=linux-omap&m=124306184903679&w=2
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1. See for example 34xx TRM Revision P Table 4-213 and 4-217 (for the
DSS case).
2. http://www.spinics.net/lists/linux-omap/msg05512.html et seq.
3. http://lkml.indiana.edu/hypermail/linux/kernel/0901.3/01498.html
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Jarkko Nikula <jhnikula@gmail.com>
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OMAP2430 I2CHS CM_IDLEST bits are in CM_IDLEST1_CORE, but the CM_*CLKEN bits
are in CM_{I,F}CLKEN2_CORE [1]. Fix by implementing a custom clkops
.find_idlest function to return the correct slave IDLEST register.
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1. OMAP2430 Multimedia Device Package-on-Package (POP) Silicon Revision 2.1
(Rev. V) Technical Reference Manual, tables 4-99 and 4-105.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Some OMAP2/3 hardware modules have CM_IDLEST attributes that are not
handled by the current omap2_wait_clock_ready() code. In preparation
for patches that fix the unusual devices, rename the function
omap2_wait_clock_ready() to omap2_wait_module_ready() and split it
into three parts:
1. A clkops-specific companion clock return function (by default,
omap2_clk_dflt_find_companion())
2. A clkops-specific CM_IDLEST register address and bit shift return
function (by default, omap2_clk_dflt_find_idlest())
3. Code to wait for the CM to indicate that the module is ready
(omap2_cm_wait_idlest())
Clocks can now specify their own custom find_companion() and find_idlest()
functions; used in subsequent patches.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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The clock stabilization delay post a M2 divider change is needed
even before a SDRC interface clock re-enable and not only before
jumping back to SDRAM.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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This patch fixes a bug in the CORE dpll scaling sequence which was
errouneously clearing some bits in the SDRC DLLA CTRL register and
hence causing a freeze. The issue was observed only on platforms
which scale CORE dpll to < 83Mhz and hence program the DLL in fixed
delay mode.
Issue reported by Limei Wang <E12499@motorola.com>, with debugging
assistance from Richard Woodruff <r-woodruff2@ti.com> and Girish
Ghongdemath <girishsg@ti.com>.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Cc: Limei Wang <E12499@motorola.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Girish Ghongdemath <girishsg@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
[paul@pwsan.com: updated patch description to include collaboration credits]
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Stop setting SDRC_POWER.PWDENA on boot. There is a nasty erratum
(34xx erratum 1.150) that can cause memory corruption if PWDENA is
enabled.
Based originally on a patch from Samu P. Onkalo <samu.p.onkalo@nokia.com>.
Tested on BeagleBoard rev C2.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Samu P. Onkalo <samu.p.onkalo@nokia.com>
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This patches ensures the MUX settings are correct for the SDRC
CKE signals to SDRAM. This allows the self-refresh to work when
2 chip-selects are in use.
A warning is thrown away in case the initial muxing is incorrect,
in order to track faulty or old-dated bootloaders.
Note: The CONFIG_OMAP_MUX and CONFIG_OMAP_MUX_WARNINGS options
must be enabled for the mux code to have effect.
Signed-off-by: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Some OMAP3 boards (Beagle Cx, Overo, RX51, Pandora) have 2
SDRAM parts connected to the SDRC.
This patch adds the following:
- add a new argument of type omap_sdrc_params struct*
to omap2_init_common_hw and omap2_sdrc_init for the 2nd CS params
- adapted the OMAP boards files to the new prototype of
omap2_init_common_hw
- add the SDRC 2nd CS registers offsets defines
- adapt the sram sleep code to configure the SDRC for the 2nd CS
Note: If the 2nd param to omap2_init_common_hw is NULL, then the
parameters are not programmed into the SDRC CS1 registers
Tested on 3430 SDP and Beagleboard rev C2 and B5, with
suspend/resume and frequency changes (cpufreq).
Signed-off-by: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
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Added REGULATOR, MMC and updated default CMDLINE so RX51 now boots.
Note that the regulator code should be moved from mmc-twl4030.c
to omap_hsmmc.c so it can be a module.
Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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twl_mmc_cleanup() must free up the regulators that were
allocated by twl_mmc_late_init().
This eliminates the below error when 'omap_hsmmc' module is
repeatedly loaded and unloaded.
"sysfs: cannot create duplicate filename '/devices/platform
/mmci-omap-hs.0/microamps_requested_vmmc'"
Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add OTG transceiver to RX51 platform data to prevent kernel NULL pointer
dereference during MUSB initialisation.
Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Fixes a wrong setting of resource parameter list in
SMSC911x platform driver data structure for Overo case.
This fixes folowing warning when compiling for Overo board:
warning: initialization from incompatible pointer type
Introduced since commit id:
commit 172ef275444efa12d834fb9d1b1acdac92db47f7
Author: Steve Sakoman <sakoman@gmail.com>
Date: Mon Feb 2 06:27:49 2009 +0000
ARM: Add SMSC911X support to Overo platform (V2)
Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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vmalloc size
commit e85c205ac1427f2405021a36f083280ff0d0a35e increase vmalloc size.
vmalloc space will overlap with OMAP3 sram virtual address.
Signed-off-by: Li Hong Mei <hong-mei.li@motorola.com>
Signed-off-by: Janboe Ye <yuan-bo.ye@motorola.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
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This errata is valid for:
OMAP2420 Errata 1.85 Impacts all 2420 ES rev
OMAP2430 Errata 1.10 Impacts only ES1.0
Description: DMA may hang when several channels are used in parallel
OMAP3430: Not impacted, so remove the errata fix for omap3
Fixed issue reported on cpu_is_omap24xx check reported by Nishant Kamat
Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Reviewed-by: Nishant Kamat <nskamat@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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There's no need to keep these defines limited in the ifdef block
for mach-omap2. It will just cause problems testing for the CPU
revision in the common code, like the next patch does for the DMA
errata.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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gpio_get() should return DATAIN register value when the GPIO
is configured as input whereas it should return DATAOUT register
value when the GPIO is configured as output.
Now /sys/kernel/debug/gpio shows proper values for output GPIOs
Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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OMAP3EVM uses ISP1504 phy which doesn't require any programming and
thus has to use NOP otg transceiver.
Cleanups being done:
- Remove unwanted code in usb-musb.c file
- Register NOP in OMAP3EVM board file using
usb_nop_xceiv_register().
- Select NOP_USB_XCEIV for OMAP3EVM boards.
- Don't enable TWL4030_USB in omap3_evm_defconfig
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Eino-Ville Talvala <talvala@stanford.edu>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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* master.kernel.org:/home/rmk/linux-2.6-arm: (30 commits)
ARM: 5639/1: arm: clkdev.c should include <linux/clk.h>
ARM: 5638/1: arch/arm/kernel/signal.c: use correct address space for CRUNCH
ARM: 5637/1: [KS8695] Don't reference CLOCK_TICK_RATE in drivers
ARM: S3C64XX: serial: Fix section mismatch warning
ARM: S3C24XX: serial: Fix section mismatch warnings
ARM: S3C: PWM fix for low duty cycle
ARM: 5597/1: [PCI] reset all internal hardware prior PCI initialization
ARM: 5627/1: Fix restoring of lr at the end of mcount
ARM: 5624/1: Document cache aliasing region
S3C64XX: Fix ARMCLK configuration
S3C64XX: Fix get_rate() for ARMCLK
S3C24XX: GPIO: Fix pin range check in s3c_gpiolib_getchip
mx3 defconfig update
mx27 defconfig update
ARM: 5623/1: Treo680: ir shutdown typo fix
ARM: includecheck fix: plat-stmp3xxx/pinmux.c
ARM: includecheck fix: plat-s3c64xx/pm.c
ARM: includecheck fix: mach-omap2/mcbsp.c
ARM: includecheck fix: mach-omap1/mcbsp.c
ARM: includecheck fix: board-sffsdr.c
...
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<linux/clk.h> should be included to get the base API prototypes.
This fixes the following sparse warnings:
arch/arm/common/clkdev.c:65:12:
warning: symbol 'clk_get_sys' was not declared. Should it be static?
arch/arm/common/clkdev.c:79:12:
warning: symbol 'clk_get' was not declared. Should it be static?
arch/arm/common/clkdev.c:87:6:
warning: symbol 'clk_put' was not declared. Should it be static?
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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preserve_crunch_context() calls __copy_to_user() which expects the
destination address to be in __user space. setup_sigframe() properly
passes the destination address.
restore_crunch_context() calls __copy_from_user() which expects the
source address to be in __user space. restore_sigframe() properly
passes the source address.
This fixes {preserve/restore}_crunch_context() to accept the
address as __user space and resolves the following sparse warnings:
arch/arm/kernel/signal.c:146:31:
warning: incorrect type in argument 1 (different address spaces)
expected void [noderef] <asn:1>*to
got struct crunch_sigframe *frame
arch/arm/kernel/signal.c:156:38:
warning: incorrect type in argument 2 (different address spaces)
expected void const [noderef] <asn:1>*from
got struct crunch_sigframe *frame
arch/arm/kernel/signal.c:250:48:
warning: incorrect type in argument 1 (different address spaces)
expected struct crunch_sigframe *frame
got struct crunch_sigframe [noderef] <asn:1>*<noident>
arch/arm/kernel/signal.c:365:49:
warning: incorrect type in argument 1 (different address spaces)
expected struct crunch_sigframe *frame
got struct crunch_sigframe [noderef] <asn:1>*<noident>
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Stop referencing CLOCK_TICK_RATE in the KS8695 drivers, rather refer
to a KS8695_CLOCK_RATE.
Issue pointed out by Russell King on arm-linux-kernel mailing list.
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The pwm hardware only checks the compare register after a decrement,
so the pin never toggles if tcmp = tcnt.
This happens when a very low duty cycle is requested. Fix it by always
ensuring that tcmp < tcnt.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Make software reset to avoid freeze if PCI bus was messed up
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The value of armclk_mask needs to be inverted for use as a mask on
the register value when updating ARM_RATIO.
This is critical for cpufreq support, without it attempts to scale
the frequency of the core trash pretty much the entire clock tree.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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If the requested clock is faster than the parent clock then the
parent clock is the closest we can get to the request so we need
to return that instead of the requested clock.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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In the s3c_gpiolib_getchip implementation for s3c24xx the check whether a pin is
in the gpio banks range is reversed. Thus the function returns NULL for valid
pins and the gpio chip if its not valid.
As a result gpio states are not saved/restored properly during suspend/resume.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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git://git.pengutronix.de/git/imx/linux-2.6
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- enable PCM043, MX31LILLY, ARMADILLO5X0 and MX35_3DS boards
- enable MXC nand driver
- enable UBI support
- disable cs89x0 support which broke all boards which do not have this chip
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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- enable MX27_3DS and MX27LITE Board
- enable MXC nand driver
- enable UBI support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
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If CONFIG_APM_EMULATION=n em-x270 build fails with linker error:
arch/arm/mach-pxa/built-in.o: In function `em_x270_battery_critical': em-x270.c:(.text+0x12c0): undefined reference to `apm_queue_event'
arch/arm/mach-pxa/built-in.o: In function `em_x270_battery_low': em-x270.c:(.text+0x12c8): undefined reference to `apm_queue_event'
make: *** [.tmp_vmlinux1] Error 1
Fix it.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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WARNING: at drivers/gpio/gpiolib.c:83 gpio_ensure_requested+0x58/0xbc()
autorequest GPIO-71
Modules linked in:
[<c0028bd0>] (unwind_backtrace+0x0/0xe8) from [<c003c328>] (warn_slowpath_common+0x48/0x78)
[<c003c328>] (warn_slowpath_common+0x48/0x78) from [<c003c394>] (warn_slowpath_fmt+0x28/0x38)
[<c003c394>] (warn_slowpath_fmt+0x28/0x38) from [<c0146128>] (gpio_ensure_requested+0x58/0xbc)
[<c0146128>] (gpio_ensure_requested+0x58/0xbc) from [<c0146308>] (gpio_direction_input+0x80/0xf4)
[<c0146308>] (gpio_direction_input+0x80/0xf4) from [<c000c668>] (zylonite_pxa300_init+0x108/0x214)
[<c000c668>] (zylonite_pxa300_init+0x108/0x214) from [<c000c4e4>] (zylonite_init+0x8/0x84)
[<c000c4e4>] (zylonite_init+0x8/0x84) from [<c00097cc>] (customize_machine+0x18/0x24)
[<c00097cc>] (customize_machine+0x18/0x24) from [<c00222e0>] (do_one_initcall+0x30/0x1b0)
[<c00222e0>] (do_one_initcall+0x30/0x1b0) from [<c00083f4>] (kernel_init+0xa4/0x11c)
[<c00083f4>] (kernel_init+0xa4/0x11c) from [<c0023f3c>] (kernel_thread_exit+0x0/0x8)
---[ end trace 1b75b31a2719ed1c ]---
This issue is caused by using gpio pin without request. Add gpio_request()
into zylonite. To simplify the code, error checking is omitted since this
is being performed early.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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