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* Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2013-08-03
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm fixes fixes from Russell King: "This fixes a couple of problems with commit 48be69a026b2 ("ARM: move signal handlers into a vdso-like page"), one of which was originally discovered via my testing originally, but the fix for it was never actually committed. The other shows up on noMMU builds, and such platforms are extremely rare and as such are not part of my nightly testing" * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: fix nommu builds with 48be69a02 (ARM: move signal handlers into a vdso-like page) ARM: fix a cockup in 48be69a02 (ARM: move signal handlers into a vdso-like page)
| * Merge branch 'security-fixes' into fixesRussell King2013-08-03
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| | * ARM: fix nommu builds with 48be69a02 (ARM: move signal handlers into a ↵Russell King2013-08-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vdso-like page) Olof reports that noMMU builds error out with: arch/arm/kernel/signal.c: In function 'setup_return': arch/arm/kernel/signal.c:413:25: error: 'mm_context_t' has no member named 'sigpage' This shows one of the evilnesses of IS_ENABLED(). Get rid of it here and replace it with #ifdef's - and as no noMMU platform can make use of sigpage, depend on CONIFG_MMU not CONFIG_ARM_MPU. Reported-by: Olof Johansson <olof@lixom.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: fix a cockup in 48be69a02 (ARM: move signal handlers into a vdso-like page)Russell King2013-08-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunately, I never committed the fix to a nasty oops which can occur as a result of that commit: ------------[ cut here ]------------ kernel BUG at /home/olof/work/batch/include/linux/mm.h:414! Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 490 Comm: killall5 Not tainted 3.11.0-rc3-00288-gabe0308 #53 task: e90acac0 ti: e9be8000 task.ti: e9be8000 PC is at special_mapping_fault+0xa4/0xc4 LR is at __do_fault+0x68/0x48c This doesn't show up unless you do quite a bit of testing; a simple boot test does not do this, so all my nightly tests were passing fine. The reason for this is that install_special_mapping() expects the page array to stick around, and as this was only inserting one page which was stored on the kernel stack, that's why this was blowing up. Reported-by: Olof Johansson <olof@lixom.net> Tested-by: Olof Johansson <olof@lixom.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2013-08-02
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King: "I've thought long and hard about what to say for this pull request, and I really can't work out anything sane to say to summarise much of these commits. The problem is, for most of these are, yet again, lots of small bits scattered around the place without any real overall theme to them" Most notable is probably the kuser page helper improvements. * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: (22 commits) ARM: Add .text annotations where required after __CPUINIT removal ARM: 7803/1: Fix deadlock scenario with smp_send_stop() ARM: make vectors page inaccessible from userspace ARM: move signal handlers into a vdso-like page ARM: allow kuser helpers to be removed from the vector page ARM: update FIQ support for relocation of vectors ARM: use linker magic for vectors and vector stubs ARM: move vector stubs ARM: poison memory between kuser helpers ARM: poison the vectors page ARM: 7801/1: v6: prevent gcc 4.5 from reordering extended CP15 reads above is_smp() test ARM: 7800/1: ARMv7-M: Fix name of NVIC handler function ARM: Fix sorting of machine- initializers ARM: 7791/1: a.out: remove partial a.out support ARM: 7790/1: Fix deferred mm switch on VIVT processors ARM: 7789/1: Do not run dummy_flush_tlb_a15_erratum() on non-Cortex-A15 ARM: 7787/1: virt: ensure visibility of __boot_cpu_mode ARM: 7788/1: elf: fix lpae hwcap feature reporting in proc/cpuinfo ARM: 7786/1: hyp: fix macro parameterisation ARM: 7785/1: mm: restrict early_alloc to section-aligned memory ...
| * | Merge branch 'security-fixes' into fixesRussell King2013-08-01
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| | * ARM: make vectors page inaccessible from userspaceRussell King2013-08-01
| | | | | | | | | | | | | | | | | | | | | | | | If kuser helpers are not provided by the kernel, disable user access to the vectors page. With the kuser helpers gone, there is no reason for this page to be visible to userspace. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: move signal handlers into a vdso-like pageRussell King2013-08-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the signal handlers into a VDSO page rather than keeping them in the vectors page. This allows us to place them randomly within this page, and also map the page at a random location within userspace further protecting these code fragments from ROP attacks. The new VDSO page is also poisoned in the same way as the vector page. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: allow kuser helpers to be removed from the vector pageRussell King2013-07-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a kernel configuration option to allow the kernel user helpers to be removed from the vector page, thereby preventing their use with ROP (return orientated programming) attacks. This option is only visible for CPU architectures which natively support all the operations which kernel user helpers would normally provide, and must be enabled with caution. Cc: <stable@vger.kernel.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: update FIQ support for relocation of vectorsRussell King2013-07-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FIQ should no longer copy the FIQ code into the user visible vector page. Instead, it should use the hidden page. This change makes that happen. Cc: <stable@vger.kernel.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: use linker magic for vectors and vector stubsRussell King2013-07-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use linker magic to create the vectors and vector stubs: we can tell the linker to place them at an appropriate VMA, but keep the LMA within the kernel. This gets rid of some unnecessary symbol manipulation, and have the linker calculate the relocations appropriately. Cc: <stable@vger.kernel.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: move vector stubsRussell King2013-07-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the machine vector stubs into the page above the vector page, which we can prevent from being visible to userspace. Also move the reset stub, and place the swi vector at a location that the 'ldr' can get to it. This hides pointers into the kernel which could give valuable information to attackers, and reduces the number of exploitable instructions at a fixed address. Cc: <stable@vger.kernel.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: poison memory between kuser helpersRussell King2013-07-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | Poison the memory between each kuser helper. This ensures that any branch between the kuser helpers will be appropriately trapped. Cc: <stable@vger.kernel.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: poison the vectors pageRussell King2013-07-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fill the empty regions of the vectors page with an exception generating instruction. This ensures that any inappropriate branch to the vector page is appropriately trapped, rather than just encountering some code to execute. (The vectors page was filled with zero before, which corresponds with the "andeq r0, r0, r0" instruction - a no-op.) Cc: <stable@vger.kernel.org> Acked-by Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: Add .text annotations where required after __CPUINIT removalRussell King2013-08-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8bd26e3a7 (arm: delete __cpuinit/__CPUINIT usage from all ARM users) caused some code to leak into sections which are discarded through the removal of __CPUINIT annotations. Add appropriate .text annotations to bring these back into the kernel text. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7803/1: Fix deadlock scenario with smp_send_stop()Stephen Boyd2013-08-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If one process calls sys_reboot and that process then stops other CPUs while those CPUs are within a spin_lock() region we can potentially encounter a deadlock scenario like below. CPU 0 CPU 1 ----- ----- spin_lock(my_lock) smp_send_stop() <send IPI> handle_IPI() disable_preemption/irqs while(1); <PREEMPT> spin_lock(my_lock) <--- Waits forever We shouldn't attempt to run any other tasks after we send a stop IPI to a CPU so disable preemption so that this task runs to completion. We use local_irq_disable() here for cross-arch consistency with x86. Reported-by: Sundarajan Srinivasan <sundaraj@codeaurora.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7801/1: v6: prevent gcc 4.5 from reordering extended CP15 reads above ↵Paul Walmsley2013-07-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | is_smp() test Commit 621a0147d5c921f4cc33636ccd0602ad5d7cbfbc ("ARM: 7757/1: mm: don't flush icache in switch_mm with hardware broadcasting") breaks the boot on OMAP2430SDP with omap2plus_defconfig. Tracked to an undefined instruction abort from the CP15 read in cache_ops_need_broadcast(). It turns out that gcc 4.5 reorders the extended CP15 read above the is_smp() test. This breaks ARM1136 r0 cores, since they don't support several CP15 registers that later ARM cores do. ARM1136JF-S TRM section 3.2.1 "Register allocation" has the details. So mark the extended CP15 read as clobbering memory, which prevents the compiler from reordering it before the is_smp() test. Russell states that the code generated from this approach is preferable to marking the inline asm as volatile. Remove the existing condition code clobber as it's obsolete, per Nico's post: http://www.spinics.net/lists/arm-kernel/msg261208.html This patch is a collaboration with Will Deacon and Russell King. Comments from Paul Walmsley: Russell, if you accept this one, might you also add Will's ack from the lists: Comments from Paul Walmsley: I'd also be obliged if you could add a Cc: line for Jonathan Austin, since he helped test: Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Jonathan Austin <jonathan.austin@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7800/1: ARMv7-M: Fix name of NVIC handler functionUwe Kleine-König2013-07-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | The name changed in response to review comments for the nvic irqchip driver when the original name was already accepted into Russell King's tree. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: Fix sorting of machine- initializersRussell King2013-07-26
| | | | | | | | | | | | | | | | | | | | | So, there's a comment I put at the top of this, which people seem to fail to read. So let's fix it for them instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7791/1: a.out: remove partial a.out supportWill Deacon2013-07-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a.out support on ARM requires that argc, argv and envp are passed in r0-r2 respectively, which requires hacking load_aout_binary to prevent argc being clobbered by the return code. Whilst mainline kernels do set the registers up in start_thread, the aout loader has never carried the hack in mainline. Initialising the registers in this way actually goes against the libc expectations for ELF binaries, where argc, argv and envp are passed on the stack, with r0 being used to hold a pointer to an exit function for cleaning up after the dynamic linker if required. If the pointer is NULL, then it is ignored. When execing an ELF binary, Linux currently zeroes r0, then sets it to argc and then finally clobbers it with the return value of the execve syscall, so we actually end up with: r0 = 0 stack[0] = argc r1 = stack[1] = argv r2 = stack[2] = envp libc treats r1 and r2 as undefined. The clobbering of r0 by sys_execve works for user-spawned threads, but when executing an ELF binary from a kernel thread (via call_usermodehelper), the execve is performed on the ret_from_fork path, which restores r0 from the saved pt_regs, resulting in argc being presented to the C library. This has horrible consequences when the application exits, since we have an exit function registered using argc, resulting in a jump to hyperspace. This patch solves the problem by removing the partial a.out support from arch/arm/ altogether. Cc: <stable@vger.kernel.org> Cc: Ashish Sangwan <ashishsangwan2@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7790/1: Fix deferred mm switch on VIVT processorsCatalin Marinas2013-07-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As of commit b9d4d42ad9 (ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on pre-ARMv6 CPUs), the mm switching on VIVT processors is done in the finish_arch_post_lock_switch() function to avoid whole cache flushing with interrupts disabled. The need for deferred mm switch is stored as a thread flag (TIF_SWITCH_MM). However, with preemption enabled, we can have another thread switch before finish_arch_post_lock_switch(). If the new thread has the same mm as the previous 'next' thread, the scheduler will not call switch_mm() and the TIF_SWITCH_MM flag won't be set for the new thread. This patch moves the switch pending flag to the mm_context_t structure since this is specific to the mm rather than thread. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Marc Kleine-Budde <mkl@pengutronix.de> Tested-by: Marc Kleine-Budde <mkl@pengutronix.de> Cc: <stable@vger.kernel.org> # 3.5+ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7789/1: Do not run dummy_flush_tlb_a15_erratum() on non-Cortex-A15Fabio Estevam2013-07-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 93dc688 (ARM: 7684/1: errata: Workaround for Cortex-A15 erratum 798181 (TLBI/DSB operations)) causes the following undefined instruction error on a mx53 (Cortex-A8): Internal error: Oops - undefined instruction: 0 [#1] SMP ARM CPU: 0 PID: 275 Comm: modprobe Not tainted 3.11.0-rc2-next-20130722-00009-g9b0f371 #881 task: df46cc00 ti: df48e000 task.ti: df48e000 PC is at check_and_switch_context+0x17c/0x4d0 LR is at check_and_switch_context+0xdc/0x4d0 This problem happens because check_and_switch_context() calls dummy_flush_tlb_a15_erratum() without checking if we are really running on a Cortex-A15 or not. To avoid this issue, only call dummy_flush_tlb_a15_erratum() inside check_and_switch_context() if erratum_a15_798181() returns true, which means that we are really running on a Cortex-A15. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7787/1: virt: ensure visibility of __boot_cpu_modeMark Rutland2013-07-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Secondary CPUs write to __boot_cpu_mode with caches disabled, and thus a cached value of __boot_cpu_mode may be incoherent with that in memory. This could lead to a failure to detect mismatched boot modes. This patch adds flushing to ensure that writes by secondaries to __boot_cpu_mode are made visible before we test against it. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Dave Martin <Dave.Martin@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Christoffer Dall <cdall@cs.columbia.edu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7788/1: elf: fix lpae hwcap feature reporting in proc/cpuinfoTetsuyuki Kobayashi2013-07-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit a469abd0f868 ("ARM: elf: add new hwcap for identifying atomic ldrd/strd instructions") added a new hwcap to identify LPAE on CPUs which support it. Whilst the hwcap data is correct, the string reported in /proc/cpuinfo actually matches on HWCAP_VFPD32, which was missing an entry in the string table. This patch fixes this problem by adding a "vfpd32" string at the correct offset, preventing us from falsely advertising LPAE on CPUs which do not support it. [will: added commit message] Acked-by: Will Deacon <will.deacon@arm.com> Tested-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7786/1: hyp: fix macro parameterisationMark Rutland2013-07-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, compare_cpu_mode_with_primary uses a mixture of macro arguments and hardcoded registers, and does so incorrectly, as it stores (__boot_cpu_mode_offset | BOOT_CPU_MODE_MISMATCH) to (__boot_cpu_mode + &__boot_cpu_mode_offset), which could corrupt an arbitrary portion of memory. This patch fixes up compare_cpu_mode_with_primary to use the macro arguments, correctly updating __boot_cpu_mode. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Dave Martin <Dave.Martin@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Christoffer Dall <cdall@cs.columbia.edu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7785/1: mm: restrict early_alloc to section-aligned memoryRussell King2013-07-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When map_lowmem() runs, and processes a memory bank whose start or end is not section-aligned, memory must be allocated to store the 2nd-level page tables. Those allocations are made by calling memblock_alloc(). At this point, the only memory that is free *and* mapped is memory which has already been mapped by map_lowmem() itself. For this reason, we must calculate the first point at which map_lowmem() will need to allocate memory, and set the memblock allocation limit to a lower address, so that memblock_alloc() is guaranteed to return memory that is already mapped. This patch enhances sanity_check_meminfo() to calculate that memory address, and pass it to memblock_set_current_limit(), rather than just assuming the limit is arm_lowmem_limit. The algorithm applied is: * Default memblock_limit to arm_lowmem_limit in the absence of any other limit; arm_lowmem_limit is the highest memory that is mapped by map_lowmem(). * While walking the list of memblocks, if the start of a block is not aligned, 2nd-level page tables will need to be allocated to map the first few pages of the block. Hence, the memblock_limit must be before the start of the block. * Similarly, if the end of any block is not aligned, 2nd-level page tables will need to be allocated to map the last few pages of the block. Hence, the memblock_limit must point at the end of the block, rounded down to section-alignment. * The memory blocks are assumed to be sorted in address order, so the first unaligned block start or end is used to set the limit. With this algorithm, the start or end of almost any bank can be non- section-aligned. The only exception is that the start of bank 0 must be section-aligned, since otherwise memory would need to be allocated when mapping the start of bank 0, which occurs before any free memory is mapped. [swarren, wrote commit description, rewrote calculation of memblock_limit] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7784/1: mm: ensure SMP alternates assemble to exactly 4 bytes with Thumb-2Will Deacon2013-07-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ae8a8b9553bd ("ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead") added early function returns for page table cache flushing operations on ARMv7 SMP CPUs. Unfortunately, when targetting Thumb-2, these `mov pc, lr' sequences assemble to 2 bytes which can lead to corruption of the instruction stream after code patching. This patch fixes the alternates to use wide (32-bit) instructions for Thumb-2, therefore ensuring that the patching code works correctly. Cc: <stable@vger.kernel.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: document DEBUG_UNCOMPRESS Kconfig optionRussell King2013-07-22
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This non-user visible option lacked any kind of documentation. This is quite common for non-user visible options; certian people can't understand the point of documenting such options with help text. However, here we have a case in point: developers don't understand the option either, as they were thinking that when the option is not set, the decompressor should produce no output what so ever. This is incorrect, as the purpose of this option is to control whether a multiplatform kernel uses the kernel debugging macros to produce output or not. So let's document this via help rather than commentry to prevent others falling into this misunderstanding. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge tag 'xen-arm-3.11-rc2-warn-tag' of ↵Linus Torvalds2013-07-31
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/sstabellini/xen Pull Xen ARM fix from Stefano Stabellini. Update xen_restart to new calling convention. * tag 'xen-arm-3.11-rc2-warn-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/sstabellini/xen: xen/arm,arm64: update xen_restart after ff701306cd49 and 7b6d864b48d9
| * | xen/arm,arm64: update xen_restart after ff701306cd49 and 7b6d864b48d9Stefano Stabellini2013-07-23
| |/ | | | | | | | | | | | | | | | | Commit 7b6d864b48d9 (reboot: arm: change reboot_mode to use enum reboot_mode) and ff701306cd49 (arm64: use common reboot infrastructure) change the prototype of arm_pm_restart on arm and arm64. Update xen_restart accordingly. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
* | Merge tag 'pinctrl-for-v3.11-2' of ↵Linus Torvalds2013-07-28
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: - Driver fixes for AM33xx, SIRF and PFC pin controllers - Fix a compile warning from the pinctrl single-register driver - Fix a little nasty memory leak * tag 'pinctrl-for-v3.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: fix a memleak when freeing maps pinctrl: pinctrl-single: fix compile warning when no CONFIG_PM pinctrl: sh-pfc: fix SDHI0 VccQ regulator on sh73a0 with DT arm/dts: sirf: fix the pingroup name mismatch between drivers and dts pinctrl: sirf: add usp0_uart_nostreamctrl pin group for usp-uart without flowctrl pinctrl: sirf: fix the pin number and mux bit for usp0 pinctrl: am33xx dt binding: correct include path
| * | arm/dts: sirf: fix the pingroup name mismatch between drivers and dtsBarry Song2013-07-21
| | | | | | | | | | | | | | | | | | | | | | | | in drivers/pinctrl/sirf, pingroup name is cko0 and cko1, but in dts, they are cko0 and cko1_rst. this patch fixes the error in dts. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: sirf: add usp0_uart_nostreamctrl pin group for usp-uart without ↵Qipan Li2013-07-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flowctrl this patch adds the lost pin group which supports to let USP0 to simulate a UART without hardware flow control. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | Merge tag 'samsung-fixes-1' of ↵Olof Johansson2013-07-24
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes From Kukjin Kim: Samsung fixes for v3.11 - fix kernel booting on exynos5440 skip pm which is not supported update regarding LPAE features - fix s3c2440 uart with adding clkdev entries - fix compilatioin for Samsung SoCs with selecting pm - update ARCH_NR_GPIO to support exynos4412 has more gpios * tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Update CONFIG_ARCH_NR_GPIO for Exynos ARM: EXYNOS: Fix low level debug support ARM: SAMSUNG: Save/restore only selected uart's registers ARM: SAMSUNG: Add SAMSUNG_PM config option to select pm ARM: S3C24XX: Add missing clkdev entries for s3c2440 UART ARM: EXYNOS: Enable 64-bit DMA for EXYNOS5440 if LPAE is enabled ARM: EXYNOS: change the PHYSMEM_BITS and SECTION_SIZE ARM: EXYNOS: skip pm support on exynos5440 Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: EXYNOS: Update CONFIG_ARCH_NR_GPIO for ExynosSachin Kamat2013-07-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the recent cleanup in Exynos platform code notably commits 17859bec ("ARM: EXYNOS: Do not select legacy Kconfig symbols any more") and b9222210 ("ARM: EXYNOS: Remove mach/gpio.h"), the definition of ARCH_NR_GPIOS got removed. This started causing problems on SoCs like Exynos4412 which have more than the default number of GPIOs. Thus define this number in KConfig file which takes care of current SoC requirements and provides scope for GPIO expanders. Without this patch we get the following errors during boot: gpiochip_add: gpios 251..258 (gpv0) failed to register samsung-pinctrl 106e0000.pinctrl: failed to register gpio_chip gpv0, error code: -22 samsung-pinctrl: probe of 106e0000.pinctrl failed with error -22 Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Cc: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: Fix low level debug supportYadwinder Singh Brar2013-07-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Presently, using exynos_defconfig with CONFIG_DEBUG_LL and CONFIG_EARLY_PRIN on, kernel is not booting, we are getting following: [ 0.000000] ------------[ cut here ]------------ [ 0.000000] kernel BUG at mm/vmalloc.c:1134! [ 0.000000] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 3.11.0-rc1 #633 [ 0.000000] task: c052ec48 ti: c0524000 task.ti: c0524000 [ 0.000000] PC is at vm_area_add_early+0x54/0x94 [ 0.000000] LR is at add_static_vm_early+0xc/0x60 Its because exynos[4/5]_map_io() function ioremaps a single 512KB memory size for all the four uart ports which envelopes the mapping created by debug_ll_io_init(), called earlier in exynos_init_io(). This patch removes iodesc entries for UART controller for all Samsung SoC's, since now the Samsung uart driver does a ioremap during probe and any needed iomapping for earlyprintk will be handled by debug_ll_io_init(). Tested on smdk4412 and smdk5250. Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: SAMSUNG: Save/restore only selected uart's registersYadwinder Singh Brar2013-07-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Basically this code gets executed only during debugging i.e when DEBUG_LL & SAMSUNG_PM_DEBUG is on, so required only for UART used for debugging. Since we are removing static iodesc entries for UARTs, so now only the selected (CONFIG_DEBUG_S3C_UART) UART will be ioremapped by the debug_ll_io_init() for DEBUG_LL, so save/restore uart registers only for selected uart. Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: SAMSUNG: Add SAMSUNG_PM config option to select pmAmit Daniel Kachhap2013-07-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the selection of samsung pm related stuffs when SAMSUNG_PM config is enabled and not just when generic PM config is enabled. Power management for s3c64XX and s3c24XX is enabled by default and for other platform depends on S5P_PM. This patch also fixes the following compilation error's when compiling a platform like exynos5440 which does not select pm stuffs. arch/arm/mach-exynos/built-in.o: In function '__virt_to_phys': linux/arch/arm/include/asm/memory.h:175: undefined reference to 's3c_cpu_resume' linux/arch/arm/include/asm/memory.h:175: undefined reference to 's3c_cpu_resume' linux/arch/arm/include/asm/memory.h:175: undefined reference to 's3c_cpu_resume' linux/arch/arm/include/asm/memory.h:175: undefined reference to 's3c_cpu_resume' arch/arm/mach-exynos/built-in.o: In function 'exynos5_init_irq': linux/arch/arm/mach-exynos/common.c:492: undefined reference to 's3c_irq_wake' linux/arch/arm/mach-exynos/common.c:492: undefined reference to 's3c_irq_wake' arch/arm/mach-exynos/built-in.o: In function 'exynos4_init_irq': linux/arch/arm/mach-exynos/common.c:476: undefined reference to 's3c_irq_wake' linux/arch/arm/mach-exynos/common.c:476: undefined reference to 's3c_irq_wake' arch/arm/plat-samsung/built-in.o: In function 's3c_irqext_wake': linux/arch/arm/plat-samsung/pm.c:144: undefined reference to 's3c_irqwake_eintallow' linux/arch/arm/plat-samsung/pm.c:144: undefined reference to 's3c_irqwake_eintallow' arch/arm/plat-samsung/built-in.o: In function 's3c_pm_enter': linux/arch/arm/plat-samsung/pm.c:263: undefined reference to 's3c_irqwake_intallow' linux/arch/arm/plat-samsung/pm.c:263: undefined reference to 's3c_irqwake_intallow' linux/arch/arm/plat-samsung/pm.c:264: undefined reference to 's3c_irqwake_eintallow' linux/arch/arm/plat-samsung/pm.c:264: undefined reference to 's3c_irqwake_eintallow' linux/arch/arm/plat-samsung/pm.c:275: undefined reference to 's3c_pm_save_core' linux/arch/arm/plat-samsung/pm.c:279: undefined reference to 's3c_pm_configure_extint' linux/arch/arm/plat-samsung/pm.c:310: undefined reference to 's3c_pm_restore_core' make: *** [vmlinux] Error 1 Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: S3C24XX: Add missing clkdev entries for s3c2440 UARTSylwester Nawrocki2013-07-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch restores serial port operation which has been broken since commit 60e93575476f ("serial: samsung: enable clock before clearing pending interrupts during init") That commit only uncovered the real issue which was missing clkdev entries for the "uart" clocks on S3C2440. It went unnoticed so far because return value of clk API calls were not being checked at all in the samsung serial port driver. This patch should be backported to at least 3.10 stable kernel, since the serial port has not been working on s3c2440 since 3.10-rc5. Cc: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> [on S3C2440 SoC based Mini2440 board] Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Tested-by: Juergen Beisert <jbe@pengutronix.de> Cc: <stable@vger.kernel.org> [3.10] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: Enable 64-bit DMA for EXYNOS5440 if LPAE is enabledThomas Abraham2013-07-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow 64-bit DMA addresses if LPAE is enabled on EXYNOS5440. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: change the PHYSMEM_BITS and SECTION_SIZESubash Patel2013-07-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On EXYNOS5440 there is DRAM on the 36-bit address range. Hence this patch converts the MAX_PHYSMEM_BITS macro to 36 if LPAE is enabled for the ARM architecture. The conventional section size on EXYNOS is 256M due to sparsemem. Since EXYNOS5440 has memory in multiples of 1G in 32-bit and 36-bit range, this has now been modified to 31. Signed-off-by: Subash Patel <subash.rp@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: skip pm support on exynos5440Kukjin Kim2013-07-15
| |/ / | | | | | | | | | | | | | | | | | | | | | EXYNOS5440 doesn't support PM and current single image for EXYNOS will be break without this patch. Actually, SSDK5440 cannot boot without this so this should be merged during rc. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | ARM: omap5: Only select errata 798181 if SMPOlof Johansson2013-07-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoids the following warning when SMP is off: warning: (ARCH_KEYSTONE && SOC_OMAP5) selects ARM_ERRATA_798181 which has unmet direct dependencies (CPU_V7 && SMP) Reported-by: Emilio López <emilio@elopez.com.ar> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | ARM: multi_v7_defconfig: Select USB chipidea driverFabio Estevam2013-07-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_USB_EHCI_MXC selects the old i.mx USB driver, which does not support device tree. Select the USB chipidea driver instead, so that USB can be functional on i.mx. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | ARM: pxa: propagate errors from regulator_enable() to pxamciArnd Bergmann2013-07-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The em_x270_mci_setpower() and em_x270_usb_hub_init() functions call regulator_enable(), which may return an error that must be checked. This changes the em_x270_usb_hub_init() function to bail out if it fails, and changes the pxamci_platform_data->setpower callback so that the a failed em_x270_mci_setpower call can be propagated by the pxamci driver into the mmc core. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Mike Rapoport <mike@compulab.co.il> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Chris Ball <cjb@laptop.org> [olof: fixed order of regulator_enable() and test in em_x270_usb_hub_init] Signed-off-by: Olof Johansson <olof@lixom.net>
* | | ARM: zynq: fix compilation warningVincent Stehlé2013-07-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following compilation warning: arch/arm/mach-zynq/common.c:110:2: warning: initialization from incompatible pointer type [enabled by default] arch/arm/mach-zynq/common.c:110:2: warning: (near initialization for ‘__mach_desc_XILINX_EP107.restart’) [enabled by default] Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com> Cc: Robin Holt <holt@sgi.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: trivial@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
* | | ARM: keystone: fix compilation warningVincent Stehlé2013-07-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following compilation warning: arch/arm/mach-keystone/keystone.c:74:2: warning: initialization from incompatible pointer type [enabled by default] arch/arm/mach-keystone/keystone.c:74:2: warning: (near initialization for ‘__mach_desc_KEYSTONE.restart’) [enabled by default] Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com> Cc: Robin Holt <holt@sgi.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: trivial@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
* | | ARM: highbank: Only touch common coherency control register fieldsRob Herring2013-07-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Midway adds new register fields to the coherency control registers, so writing absolute values will break on Midway. Change the register accesses to only modify the necessary and common fields in order to support both Midway and Highbank. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | Merge tag 'nomadik-defconfig-for-arm-soc' of ↵Olof Johansson2013-07-22
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into fixes From Linus Walleij: This updates the Nomadik defconfig post-v3.11-rc1: - Update the baseline so we need not rely on make oldconfig so much - MMC defconfig updates - Activate NO_HZ_IDLE and HRTIMERS * tag 'nomadik-defconfig-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: nomadik: configure for NO_HZ and HRTIMERS ARM: nomadik: update defconfig base ARM: nomadik: Update MMC defconfigs Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: nomadik: configure for NO_HZ and HRTIMERSLinus Walleij2013-07-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables tickless idle (NO_HZ_IDLE) and high resolution timers for the Nomadik. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>