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* ARM: 6901/1: remove unneeded check of the cache_is_vipt_nonaliasing()saeed bishara2011-05-16
| | | | | | | | | when cache_is_vipt_nonaliasing(), we always have pte_exec() true at the end of this function, so no need for the additional check. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: Update mach-typesRussell King2011-05-14
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6883/1: ptrace: Migrate to regsets frameworkDave Martin2011-05-14
| | | | | | | | | | | | | | | | | | This patch migrates the implementation of the ptrace interface for the core integer registers, legacy FPA registers and VFP registers to use the regsets framework. As an added bonus, all this stuff gets included in coredumps at no extra cost. Without this patch, coredumps contained no VFP state. Third-party extension register sets (iwmmx, crunch) are not migrated by this patch, and continue to use the old implementation; these should be migratable without much extra work. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Will Deacon <Will.Deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6893/1: Allow for kernel command line concatenationVictor Boivie2011-05-12
| | | | | | | | | | | | | | | This patch allows the provided CONFIG_CMDLINE to be concatenated with the one provided by the boot loader. This is useful to merge the static values defined in CONFIG_CMDLINE with the boot loader's (possibly) more dynamic values, such as startup reasons and more. Signed-off-by: Victor Boivie <victor.boivie@sonyericsson.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonyericsson.com> Signed-off-by: Oskar Andero <oskar.andero@sonyericsson.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6889/1: futex: add SMP futex support when !CPU_USE_DOMAINSWill Deacon2011-05-12
| | | | | | | | | | | | | This patch uses the load/store exclusive instructions to add SMP futex support for ARM. Since the ARM architecture does not provide instructions for unprivileged exclusive memory accesses, we can only provide SMP futexes when CPU domain support is disabled. Cc: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6859/1: Add writethrough dcache support for ARM926EJS processorMark A. Greer2011-05-12
| | | | | | | | | | | The ARM kernel supports writethrough data cache via the CONFIG_CPU_DCACHE_WRITETHROUGH option. However, that functionality wasn't implemented in the arch/arm/boot/compressed code. It is now necessary due to a new ARM926EJS processor that has an issue with writeback data cache. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: phys-to-virt: improve Kconfig help textsRussell King2011-05-12
| | | | | | Improve the Kconfig help texts for the phys-to-virt patching feature. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: Highmem: drop experimental statusRussell King2011-05-12
| | | | | | | Highmem on ARM has been around for a while now, without any major issues being raised. So, drop the experimental status of this feature. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: SMP: drop experimental statusRussell King2011-05-12
| | | | | | | SMP on ARM has been around for a while now, without any major issues being raised. So, drop the experimental status of this feature. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'master' of ↵Ingo Molnar2011-05-06
|\ | | | | | | ssh://master.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into perf/urgent
| * Merge branch 'for-linus' of git://github.com/at91linux/linux-2.6-at91Linus Torvalds2011-05-06
| |\ | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://github.com/at91linux/linux-2.6-at91: at91: Add ARCH_ID and basic cpu macros definition for 5series chips family. arm: at91: fix compiler warning for eb01 board build arm: at91: minimal defconfig for at91x40 SoC ARM: at91: AT91CAP9 has a macb device
| | * at91: Add ARCH_ID and basic cpu macros definition for 5series chips family.Jean-Christophe PLAGNIOL-VILLARD2011-04-22
| | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * arm: at91: fix compiler warning for eb01 board buildGreg Ungerer2011-04-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix compiler warning when building for AT91EB01 board: arch/arm/mach-at91/board-eb01.c:41: warning: initialisation from incompatible pointer type Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * arm: at91: minimal defconfig for at91x40 SoCGreg Ungerer2011-04-22
| | | | | | | | | | | | | | | | | | | | | A minimal defconfig for build testing the AT91x40 SoC. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * ARM: at91: AT91CAP9 has a macb deviceUwe Kleine-König2011-04-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit ee621dd (net: atmel_macb Kconfig: remove long dependency line) replaced a list of several explicit machines in the dependencies of MACB by a single symbol that is selected by the respective machines. ee621dd missed to let ARCH_AT91CAP9 select HAVE_NET_MACB though which is fixed here. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | Merge branch 'perf/urgent' of ↵Ingo Molnar2011-05-04
|\ \ \ | |/ / |/| | | | | git://git.kernel.org/pub/scm/linux/kernel/git/frederic/random-tracing into perf/urgent
| * | arm, hw_breakpoints: Fix racy access to ptrace breakpointsFrederic Weisbecker2011-04-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the tracer accesses ptrace breakpoints, the child task may concurrently exit due to a SIGKILL and thus release its breakpoints at the same time. We can then dereference some freed pointers. To fix this, hold a reference on the child breakpoints before manipulating them. Reported-by: Oleg Nesterov <oleg@redhat.com> Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Prasad <prasad@linux.vnet.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Link: http://lkml.kernel.org/r/1302284067-7860-5-git-send-email-fweisbec@gmail.com
* | | Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-05-02
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: (47 commits) CLKDEV: Fix clkdev return value for NULL clk case ARM: 6891/1: prevent heap corruption in OABI semtimedop ARM: kprobes: Tidy-up kprobes-decode.c ARM: kprobes: Add emulation of hint instructions like NOP and WFI ARM: kprobes: Add emulation of SBFX, UBFX, BFI and BFC instructions ARM: kprobes: Add emulation of MOVW and MOVT instructions ARM: kprobes: Reject probing of undefined data processing instructions ARM: kprobes: Remove redundant code in space_1111 ARM: kprobes: Fix emulation of PLD instructions ARM: kprobes: Reject probing of SETEND instructions ARM: kprobes: Consolidate stub decoding functions ARM: kprobes: Reject probing of all coprocessor instructions ARM: kprobes: Fix emulation of USAD8 instructions ARM: kprobes: Fix emulation of SMUAD, SMUSD and SMMUL instructions ARM: kprobes: Fix emulation of SXTB16, SXTB, SXTH, UXTB16, UXTB and UXTH instructions ARM: kprobes: Reject probing of undefined media instructions ARM: kprobes: Add emulation of RBIT instruction ARM: kprobes: Reject probing of LDRB instructions which load PC ARM: kprobes: Fix emulation of LDRD and STRD instructions ARM: kprobes: Reject probing of LDR/STR instructions which update PC unpredictably ...
| * | | ARM: 6891/1: prevent heap corruption in OABI semtimedopDan Rosenberg2011-04-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_OABI_COMPAT is set, the wrapper for semtimedop does not bound the nsops argument. A sufficiently large value will cause an integer overflow in allocation size, followed by copying too much data into the allocated buffer. Fix this by restricting nsops to SEMOPM. Untested. Cc: stable@kernel.org Signed-off-by: Dan Rosenberg <drosenberg@vsecurity.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | Merge branch 'kprobes' of git://git.linaro.org/people/nico/linux into fixesRussell King2011-04-29
| |\ \ \
| | * | | ARM: kprobes: Tidy-up kprobes-decode.cJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Remove coding standard violations reported by checkpatch.pl - Delete comment about handling of conditional branches which is no longer true. - Delete comment at end of file which lists all ARM instructions. This duplicates data available in the ARM ARM and seems like an unnecessary maintenance burden to keep this up to date and accurate. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Add emulation of hint instructions like NOP and WFIJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Being able to probe NOP instructions is useful for hard-coding probeable locations and is used by the kprobes test code. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Add emulation of SBFX, UBFX, BFI and BFC instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These bit field manipulation instructions occur several thousand times in an ARMv7 kernel. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Add emulation of MOVW and MOVT instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MOVW and MOVT instructions account for approximately 7% of all instructions in a ARMv7 kernel as GCC uses them instead of a literal pool. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Reject probing of undefined data processing instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The instruction decoding in space_cccc_000x needs to reject probing of instructions with undefined patterns as they may in future become defined and then emulated faultily - as has already happened with the SMC instruction. This fix is achieved by testing for the instruction patterns we want to probe and making the the default fall-through paths reject probes. This also allows us to remove some explicit tests for instructions that we wish to reject, as that is now the default action. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Remove redundant code in space_1111Jon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tests to explicitly reject probing CPS, RFE and SRS instructions are redundant as the default case is now to reject undecoded patterns. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Fix emulation of PLD instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PLD instructions wasn't being decoded correctly and the emulation code wasn't adjusting PC correctly. As the PLD instruction is only a performance hint we emulate it as a simple nop, and we can broaden the instruction decoding to take into account newer PLI and PLDW instructions. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Reject probing of SETEND instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The emulation of SETEND was broken as it changed the endianess for the running kprobes handling code. Rather than adding a new simulation routine to fix this we'll just reject probing of SETEND as these should be very rare in the kernel. Note, the function emulate_none is now unused but it is left in the source code as future patches will use it. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Consolidate stub decoding functionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Following the change to remove support for coprocessor instructions we are left with three stub functions which can be consolidated. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Reject probing of all coprocessor instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel doesn't currently support VFP or Neon code, and probing of code with CP15 operations is fraught with bad consequences. Therefore we don't need the ability to probe coprocessor instructions and the code to support this can be removed. The removed code also had at least two bugs: - MRC into R15 should set CPSR not trash PC - LDC and STC which use PC as base register needed the address offset by 8 Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Fix emulation of USAD8 instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The USAD8 instruction wasn't being explicitly decoded leading to the incorrect emulation routine being called. It can be correctly decoded in the same way as the signed multiply instructions so we move the decoding there. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Fix emulation of SMUAD, SMUSD and SMMUL instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The signed multiply instructions were being decoded incorrectly. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Fix emulation of SXTB16, SXTB, SXTH, UXTB16, UXTB and UXTH ↵Jon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | instructions These sign extension instructions are encoded as extend-and-add instructions where the register to add is specified as r15. The decoding routines weren't checking for this and were using the incorrect emulation code, giving incorrect results. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Reject probing of undefined media instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The instructions space for media instructions contains some undefined patterns. We need to reject probing of these because they may in future become defined and the kprobes code may then emulate them faultily. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Add emulation of RBIT instructionJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The v6T2 RBIT instruction was accidentally being emulated correctly, this patch adds correct decoding for the instruction. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Reject probing of LDRB instructions which load PCJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These instructions are specified as UNPREDICTABLE. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Fix emulation of LDRD and STRD instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The decoding of these instructions got the register indexed and immediate indexed forms the wrong way around, causing incorrect emulation. Instructions like "LDRD Rx, [Rx]" were corrupting Rx because the base register writeback was being performed unconditionally, overwriting the value just loaded from memory. The fix is to only writeback the base register when that form of the instruction is used. Note, now that we reject probing writeback with PC the emulation code doesn't need the check rn!=15. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Reject probing of LDR/STR instructions which update PC ↵Jon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | unpredictably Using PC as an base register with writeback is UNPREDICTABLE, as is non word-sized loads or stores of PC. (We only really care about preventing loads to PC but it keeps the code simpler if we also exclude stores.) Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Fix emulation of LDRH, STRH, LDRSB and LDRSH instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The decoding of these instructions got the register indexed and immediate indexed forms the wrong way around, causing incorrect emulation. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Reject probing of STREX and LDREX instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The emulation code for STREX and LDREX instructions is faulty, however, rather than attempting to fix this we reject probes of these instructions. We do this because they can never succeed in gaining exclusive access as the exception framework clears the exclusivity monitor when a probes breakpoint is hit. (This is a general problem when probing all instructions executing between a LDREX and its corresponding STREX and can lead to infinite retry loops.) Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Reject probing of undefined multiply instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The instructions space for 'Multiply and multiply-accumulate' instructions contains some undefined patterns. We need to reject probing of these because they may in future become defined and the kprobes code may then emulate them faultily. This has already happened with the new MLS instruction which this patch also adds correct decoding for as well as tightening up other decoding tests. (Before this patch the wrong emulation routine was being called for MLS though it still produced correct results.) Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Fix error in commentJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Reject probing of instructions which write to PC unpredictably.Jon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Fix emulation of MRS instructionJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MRS instruction should set mode and interrupt bits in the read value so it is simpler to use a new simulation routine (simulate_mrs) rather than some modified emulation. prep_emulate_rd12 is now unused and removed. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Reject probing MRS instructions which read SPSRJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to reject probing of instructions which read SPSR because we can't handle this as the value in SPSR is lost when the exception handler for the probe breakpoint first runs. This patch also fixes the bitmask for MRS instructions decoding to include checking bits 5-7. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Fix emulation of Data-processing (immediate) instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Emulation of instructions like "ADD rd, rn, #<const>" would result in a corrupted value for rd. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Fix emulation of CMP, CMN, TST and TEQ instructions.Jon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Probing these instructions was corrupting R0 because the emulation code didn't account for the fact that they don't write a result to a register. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Remove redundant condition checks from simulation routinesJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we have the framework code handling conditionally executed instructions we can remove redundant checks in individual simulation routines. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | ARM: kprobes: Fix probing of conditionally executed instructionsJon Medhurst2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a kprobe is placed onto conditionally executed ARM instructions, many of the emulation routines used to single step them produce corrupt register results. Rather than fix all of these cases we modify the framework which calls them to test the relevant condition flags and, if the test fails, skip calling the emulation code. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| | * | | kprobes/arm: Fix ldrd/strd emulationViktor Rosendahl2011-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently emulate_ldrd and emulate_strd don't even have the adjustment of the PC value, so in case of Rn == PC, it will not update the PC incorrectly but instead load/store from the wrong address. Let's add both the adjustment of the PC value and the check for PC == PC. Signed-off-by: Viktor Rosendahl <viktor.rosendahl@nokia.com> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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