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* Merge tag 'mvebu-fixes-3.16-2' of git://git.infradead.org/linux-mvebu into fixesOlof Johansson2014-07-05
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | mvebu fixes for v3.16 (round #2) - mvebu - Fix PCIe deadlock now that SMP is enabled - Fix cpuidle for big-endian systems * tag 'mvebu-fixes-3.16-2' of git://git.infradead.org/linux-mvebu: ARM: mvebu: fix cpuidle implementation to work on big-endian systems ARM: mvebu: update L2/PCIe deadlock workaround after L2CC cleanup ARM: mvebu: move Armada 375 external abort logic as a quirk Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: mvebu: fix cpuidle implementation to work on big-endian systemsThomas Petazzoni2014-06-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Marvell Armada XP, when a CPU comes back from deep idle state of cpuidle, it restarts its execution at armada_370_xp_cpu_resume(), which puts back the CPU into the coherency, and then calls the generic cpu_resume() function. While this works on little-endian configurations, it doesn't work on big-endian configurations because the CPU restarts in little-endian, and therefore must be switched back to big-endian to operate properly. To achieve this, a 'setend be' instruction must be executed in big-endian configurations. However, the ARM_BE8() macro that is used to implement nice compile-time conditional for ARM LE vs. ARM BE8 is not easily usable in inline assembly. Therefore, this patch moves the armada_370_xp_cpu_resume() C function, which was anyway just a block of inline assembly, into a proper pmsu_ll.S file, and adds the appropriate ARM_BE8(setend be) instruction. Without this patch, an Armada XP big endian configuration with cpuidle enabled fails to boot, as it hangs as soon as one of the CPU hits the deep idle state. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1404130165-3593-1-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * ARM: mvebu: update L2/PCIe deadlock workaround after L2CC cleanupThomas Petazzoni2014-06-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 497a92308af8e9385fa3d135f7f416a997e4b93b ("ARM: mvebu: implement L2/PCIe deadlock workaround") introduced some logic in coherency.c to adjust the PL310 cache controller Device Tree node of Armada 375 and Armada 38x platform to include the 'arm,io-coherent' property if the system is running with hardware I/O coherency enabled. However, with the L2CC driver cleanup done by Russell King, the initialization of the L2CC driver has been moved earlier, and is now part of the init_IRQ() ARM function in arch/arm/kernel/irq.c. Therefore, calling coherency_init() in ->init_time() is now too late, as the Device Tree property gets added too late (after the L2CC driver has been initialized). In order to fix this, this commit removes the ->init_time() callback use in board-v7.c and replaces it with an ->init_irq() callback. We therefore no longer use the default ->init_irq() callback, but we now use the default ->init_time() callback. In this newly introduced ->init_irq() callback, we call irqchip_init() which is the default behavior when ->init_irq() isn't defined, and then do the initialization related to the coherency: SCU, coherency fabric, and mvebu-mbus (which is needed to start secondary CPUs). Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1402585772-10405-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * ARM: mvebu: move Armada 375 external abort logic as a quirkThomas Petazzoni2014-06-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation to a small re-organization of the initialization sequence in board-v7.c, this commit moves the registration of the custom external abort handler on Armada 375 later in the boot sequence, and makes it more similar to the other quirks that we already have. There is indeed no need to register this abort handler particularly early, it simply needs to be registered before switching to userspace. In addition to this, this commit makes the registration of the custom abort handler conditional on Armada 375 Z1, because Armada 375 A0 and later iterations are not affected by the issue. This commit was tested on both Armada 375 Z1 and Armada 375 A0 platforms. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1402585772-10405-3-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | ARM: sunxi: Reintroduce the restart code for A10/A20 SoCsMaxime Ripard2014-07-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This partly reverts commits 553600502b84 (ARM: sunxi: Remove reset code from the platform) and 5e669ec583e2 (ARM: sunxi: Remove init_machine callback) for the sun4i, sun5i and sun7i families. This is needed because the watchdog counterpart of these commits was dropped, and didn't make it into 3.16. In order to still be able to reboot the board, we need to reintroduce that code. Of course, the long term view is still to get rid of that code in mach-sunxi. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | Merge tag 'omap-for-v3.16/fixes-against-rc1' of ↵Olof Johansson2014-07-05
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Merge OMAP fixes from Tony Lindgren: Fixes for omaps for issues discovered during the merge window and enabling of a few features that had to wait for the driver dependencies to clear. The fixes included are: - Fix am43xx hard reset flags - Fix SoC detection for DRA722 - Fix CPU OPP table for omap5 - Fix legacy mux parser bug if requested muxname is a prefix of multiple mux entries - Fix qspi interrupt binding that relies on the irq crossbar that has not yet been enabled - Add missing phy_sel for am43x-epos-evm - Drop unused gic_init_irq() that is no longer needed And the enabling of features that had driver dependencies are: - Change dra7 to use Audio Tracking Logic clock instead of a fixed clock now that the clock driver for it has been merged - Enable off idle configuration for selected omaps as all the kernel dependencies for device tree based booting are finally merged as this is needed to get the automated PM tests working finally with device tree based booting - Add hwmod entry for ocp2scp3 for omap5 to get sata working as all the driver dependencies are now in the kernel and this patch fell through the cracks during the merge window * tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: dra7-evm: remove interrupt binding ARM: OMAP2+: Fix parser-bug in platform muxing code ARM: DTS: dra7/dra7xx-clocks: ATL related changes ARM: OMAP2+: drop unused function ARM: dts: am43x-epos-evm: Add Missing cpsw-phy-sel for am43x-epos-evm ARM: dts: omap5: Update CPU OPP table as per final production Manual ARM: DRA722: add detection of SoC information ARM: dts: Enable twl4030 off-idle configuration for selected omaps ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods ARM: OMAP2+: hwmod: Change hardreset soc_ops for AM43XX
| * | ARM: dts: dra7-evm: remove interrupt bindingSourav Poddar2014-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The qspi node defines crossbar number as its interrupt number. But, the crossbar dts patches are not yet there, this causes a warning during boot. So interrupts = < > property should be removed from DT and added later by crossbar series. Reported-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2+: Fix parser-bug in platform muxing codeDavid R. Piegdon2014-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a parser-bug in the omap2 muxing code where muxtable-entries will be wrongly selected if the requested muxname is a *prefix* of their m0-entry and they have a matching mN-entry. Fix by additionally checking that the length of the m0_entry is equal. For example muxing of "dss_data2.dss_data2" on omap32xx will fail because the prefix "dss_data2" will match the mux-entries "dss_data2" as well as "dss_data20", with the suffix "dss_data2" matching m0 (for dss_data2) and m4 (for dss_data20). Thus both are recognized as signal path candidates: Relevant muxentries from mux34xx.c: _OMAP3_MUXENTRY(DSS_DATA20, 90, "dss_data20", NULL, "mcspi3_somi", "dss_data2", "gpio_90", NULL, NULL, "safe_mode"), _OMAP3_MUXENTRY(DSS_DATA2, 72, "dss_data2", NULL, NULL, NULL, "gpio_72", NULL, NULL, "safe_mode"), This will result in a failure to mux the pin at all: _omap_mux_get_by_name: Multiple signal paths (2) for dss_data2.dss_data2 Patch should apply to linus' latest master down to rather old linux-2.6 trees. Signed-off-by: David R. Piegdon <lkml@p23q.org> Cc: stable@vger.kernel.org [tony@atomide.com: updated description to include full description] Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: DTS: dra7/dra7xx-clocks: ATL related changesPeter Ujfalusi2014-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the clock nodes for the ATL clocks to use the ATL clock driver to handle them. Add the ATL device node at the same time for DRA7. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2+: drop unused functionBrian Norris2014-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gic_init_irq() is no longer used as of: commit b42b918194c4791510ac049e3d507169a7de8544 Author: Tony Lindgren <tony@atomide.com> Date: Thu May 30 12:53:05 2013 -0700 ARM: OMAP2+: Remove board-omap4panda.c Drop it. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Tony Lindgren <tony@atomide.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-omap@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: dts: am43x-epos-evm: Add Missing cpsw-phy-sel for am43x-epos-evmGeorge Cherian2014-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AM437x EPOS evm use external clock for RMII interface. Enable the same in DT. Signed-off-by: George Cherian <george.cherian@ti.com> Reported-by: Nishanth Menon <nm@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: dts: omap5: Update CPU OPP table as per final production ManualNishanth Menon2014-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per the Final production Data Manual for OMAP5432, SWPS050F(APRIL 2014) There are only two OPPs - 1GHz and 1.5GHz. the older OPP_LOW has been completely descoped. The Nominal voltages are still correct though. However, expectation for final production configuration is operation with Adaptive Body Bias (ABB) and Adaptive Voltage Scaling Class 0 operation. There are no IDcode or version change information encoded to programmatically detect this and software is supposed to NOT use OPP_LOW(500MHz) anymore for all devices (legacy and production samples). Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: DRA722: add detection of SoC informationNishanth Menon2014-06-16
| | | | | | | | | | | | | | | | | | | | | | | | Add support for DRA72x device DIEID. Currently these devices are reported as DRA75/74 family of processors. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | Merge tag 'for-v3.16-rc/omap-fixes-a' of ↵Tony Lindgren2014-06-16
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.16/fixes Two OMAP hwmod patches for early v3.16-rc kernels. There's one OMAP SoC integration fix for the AM43xx SoC, without which, IP blocks can't be placed into hard-reset. There is also one OMAP5 SoC data addition patch that should have gone in for v3.16. Normally I wouldn't send this as part of an -rc series, since it's not technically a fix. But I'd like to make an exception in this case because: - it's intended to go in very early in the v3.16-rc series (or even pre-rc1); - it's a fairly small change; - the impact is limited to a single SoC and a single device; - the only reason that it didn't go in earlier is because it "slipped through the cracks," rather than for any technical reason. Basic build, boot, and PM test logs are available here: http://www.pwsan.com/omap/testlogs/hwmod-a-v3.16-rc/20140615201307/
| | * | ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmodsKeshava Munegowda2014-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create hwmods for ocp2scp3 and sata modules. [Roger Q] Clean up. CC: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | ARM: OMAP2+: hwmod: Change hardreset soc_ops for AM43XXDave Gerlach2014-06-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | am43xx reset register layout is more similar to am33xx than omap4 so use the am33xx functions for hwmod hardreset soc_ops rather than the currently used omap4 functions. Without this, assert_hardreset and deassert_hardreset will not work on am43xx. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> [paul@pwsan.com: fixed build errors for an AM43xx-only Kconfig] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * | | ARM: dts: Enable twl4030 off-idle configuration for selected omapsTony Lindgren2014-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | N900 now seems to shut down the external oscillator when hitting off-idle. And Beagle XM seems to have OSC_EN pin connected to allow shutting down the oscillator looking at the schematics. The oscillator output is cut off in off-idle and you can monitor it from R56 on the bottom side of the board near the power jack. Note that for beagle we need to also enable the UART wake-up event, the others have that enabled in earlier patches. OMAP37XX EVM (TMDSEVM3730) does not seem to have twl4030 clken pin connected, so there is no point trying to enable shutting down of the oscillator on it for the extra latency it adds. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | | ARM: bcm: Fix bcm and multi_v7 defconfigsOlof Johansson2014-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BCM (Kona/capri platform) has regressed in two ways on this release. First, bcm_defconfig no longer selected the appropriate MMC driver options due to changes in dependencies. Secondly, the new MFD and regulator drivers were not enabled on multi_v7_defconfig, so that caused the system to fail probing MMC there. Fix by enabling the new options as needed. Cc: Matt Porter <matt.porter@linaro.org> Cc: Christian Daudt <bcm@fixthebug.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | | Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixesArnd Bergmann2014-06-25
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge "First AT91 fixes batch for 3.16" from Nicolas Ferre: - drivers/misc fix for Kconfig PWM symbol - correction of several values in DT after conversion to CCF - fix at91sam9261/at91sam9261ek mistake in slow crystal vs. slow RC osc * tag 'at91-fixes' of git://github.com/at91linux/linux-at91: ARM: at91/dt: sam9261: remove slow RC osc ARM: at91/dt: define sam9261ek slow crystal frequency ARM: at91/dt: sam9261: correctly define mainck ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT values ARM: at91/dt: sam9x5: correct PLLA ICPLL and OUT values misc: atmel_pwm: fix Kconfig symbols
| * | | | ARM: at91/dt: sam9261: remove slow RC oscAlexandre Belloni2014-06-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The at91sam9261 doesn't actually have a slow RC oscillator, remove it from the dtsi. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | | ARM: at91/dt: define sam9261ek slow crystal frequencyAlexandre Belloni2014-06-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define at91sam9261ek's slow crystal frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | | ARM: at91/dt: sam9261: correctly define mainckAlexandre Belloni2014-06-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mainck (CKGR_MCFR register) is actually using main_osc (CKGR_MOR register). Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | | ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT valuesAlexandre Belloni2014-06-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ICPLL can only take 0 or 1, it got mixed with OUT which can be in the [0-3] range. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | | ARM: at91/dt: sam9x5: correct PLLA ICPLL and OUT valuesAlexandre Belloni2014-06-25
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ICPLL can only take 0 or 1, it got mixed with OUT which can be in the [0-3] range. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* | | | Merge tag 'mvebu-fixes-3.16' of git://git.infradead.org/linux-mvebu into fixesArnd Bergmann2014-06-25
|\ \ \ \ | | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge "mvebu fixes for v3.16" from Jason Cooper: - mvebu - Fix broken SoC ID detection - Select ARM_CPU_SUSPEND for v7 - Remove armada38x compatible string (no users yet) - kirkwood - Fix phy-connection-type on GuruPlug board * tag 'mvebu-fixes-3.16' of git://git.infradead.org/linux-mvebu: ARM: mvebu: Fix the improper use of the compatible string armada38x using a wildcard ARM: dts: kirkwood: fix phy-connection-type for Guruplug ARM: mvebu: select ARM_CPU_SUSPEND for Marvell EBU v7 platforms ARM: mvebu: Fix broken SoC ID detection
| * | | ARM: mvebu: Fix the improper use of the compatible string armada38x using a ↵Gregory CLEMENT2014-06-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | wildcard Wildcards in compatible strings should be avoid. "marvell,armada38x" was recently introduced but was not yet used. The armada 385 SoC is a superset of the armada 380 SoC (with more CPUs and more PCIe slots). So this patch replaces the use of "marvell,armada38x" by the "marvell,armada380" string. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1403533011-21339-1-git-send-email-gregory.clement@free-electrons.com Acked-by: Andrew Lunn <andrew@lunn.ch> Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | | ARM: dts: kirkwood: fix phy-connection-type for GuruplugSebastian Hesselbarth2014-06-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit eeb845459a72e792a959278b858f9c417e9995bd ("ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id") added phy-connection-type properties to ethernet PHY nodes. Actually, the property has to be set for the ethernet port node instead. Fix it by moving the corresponding properties to the correct nodes. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1403555115-13111-1-git-send-email-sebastian.hesselbarth@gmail.com Fixes: eeb845459a72: ('ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id') Cc: <stable@vger.kernel.org> # v3.16+ Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | | ARM: mvebu: select ARM_CPU_SUSPEND for Marvell EBU v7 platformsThomas Petazzoni2014-06-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Marvell Armada platforms, the PMSU (Power Management Service Unit) controls a number of power management related activities, needed for things like suspend/resume, CPU hotplug, cpuidle or even simply SMP. Since cpuidle support was added for Armada XP, the pmsu.c file in arch/arm/mach-mvebu/ calls the cpu_suspend() and cpu_resume() ARM functions, which are only available when CONFIG_ARM_CPU_SUSPEND=y. Therefore, configurations that have CONFIG_ARM_CPU_SUSPEND disabled due to PM_SLEEP being disabled no longer build properly, due to undefined references to cpu_suspend() and cpu_resume(). To fix this, this patch simply ensures CONFIG_ARM_CPU_SUSPEND is always enabled for Marvell EBU v7 platforms. Doing things in a more fine-grained way would require a lot of #ifdef-ery in pmsu.c to isolate the parts that use cpu_suspend()/cpu_resume(), and those parts would anyway have been needed as soon as either one of suspend/resume, CPU hotplug or cpuidle was enabled. Reported-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1402488397-31381-1-git-send-email-thomas.petazzoni@free-electrons.com Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | | ARM: mvebu: Fix broken SoC ID detectionEzequiel Garcia2014-06-20
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the mvebu boards need to detect the SoC revision in order to apply some quirks needed to workaround issues found on I2C and thermal controllers present only in very early SoC. This detection requires PCI address translation to work, so we need to explicitly select OF_ADDRESS_PCI. This can be considered a partial revert of the following commit, that wrongly removed the option selection: commit 55400f3a1f89e39761f45c19f6e4235a329c400b Author: Rob Herring <robh@kernel.org> Date: Tue Apr 22 14:15:52 2014 -0500 ARM: mvebu: clean-up unneeded kconfig selects Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1402347165-19988-1-git-send-email-ezequiel.garcia@free-electrons.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | | ARM: integrator: fix OF-related regressionLinus Walleij2014-06-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 07e461cd7e73a84f0e3757932b93cc80976fd749 "of: Ensure unique names without sacrificing determinism" caused a boot failure regression on the Integrator machines. The problem is probably caused by fiddling too much with the device tree population in the OF init function, such as passing the SoC bus device as parent when populating the device tree. This patch fixes the problem by: - Avoiding to explicitly look up the tree root - Look up devices needed before device population from the match only, passing NULL as root - Passing NULL as root and parent when calling of_platform_populate() After this the Integrators boot again. Tested on Integrator/AP and Integrator/CP. Cc: Grant Likely <grant.likely@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | Merge tag 'imx-fixes-3.16' of ↵Arnd Bergmann2014-06-23
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes Pull "i.MX fixes for 3.16" from Shawn Guo: - Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51, because controller base CD/WP is not working in esdhc driver due to runtime PM support - A couple of random ventana gw5xxx board fixes - Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving IPUv3 driver out of staging tree - Fix enet/fec clock selection on imx6sl - Fix display node on imx53-m53evk board - A couple of Cubox-i updates from Russell, which were omitted from the merge window due to dependency * tag 'imx-fixes-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc. ARM: dts: imx51-babbage: Fix esdhc setup ARM: dts: mx5: Move the display out of soc {} node ARM: dts: mx5: Fix IPU port node placement ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX_IPUV3_CORE ARM: dts: hummingboard/cubox-i: move usb otg configuration to platform level ARM: dts: cubox-i: add support for PWM-driven front panel LED ARM: dts: imx6: ventana: correct gw52xx sgtl5000 clock source ARM: dts: imx6qdl-gw5xxx: Fix Linear Technology vendor prefix ARM: dts: imx6: ventana: fix include typo ARM: dts: imx6sl: correct the fec ipg clock source ARM: imx6sl: add missing enet clock for imx6sl
| * | | ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc.Denis Carikli2014-06-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following commit: 89d7e5c mmc: sdhci-esdhc-imx: add runtime pm support has the effect of also disabling the hardware card detect in runtime pm. We switch to GPIO based detection to avoid this issue. This patch is based on: ARM: dts: imx51-babbage: Fix esdhc setup Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: dts: imx51-babbage: Fix esdhc setupSascha Hauer2014-06-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 89d7e5c13122 (mmc: sdhci-esdhc-imx: add runtime pm support), controller based card detection / write protection is not supported anymore by esdhc driver. Let's use GPIO for CD/WP on esdhc1 instead. While at it, fix cd gpio polarity for esdhc2. This is wrong and currently only works because the imx esdhc driver ignores the polarity. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: dts: mx5: Move the display out of soc {} nodeMarek Vasut2014-06-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the display {} node out of the soc {} node . This just aligns the DT with other boards, there is no functional change. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: dts: mx5: Fix IPU port node placementMarek Vasut2014-06-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "port" node was misplaced in the original patch, therefore making the LCD dysfunctional on this board. Fix this by moving the "port" DT node into the "display {}" node. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX_IPUV3_COREFabio Estevam2014-06-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 39b9004d1f (gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging) the ipuv3 core driver is no longer built bey default. Select CONFIG_IMX_IPUV3_CORE so that the core ipuv3 code can be built again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: dts: hummingboard/cubox-i: move usb otg configuration to platform levelRussell King2014-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The configuration of the USB OTG is a platform configuration decision, not a microsom decision. Move this configuration out to the platform level files. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: dts: cubox-i: add support for PWM-driven front panel LEDRussell King2014-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The front panel LED on the Cubox-i is driven by one of the iMX6 PWM channels, and is wired between the PWM output and supply. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: dts: imx6: ventana: correct gw52xx sgtl5000 clock sourceTim Harvey2014-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct the invalid clock for the sgtl5000 audio codec on the GW52xx Ventana baseboard. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: dts: imx6qdl-gw5xxx: Fix Linear Technology vendor prefixPhilipp Zabel2014-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vendor prefix for Linear Technology should be lltc, same as the NASDAQ symbol. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: dts: imx6: ventana: fix include typoTim Harvey2014-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix typo and include the right dtsi file for the gw51xx board. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: dts: imx6sl: correct the fec ipg clock sourceFugang Duan2014-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | imx6sl fec MDIO clock source is from ipg 66Mhz, but the currect imx6sl device tree define it as "enet_ref" clock (50Mhz), so the patch just corrects imx6sl dtsi fec "ipg" clock. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | ARM: imx6sl: add missing enet clock for imx6slFugang Duan2014-06-17
| |/ / | | | | | | | | | | | | | | | | | | There's a enet clock gate missing in clock tree, thus add it. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* | | Merge tag 'samsung-fixes-1' of ↵Arnd Bergmann2014-06-22
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes Merge Samsung fixes for 3.16 from Kukjin Kim: - use WFI macro in platform_do_lowpower because exynos cpuhotplug includes a hardcoded WFI instruction and it causes compile error in Thumb-2 mode. - fix GIC reg sizes for exynos4 SoCs - remove reset timer counter value during boot and resume for mct to fix a big jump in printk timestamps - fix pm code to check cortex-A9 for another exynos SoCs - don't rely on firmware's secondary_cpu_start for mcpm * tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Don't rely on firmware's secondary_cpu_start for mcpm ARM: EXYNOS: fix pm code to check for cortex A9 rather than the SoC clocksource: exynos_mct: Don't reset the counter during boot and resume ARM: dts: fix reg sizes of GIC for exynos4 ARM: EXYNOS: Use wfi macro in platform_do_lowpower Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: EXYNOS: Don't rely on firmware's secondary_cpu_start for mcpmDoug Anderson2014-06-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On exynos mcpm systems the firmware is hardcoded to jump to an address in SRAM (0x02073000) when secondary CPUs come up. By default the firmware puts a bunch of code at that location. That code expects the kernel to fill in a few slots with addresses that it uses to jump back to the kernel's entry point for secondary CPUs. Originally (on prerelease hardware) this firmware code contained a bunch of workarounds to deal with boot ROM bugs. However on all shipped hardware we simply use this code to redirect to a kernel function for bringing up the CPUs. Let's stop relying on the code provided by the bootloader and just plumb in our own (simple) code jump to the kernel. This has the nice benefit of fixing problems due to the fact that older bootloaders (like the one shipped on the Samsung Chromebook 2) might have put slightly different code into this location. Once suspend/resume is implemented for systems using exynos-mcpm we'll need to make sure we reinstall our fixed up code after resume. ...but that's not anything new since IRAM (and thus the address of the mcpm_entry_point) is lost across suspend/resume anyway. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: fix pm code to check for cortex A9 rather than the SoCAbhilash Kesavan2014-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have an soc check to ensure that the scu and certain A9 specific registers are not accessed on Exynos5250 (which is A15 based). Rather than adding another soc specific check for 5420 let us test for the Cortex A9 primary part number. This resolves the below crash seen on exynos5420 during core switching after the CPUIdle consolidation series was merged. [ 155.975589] [<c0013174>] (scu_enable) from [<c001b0dc>] (exynos_cpu_pm_notifier+0x80/0xc4) [ 155.983833] [<c001b0dc>] (exynos_cpu_pm_notifier) from [<c003c1b0>] (notifier_call_chain+0x44/0x84) [ 155.992851] [<c003c1b0>] (notifier_call_chain) from [<c007a49c>] (cpu_pm_notify+0x20/0x3c) [ 156.001089] [<c007a49c>] (cpu_pm_notify) from [<c007a564>] (cpu_pm_exit+0x20/0x38) [ 156.008635] [<c007a564>] (cpu_pm_exit) from [<c0019e98>] (bL_switcher_thread+0x298/0x40c) [ 156.016788] [<c0019e98>] (bL_switcher_thread) from [<c003842c>] (kthread+0xcc/0xe8) [ 156.024426] [<c003842c>] (kthread) from [<c000e438>] (ret_from_fork+0x14/0x3c) [ 156.031621] Code: ea017fec c0530a00 c052e3f8 c0012dcc (e5903000 Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: dts: fix reg sizes of GIC for exynos4Tomasz Figa2014-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes reg entry sizes in GIC node that were not large enough to cover whole regions. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | ARM: EXYNOS: Use wfi macro in platform_do_lowpowerLeela Krishna Amudala2014-06-16
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is originally based on commit b3377d186572 ("ARM: 7064/1: vexpress: Use wfi macro in platform_do_lowpower.") Current Exynos CPU hotplug code includes a hardcoded WFI instruction, in ARM encoding. When the kernel is compiled in Thumb-2 mode, this is invalid and causes the machine to hang hard when a CPU is offlined. Use wfi macro instead of the hardcoded WFI instruction. Signed-off-by: Leela Krishna Amudala <leela.krishna@linaro.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | ARM: multi_v7_defconfig: Add QCOM GSBI driverSrinivas Kandagatla2014-06-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds QCOM GSBI config option to multi_v7_defconfig. Serial driver on QCOM APQ8064 depends on GSBI driver, so without this patch there is no serial console on IF6410 board using multi_v7_defconfig. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | Merge tag 'sti-fixes-for-v3.16-rc1' of ↵Arnd Bergmann2014-06-20
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.stlinux.com/devel/kernel/linux-sti into fixes Merge "STi: DT fixes for v3.16" from Maxime Coquelin: Couple of DT fixes for STi platform issues discovered on V3.16-rc1. The fixes included are: - Ethernet clocks were wrongly defined for STiH415/416 platforms - STiH416 B2020 revision E DTS file name contained uppercase, change to lowercase. * tag 'sti-fixes-for-v3.16-rc1' of git://git.stlinux.com/devel/kernel/linux-sti: (2963 commits) ARM: stih41x: Rename stih416-b2020-revE.dts to stih416-b2020e.dts ARM: STi: DT: Properly define sti-ethclk & stmmaceth for stih415/6 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-05 05:25:03 -0500