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| | | * | | | | | | | [ARM] pxa/em-x270: change power supply name to "battery"Mike Rapoport2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa/em-x270: update libertas device setupMike Rapoport2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa/em-x270: add exeda GPIO extender and update GPIO mappingsMike Rapoport2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa/ezx: setup gpio-keys for EzX phonesAntonio Ospite2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setup gpio-keys for EzX phones Signed-off-by: Antonio Ospite <ospite@studenti.unina.it> Acked-by: Daniel Ribeiro <drwyrm@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa/spitz: drop unused header files from spitz.cDmitry Eremin-Solenikov2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa/imote2: add i2c board info for the wm8940 audio codecJonathan Cameron2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa/imote2: add board config for SHT15 humidity sensorJonathan Cameron2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: Stargate 2 board supportJonathan Cameron2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa/palm: Palm TX, T5, LD suspend-to-mem reworkMarek Vasut2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa/palm: Add Palm27x aSoC driver to PalmTE2Marek Vasut2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa/palm: Switch PalmT5, TX, TE2 to GPIO VBUSMarek Vasut2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa/csb726: register ac97 controllerDmitry Eremin-Solenikov2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a call to pxa_set_ac97_info() to enable the audio support. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa/csb726: switch to use smsc911x driverDmitry Eremin-Solenikov2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | csb726 used obsolete and not working out-of-tree driver smc911x. Switch it to use new smsc911x driver. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: magician_defconfig enable hx4700, asic3 and w100fbPhilipp Zabel2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I'm not going to maintain separate defconfigs for magician and hx4700. This should probably be renamed to htcpxa_defconfig. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: add basic support for HP iPAQ hx4700 PDAsPhilipp Zabel2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This includes - IrDA (pxafixp_ir), - Buttons (gpio-keys), - ASIC3 IRQ/GPIOs (asic3), - EGPIOs (htc-egpio), - ATI Imageon w3220 framebuffer (w100fb), - Backlight (pwm-backlight), - StrataFlash (physmap), - Battery monitor (ds1wm,w1_ds2760,ds2760_battery) - USB gadget support (pxa27x_udc,gpio_vbus). - bq24022 battery charger (pda_power,bq24022) - TSC2046 touchscreen (ads7846) Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa/magician: use ARRAY_AND_SIZE for platform_add_devicesPhilipp Zabel2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa/magician: use I2C fast modePhilipp Zabel2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: add vcc_core regulation for cpufreq on pxa2xxRobert Jarzmik2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add voltage regulation capability to pxa2xx cpufreq driver. The cpufreq will ask for a "vcc_core" regulator to the regulator framework. If a regulator is found at probe time, it will be used with values specified in PXA270 Electrical, Mechanical, and Thermal Specifications. If not, it will be assumed for now that frequency change will work without voltage control. This assumes that the IPL/SPL installs sane values to an existing voltage regulator (ie. voltage high enough to support the full range). Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: add additional mfp definitions for pxa320Jürgen Schindele2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jürgen Schindele <linux@schindele.name> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| | | * | | | | | | | [ARM] pxa: add ability to set suspend modeMike Rapoport2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PXA processors have several low-power modes. Currently kernel supports only one of these modes for PM_SUSPEND_MEM. This patch adds ability to set desired suspend mode for PXA27x based machines. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Reviewed-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: add udc support for pxa3xxRobert Jarzmik2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As reported by Aric Blumer, the pxa27x_udc driver does work with pxa3xx devices. Add support into device files. Reported-by: Aric Blumer <aric@sdgsystems.com> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Matt Reimer <mattjreimer@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: allow IRQ_BOARD_END to be customized and make zylonite to use itPhilipp Zabel2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The default value is 16 IRQs. Zylonite needs 32, ASIC3 based boards need 70. My problem is still that due to the way IRQ_GPIO is hardcoded, ASIC3 based boards need 70 IRQs starting at IRQ_BOARD_START. If I define ASIC3 IRQs similar to LoCoMo or SA1111, things break as soon as something selects PXA_HAVE_BOARD_IRQS. Increasing the default number of board IRQs to 70 instead doesn't seem very nice. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: update pxa2xx_spi_chip initialization to use .gpio_cs fieldMike Rapoport2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: add PWM devices support for pxa168/910Eric Miao2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Mingwei Wang <mingwei.wang@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: add missing IRQ_PXA910_NONE to irqs.hEric Miao2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: move pwm.c to common plat-pxa directoryEric Miao2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: build pwm.c according to HAVE_PWM instead of PXA_PWMEric Miao2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PXA_PWM config option is really redundant since the introduction of HAVE_PWM, replace that with HAVE_PWM to avoid confusion. Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: allow PWM ID base number to be specified in pwm_id_tableEric Miao2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PWMs on PXA168/910 start at number 1 instead of 0, (i.e. PWM1/2/3/4 instead of PWM0/1/2/3 on PXA25x/PXA27x/PXA3xx). Allow this number to be specified in pwm_id_table. Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: simplify secondary PWM handling and use platform_device_id tableEric Miao2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: add I2C (TWSI) devices to pxa168/pxa910Eric Miao2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Paul Shen <paul.shen@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: move mach/i2c.h to plat/i2c.hEric Miao2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Paul Shen <paul.shen@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | | * | | | | | | | [ARM] pxa: add platform device ID table to pxa i2c driverEric Miao2009-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | | | | | | | | Merge branch 'copy_user' of git://git.marvell.com/orion into develRussell King2009-06-14
| | |\ \ \ \ \ \ \ \ \
| | | * | | | | | | | | [ARM] alternative copy_to_user: more precise fallback thresholdNicolas Pitre2009-05-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous size thresholds were guessed from various user space benchmarks using a kernel with and without the alternative uaccess option. This is however not as precise as a kernel based test to measure the real speed of each method. This adds a simple test bench to show the time needed for each method. With this, the optimal size treshold for the alternative implementation can be determined with more confidence. It appears that the optimal threshold for both copy_to_user and clear_user is around 64 bytes. This is not a surprise knowing that the memcpy and memset implementations need at least 64 bytes to achieve maximum throughput. One might suggest that such test be used to determine the optimal threshold at run time instead, but results are near enough to 64 on tested targets concerned by this alternative copy_to_user implementation, so adding some overhead associated with a variable threshold is probably not worth it for now. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | | * | | | | | | | | [ARM] lower overhead with alternative copy_to_user for small copiesNicolas Pitre2009-05-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the alternate copy_to_user implementation has a higher setup cost than the standard implementation, the size of the memory area to copy is tested and the standard implementation invoked instead when that size is too small. Still, that test is made after the processor has preserved a bunch of registers on the stack which have to be reloaded right away needlessly in that case, causing a measurable performance regression compared to plain usage of the standard implementation only. To make the size test overhead negligible, let's factorize it out of the alternate copy_to_user function where it is clear to the compiler that no stack frame is needed. Thanks to CONFIG_ARM_UNWIND allowing for frame pointers to be disabled and tail call optimization to kick in, the overhead in the small copy case becomes only 3 assembly instructions. A similar trick is applied to clear_user as well. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | | * | | | | | | | | [ARM] alternative copy_to_user/clear_user implementationLennert Buytenhek2009-05-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements {copy_to,clear}_user() by faulting in the userland pages and then using the regular kernel mem{cpy,set}() to copy the data (while holding the page table lock). This is a win if the regular mem{cpy,set}() implementations are faster than the user copy functions, which is the case e.g. on Feroceon, where 8-word STMs (which memcpy() uses under the right conditions) give significantly higher memory write throughput than a sequence of individual 32bit stores. Here are numbers for page sized buffers on some Feroceon cores: - copy_to_user on Orion5x goes from 51 MB/s to 83 MB/s - clear_user on Orion5x goes from 89MB/s to 314MB/s - copy_to_user on Kirkwood goes from 240 MB/s to 356 MB/s - clear_user on Kirkwood goes from 367 MB/s to 1108 MB/s - copy_to_user on Disco-Duo goes from 248 MB/s to 398 MB/s - clear_user on Disco-Duo goes from 328 MB/s to 1741 MB/s Because the setup cost is non negligible, this is worthwhile only if the amount of data to copy is large enough. The operation falls back to the standard implementation when the amount of data is below a certain threshold. This threshold was determined empirically, however some targets could benefit from a lower runtime determined value for optimal results eventually. In the copy_from_user() case, this technique does not provide any worthwhile performance gain due to the fact that any kind of read access allocates the cache and subsequent 32bit loads are just as fast as the equivalent 8-word LDM. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Tested-by: Martin Michlmayr <tbm@cyrius.com>
| | | * | | | | | | | | [ARM] allow for alternative __copy_to_user/__clear_user implementationsNicolas Pitre2009-05-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows for optional alternative implementations of __copy_to_user and __clear_user, with a possible runtime fallback to the standard version when the alternative provides no gain over that standard version. This is done by making the standard __copy_to_user into a weak alias for the symbol __copy_to_user_std. Same thing for __clear_user. Those two functions are particularly good candidates to have alternative implementations for, since they rely on the STRT instruction which has lower performances than STM instructions on some CPU cores such as the ARM1176 and Marvell Feroceon. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | * | | | | | | | | | [ARM] 5552/1: ep93xx get_uart_rate(): use EP93XX_SYSCON_PWRCNT and ↵Matthias Kaehlcke2009-06-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | EP93XX_SYSCON_PWRCN ep93xx: get_uart_rate() uses the constants EP93XX_SYSCON_CLOCK_CONTROL and EP93XX_SYSCON_CLOCK_UARTBAUD, which no longer exist. Use EP93XX_SYSCON_PWRCNT and EP93XX_SYSCON_PWRCNT_UARTBAUD instead Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | | | | | | | | Merge branch 'for-rmk' of git://linux-arm.org/linux-2.6 into develRussell King2009-06-11
| | |\ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/kernel/smp.c arch/arm/mach-realview/Makefile arch/arm/mach-realview/platsmp.c
| | | * | | | | | | | | | Fix the VFP handling on the Feroceon CPUCatalin Marinas2009-05-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CPU generates synchronous VFP exceptions in a non-standard way - the FPEXC.EX bit set but without the FPSCR.IXE bit being set like in the VFP subarchitecture 1 or just the FPEXC.DEX bit like in VFP subarchitecture 2. The main problem is that the faulty instruction (which needs to be emulated in software) will be restarted several times (normally until a context switch disables the VFP). This patch ensures that the VFP exception is treated as synchronous. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Nicolas Pitre <nico@cam.org>
| | | * | | | | | | | | | Add core support for ARMv6/v7 big-endianCatalin Marinas2009-05-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting with ARMv6, the CPUs support the BE-8 variant of big-endian (byte-invariant). This patch adds the core support: - setting of the BE-8 mode via the CPSR.E register for both kernel and user threads - big-endian page table walking - REV used to rotate instructions read from memory during fault processing as they are still little-endian format - Kconfig and Makefile support for BE-8. The --be8 option must be passed to the final linking stage to convert the instructions to little-endian Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| | | * | | | | | | | | | RealView: Move the IRQ_* definitions out of the board-*.h filesCatalin Marinas2009-05-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IRQ_* macros need to be made visible via the mach/irqs.h file but without the additional macros defined in the board-*.h files. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| | | * | | | | | | | | | arm: Provide _sdata and __bss_stop in the vmlinux.lds.S fileCatalin Marinas2009-05-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | _sdata and __bss_stop are common symbols defined by many architectures and made available to the kernel via asm-generic/sections.h. Kmemleak uses these symbols when scanning the data sections. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| | | * | | | | | | | | | ARMv7: Document the PRRR and NMRR registers settingCatalin Marinas2009-05-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a comment to the proc-v7.S file for the setting of the PRRR and NMRR registers. It also sets the PRRR[13:12] bits to 0 (corresponding to the reserved TEX[0]CB encoding 110) to be consistent with the documentation. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| | | * | | | | | | | | | ARMv7: Enable the SWP instructionCatalin Marinas2009-05-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SWP instruction has been deprecated starting with the ARMv6 architecture. On ARMv7 processors with the multiprocessor extensions (like Cortex-A9), this instruction is disabled by default but it can be enabled by setting bit 10 in the System Control register. Note that setting this bit is safe even if the ARMv7 processor has the SWP instruction enabled by default. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| | | * | | | | | | | | | Clear the IT state when invoking a Thumb-2 signal handlerCatalin Marinas2009-05-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a process is interrupted during an If-Then block and a signal is invoked, the ITSTATE bits must be cleared otherwise the handler would not run correctly. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Joseph S. Myers <joseph@codesourcery.com>
| | | * | | | | | | | | | ARMv7: Mark the PTWs inner WBWA on SMP and WB on UPTony Thompson2009-05-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are additional bits to set for the ARMv7 SMP extensions in the TTBR registers. The IRGN bits order is counter-intuitive but it allows software built for the ARMv7 base architecture to run on an implementation with the MP extensions. Signed-off-by: Tony Thompson <Anthony.Thompson@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| | | * | | | | | | | | | Check whether the TLB operations need broadcasting on SMP systemsCatalin Marinas2009-05-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARMv7 SMP hardware can handle the TLB maintenance operations broadcasting in hardware so that the software can avoid the costly IPIs. This patch adds the necessary checks (the MMFR3 CPUID register) to avoid the broadcasting if already supported by the hardware. (this patch is based on the work done by Tony Thompson @ ARM) Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| | | * | | | | | | | | | RealView: Toggle one LED per CPUCatalin Marinas2009-05-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_LEDS is enabled, it makes more sense to toggle one LED per CPU in SMP systems rather than a single LED for all the CPUs. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| | | * | | | | | | | | | RealView: Allow CONFIG_LEDS on this platformColin Tuckley2009-05-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Colin Tuckley <Colin.Tuckley@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-03 14:41:29 -0400