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* [ARM] pxa: add pxa27x_keypad device and pxa_set_keypad_info()eric miao2008-04-19
| | | | | | | also update the clk definitions in pxa27x and pxa3xx. Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: use gpio_keys.c to support mainstone's wakeup switch of GPIO1eric miao2008-04-19
| | | | | | | | NOTE: currently don't know if the key code of KEY_SUSPEND is fit for such usage. Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: allow dynamic enable/disable of GPIO wakeup for pxa{25x,27x}eric miao2008-04-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes include: 1. rename MFP_LPM_WAKEUP_ENABLE into MFP_LPM_CAN_WAKEUP to indicate the board capability of this pin to wakeup the system 2. add gpio_set_wake() and keypad_set_wake() to allow dynamically enable/disable wakeup from GPIOs and keypad GPIO * these functions are currently kept in mfp-pxa2xx.c due to their dependency to the MFP configuration 3. pxa2xx_mfp_config() only gives early warning if MFP_LPM_CAN_WAKEUP is set on incorrect pins So that the GPIO's wakeup capability is now decided by the following: a) processor's capability: (only those GPIOs which have dedicated bits within PWER/PRER/PFER can wakeup the system), this is initialized by pxa{25x,27x}_init_mfp() b) board design decides: - whether the pin is designed to wakeup the system (some of the GPIOs are configured as other functions, which is not intended to be a wakeup source), by OR'ing the pin config with MFP_LPM_CAN_WAKEUP - which edge the pin is designed to wakeup the system, this may depends on external peripherals/connections, which is totally board specific; this is indicated by MFP_LPM_EDGE_* c) the corresponding device's (most likely the gpio_keys.c) wakeup attribute: Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: use new pin configuration mechanism for lubbockeric miao2008-04-19
| | | | | Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: use new pin configuration mechanism for mainstoneeric miao2008-04-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | 1. the following code to configure PGSRx is no way portable and intuitive: - PGSR0 = 0x00008800; - PGSR1 = 0x00000002; - PGSR2 = 0x0001FC00; - PGSR3 = 0x00001F81; this is removed as low power state has already been encoded in the pin configuration definitions. Note: there is no specific reason for some of the GPIOs to drive high in low power mode as indicated by the above setting, those bits are ignored, and the result is validated to work. 2. the following code to configure GPIO wakeup is removed as this is now totally handled by pxa2xx_mfp_config(): - PWER = 0xC0000002; - PRER = 0x00000002; - PFER = 0x00000002; Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: move ARRAY_AND_SIZE definition to generic.heric miao2008-04-19
| | | | | | | for use by other platforms Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}eric miao2008-04-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pin configuration on pxa{25x,27x} has now separated from generic GPIO into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed from pxa3xx and is used here to alert the difference between the two concepts: pin configuration and generic GPIOs. A GPIO can be called a "GPIO" _only_ when the corresponding pin is configured so. A pin configuration on pxa{25x,27x} is composed of: - alternate function selection (or pin mux as commonly called) - low power state or sleep state - wakeup enabling from low power mode The following MFP_xxx bit definitions in mfp.h are re-used: - MFP_PIN(x) - MFP_AFx - MFP_LPM_DRIVE_{LOW, HIGH} - MFP_LPM_EDGE_* Selecting alternate function on pxa{25x, 27x} involves configuration of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT} are introduced. And pin configurations are defined by the following two macros: - MFP_CFG_IN : for input alternate functions - MFP_CFG_OUT : for output alternate functions Every configuration should provide a low power state if it configured as output using MFP_CFG_OUT(). As a general guideline, the low power state should be decided to minimize the overall power dissipation. As an example, it is better to drive the pin as high level in low power mode if the GPIO is configured as an active low chip select. Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid side effects when it is firstly configured as output. The actual direction of the GPIO is configured by gpio_direction_{input, output} Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus the device based enable_irq_wake() mechanism is not applicable here. E.g. invoking enable_irq_wake() with a GPIO IRQ as in the following code to enable OTG wakeup is by no means portable and intuitive, and it is valid _only_ when GPIO35 is configured as USB_P2_1: enable_irq_wake( gpio_to_irq(35) ); To make things worse, not every GPIO is able to wakeup the system. Only a small number of them can, on either rising or falling edge, or when level is high (for keypad GPIOs). Thus, another new bit is introduced to indicate that the GPIO will wakeup the system: - MFP_LPM_WAKEUP_ENABLE The following macros can be used in platform code, and be OR'ed to the GPIO configuration to enable its wakeup: - WAKEUP_ON_EDGE_{RISE, FALL, BOTH} - WAKEUP_ON_LEVEL_HIGH The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is no edge settings for those GPIOs. These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case that platform code author is careless enough. The tradeoff here is that the wakeup source is fully determined by the platform configuration, instead of enable_irq_wake(). Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: separate GPIOs and their mode definitions to pxa2xx-gpio.heric miao2008-04-19
| | | | | | | | | | | | | two reasons: 1. GPIO namings and their mode definitions are conceptually not part of the PXA register definitions 2. this is actually a temporary move in the transition of PXA2xx to use MFP-alike APIs (as what PXA3xx is now doing), so that legacy code will still work and new code can be added in step by step Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: move mfp sysdev registeration out for suspend/resume ordereric miao2008-04-19
| | | | | | | | | MFP configurations after resume should be done before the GPIO registers are restored. Move the mfp sysdev registeration to the same place where GPIO and IRQ sysdev(s) are registered to better control the order. Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: rename mfp.c to mfp-pxa3xx.c to indicate it's pxa3xx specificeric miao2008-04-19
| | | | | Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: make pxa_gpio_irq_type() processor genericeric miao2008-04-19
| | | | | | | | | | | | | | | | | | The main issue here is that pxa3xx does not have GAFRx registers, access directly to these registers should be avoided for pxa3xx: 1. introduce __gpio_is_occupied() to indicate the GAFRx and GPDRx registers are already configured on pxa{25x,27x} while returns 0 always on pxa3xx 2. pxa_gpio_mode(gpio | GPIO_IN) is replaced directly with assign- ment of GPDRx, the side effect of this change is that the pin _must_ be configured before use, pxa_gpio_irq_type() will not change the pin to GPIO, as this restriction is sane, esp. with the new MFP framework Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: move GPIO sysdev outside of generic.c into gpio.ceric miao2008-04-19
| | | | | Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: merge assignment of set_wake into pxa_init_{irq,gpio}()eric miao2008-04-19
| | | | | | | | | | | | | To further clean up the GPIO and IRQ structure: 1. pxa_init_irq_gpio() and pxa_init_gpio() combines into a single function pxa_init_gpio() 2. assignment of set_wake merged into pxa_init_{irq,gpio}() as an argument Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: integrate low IRQ chip (ICIP) and high IRQ chip (ICIP2) into oneeric miao2008-04-19
| | | | | | | | | | | | | | | | | | | | | This makes the code better organized and simplified a bit. The change will lose a bit of performance when performing IRQ ack/mask/unmask,but that's not too much after checking the result binary. This patch also removes the ugly #ifdef CONFIG_PXA27x .. #endif by carefully not to access those pxa{27x,3xx} specific registers, this is done by keeping an internal IRQ number variable. The pxa-regs.h is also modified so registers for IRQ > PXA_IRQ(31) are made public even if CONFIG_PXA{27x,3xx} isn't defined (for pxa25x's sake) The incorrect assumption in the original code that internal irq starts from 0 is also corrected by comparing with PXA_IRQ(0). "struct sys_device" for the IRQ are reduced into one single device on pxa{27x,3xx}. Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: move GPIO IRQ specific code out of irq.c into gpio.ceric miao2008-04-19
| | | | | Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: introduce GPIO_CHIP() macro to clean up the definitionseric miao2008-04-19
| | | | | Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: cleanup the coding style of pxa_gpio_set_type()eric miao2008-04-19
| | | | | | | | | | | | | | by 1. wrapping long lines and making comments tidy 2. using IRQ_TYPE_* instead of migration macros __IRQT_* 3. introduce a pr_debug() for the commented printk(KERN_DEBUG ...) stuff Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: make GPIO IRQ code less dependent on the internal IRQseric miao2008-04-19
| | | | | | | | | | | | | | by: 1. introduce dedicated pxa_{mask,unmask}_low_gpio() 2. remove set_irq_chip(IRQ_GPIO_2_x, ...) which has already been initialized in pxa_init_irq() 3. introduce dedicated pxa_init_gpio_set_wake() Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: generalize the muxed gpio IRQ handling code with loop and ffs()eric miao2008-04-19
| | | | | | | | | | | | 1. As David Brownell suggests, using ffs() is going to make the loop a bit faster (by avoiding unnecessary shift and iteration) 2. Russell suggested find_{first,next}_bit() being used with the gedr[] array Signed-off-by: eric miao <eric.miao@marvell.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4832/2: Support AC97CLK on PXA3xx via the clock APIMark Brown2008-04-19
| | | | | | | | | The AC97 clock rate on PXA3xx is generated with a configurable divider from sys_pll. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4831/2: Add PXA2xx AC97 clocks to clock APIMark Brown2008-04-19
| | | | | | Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4830/1: Add support for the CLK_POUT pin on PXA3xx CPUsMark Brown2008-04-19
| | | | | | | Expose control of the PXA3xx 13MHz CLK_POUT pin via the clock API Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Update mach-typesRussell King2008-04-19
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'omap-fixes' of ↵Russell King2008-03-20
|\ | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into m * 'omap-fixes' of master.kernel.org:/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: ARM: OMAP1: Fix typo in OMAP1 MPU clock source initialization ARM: OMAP: Fix DMA CLINK mask, clear spurious interrupt ARM: OMAP: Fix chain_a_transfer return value ARM: OMAP: Fix missing makefile options ARM: OMAP: Fix GPIO IRQ unmask ARM: OMAP: Fix clockevent support for hrtimers
| * ARM: OMAP1: Fix typo in OMAP1 MPU clock source initializationWill Newton2008-03-20
| | | | | | | | | | | | | | Fix typo in OMAP1 MPU clock source initialization. Signed-off-by: Will Newton <will.newton@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Fix DMA CLINK mask, clear spurious interruptGadiyar, Anand2008-03-20
| | | | | | | | | | | | | | | | Fix CLINK mask, clear spurious interrupt. Signed-off-by: Gadiyar, Anand <gadiyar@ti.com> Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Fix chain_a_transfer return valueAnand Gadiyar2008-03-20
| | | | | | | | | | | | | | | | | | | | | | This patch changes the return value of omap_dma_chain_a_transfer to 0 on success instead of the flag 'start_dma', which wasn't really useful for anything. Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Fix missing makefile optionsTony Lindgren2008-03-20
| | | | | | | | | | | | | | | | Although audio and dsp drivers are not integrated yet, allow compiling in mailbox and mcbsp to see any build warnings. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Fix GPIO IRQ unmaskKevin Hilman2008-03-20
| | | | | | | | | | | | | | | | | | | | GPIO IRQ unmask doesn't actually do anything useful. The problem is hidden by a separate explicit mass unmask at the end of the chained bank handler. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Fix clockevent support for hrtimersKevin Hilman2008-03-20
| | | | | | | | | | | | | | | | | | | | | | | | One-shot mode was broken in MPU-timer support for OMAP1 due to a typo. Also, ensure timer is stopped before changing the auto-reload flag. The TRM says changing the AR flag when timer is running is undefined. Also set GENERIC_CLOCKEVENTS for all omaps. Signed-off-by: Tim Bird <tim.bird@am.sony.com> Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | [ARM] 4870/1: fix signal return code when enable CONFIG_OABI_COMPATjanboe2008-03-20
| | | | | | | | | | | | | | fix signal return code when enable CONFIG_OABI_COMPAT Signed-off-by: Janboe Ye <janboe.ye@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] 4865/1: Register the F75375 device in the GLAN Tank platform codeGordon Farquharson2008-03-20
| | | | | | | | | | | | | | | | | | This patch adds the code required to register the F75375 device on the GLAN Tank. Signed-off-by: Gordon Farquharson <gordonfarquharson@gmail.com> Acked-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] 4864/1: Enable write buffer coalescing on IOPArnaud Patard2008-03-20
|/ | | | | | | | Some bootloaders are disabling write buffer coalescing. Enable it back under linux. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4856/1: Orion: initialise the sixth PCIe MBUS mapping window as wellLennert Buytenhek2008-03-08
| | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4855/1: Orion: use correct ethernet unit address rangeLennert Buytenhek2008-03-08
| | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4853/1: include uImage target in make helpUwe Kleine-König2008-03-08
| | | | | Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4851/1: ns9xxx: fix size of gpioresUwe Kleine-König2008-03-08
| | | | | | | | GPIO_MAX is the number of the last gpio, not the number of gpios. So the bitmap must provide GPIO_MAX + 1 bits. Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'omap-fixes'Russell King2008-03-06
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * omap-fixes: ARM: OMAP2: Register the L4 io bus to boot OMAP2 ARM: OMAP1: Compile in other 16xx boards to OSK defconfig ARM: OMAP1: Refresh H2 defconfig ARM: OMAP1: Refresh OSK defconfig ARM: OMAP: gpio lockdep updates ARM: OMAP1: omap1/pm.c build fix ARM: OMAP1: omap h2 regression fix ARM: OMAP1: Fix compile for boards depending on old gpio expander ARM: OMAP1: omap h3 regression and build fix ARM: OMAP: Remove compiler warning when i2c is not set ARM: OMAP: fix omap i2c init (regression) ARM: OMAP: fix false lockdep warnings ARM: OMAP: Fix sleep under spinlock for cpufreq ARM: OMAP: Pass logical DMA channel number always to callback handlers
| * ARM: OMAP2: Register the L4 io bus to boot OMAP2Kyungmin Park2008-03-06
| | | | | | | | | | | | | | This patch enables OMAP2 to boot. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP1: Compile in other 16xx boards to OSK defconfigTony Lindgren2008-03-06
| | | | | | | | | | | | | | | | | | | | | | | | This allows monitoring compile issues with Kautobuild for other omap1 boards until we have more board specific defconfig files. After 2.6.25, we can add a generic config_omap_generic16xx to compile in support for all 16xx boards and then remove other boards from OSK defconfig. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP1: Refresh H2 defconfigTony Lindgren2008-03-06
| | | | | | | | | | | | Refresh H2 defconfig Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP1: Refresh OSK defconfigTony Lindgren2008-03-06
| | | | | | | | | | | | Refresh OSK defconfig Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: gpio lockdep updatesDavid Brownell2008-03-05
| | | | | | | | | | | | | | | | | | Fix some spinlock issues reported by lockdep: since the gpio bank locks can be aquired in both irq and non-irq contexts, they need to be consistent about always using the irq-safe variants. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP1: omap1/pm.c build fixDavid Brownell2008-03-05
| | | | | | | | | | | | | | | | | | | | Build fix: arch/arm/mach-omap1/pm.c: In function 'omap_pm_init': arch/arm/mach-omap1/pm.c:720: warning: passing argument 2 of 'sysfs_create_file' from incompatible pointer type Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP1: omap h2 regression fixDavid Brownell2008-03-05
| | | | | | | | | | | | | | | | | | | | H2 and H3 were broken on by e27a93a944a5ba6a0112750c8243abba86d56e94, which removed declarations for their tps6501x chips. This resolves that issue for the H2. (Note that this patch *also* broke the isp1301 support on H2; it presumed a not-yet-merged new-style I2c driver.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP1: omap h3 regression and build fixDavid Brownell2008-03-05
| | | | | | | | | | | | | | | | | | | | | | | | Get rid of build warnings and errors in mainline for H3 boards; not all the H3 updates were correct, it seems like the OMAP1 boards are not getting proper build testing. Also, commit e27a93a944a5ba6a0112750c8243abba86d56e94 introduced a regression related to the tps65013 chip. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: fix omap i2c init (regression)David Brownell2008-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In mainline, the "old style" I2C registration was only removed for OMAP2, leading to init-time bugs (regressions) like: sysfs: duplicate filename 'i2c_omap.1' can not be created ------------[ cut here ]------------ WARNING: at fs/sysfs/dir.c:424 sysfs_add_one+0x40/0xd4() Modules linked in: ... deletia ... [<c0036a38>] (omap_init_i2c+0x0/0x50) from [<c000cea8>] (omap_init_devices+0x10/0x24) r4:c001e000 [<c000ce98>] (omap_init_devices+0x0/0x24) from [<c0008684>] (do_initcalls+0x78/0x200) ... deletia ... ---[ end trace ca143223eefdc828 ]--- kobject_add_internal failed for i2c_omap.1 with -EEXIST, don't try to register things with the same name in the same directory. The fix is obvious: remove the old init code, it's no longer needed. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: fix false lockdep warningsDavid Brownell2008-03-05
| | | | | | | | | | | | | | | | | | | | | | | | Remove false lockdep warnings about lock recursion when declaring IRQs as being wake-capable, by marking putting GPIO irq_desc locks into their own class. (Thanks to Peter Zijlstra for helping track down such a small fix to this problem.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Fix sleep under spinlock for cpufreqHiroshi DOYU2008-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [ 10.523437] BUG: sleeping function called from invalid context at kernel/mut6 [ 10.523437] in_atomic():0, irqs_disabled():128 [ 10.523437] [<c002c168>] (dump_stack+0x0/0x14) from [<c005374c>] (__might_sl) [ 10.523437] [<c0053698>] (__might_sleep+0x0/0xd4) from [<c024fdf4>] (mutex_l) [ 10.523437] r5 = C02F0DE8 r4 = C02F0DF0 [ 10.523437] [<c024fdd4>] (mutex_lock+0x0/0x44) from [<c0041df4>] (clk_get+0x) [ 10.523437] r4 = 00000000 [ 10.523437] [<c0041da4>] (clk_get+0x0/0x128) from [<c0046520>] (omap_getspee) [ 10.523437] r8 = 00000002 r7 = 00000000 r6 = C031DAF8 r5 = C0473980 [ 10.523437] r4 = 00000000 [ 10.523437] [<c00464fc>] (omap_getspeed+0x0/0x5c) from [<c01b8518>] (cpufreq) [ 10.523437] r5 = C0473980 r4 = 00000002 Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Pass logical DMA channel number always to callback handlersJarkko Nikula2008-03-05
| | | | | | | | | | | | | | | | | | This makes parameter passing to DMA handlers uniform between non-chained and chained transfers and makes debugging easier. Additional data like chain_id can be always passed to handlers via callback data if needed. Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-27 22:22:28 -0500