aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
Commit message (Collapse)AuthorAge
* [PATCH] Avoiding mmap fragmentationWolfgang Wander2005-06-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ingo recently introduced a great speedup for allocating new mmaps using the free_area_cache pointer which boosts the specweb SSL benchmark by 4-5% and causes huge performance increases in thread creation. The downside of this patch is that it does lead to fragmentation in the mmap-ed areas (visible via /proc/self/maps), such that some applications that work fine under 2.4 kernels quickly run out of memory on any 2.6 kernel. The problem is twofold: 1) the free_area_cache is used to continue a search for memory where the last search ended. Before the change new areas were always searched from the base address on. So now new small areas are cluttering holes of all sizes throughout the whole mmap-able region whereas before small holes tended to close holes near the base leaving holes far from the base large and available for larger requests. 2) the free_area_cache also is set to the location of the last munmap-ed area so in scenarios where we allocate e.g. five regions of 1K each, then free regions 4 2 3 in this order the next request for 1K will be placed in the position of the old region 3, whereas before we appended it to the still active region 1, placing it at the location of the old region 2. Before we had 1 free region of 2K, now we only get two free regions of 1K -> fragmentation. The patch addresses thes issues by introducing yet another cache descriptor cached_hole_size that contains the largest known hole size below the current free_area_cache. If a new request comes in the size is compared against the cached_hole_size and if the request can be filled with a hole below free_area_cache the search is started from the base instead. The results look promising: Whereas 2.6.12-rc4 fragments quickly and my (earlier posted) leakme.c test program terminates after 50000+ iterations with 96 distinct and fragmented maps in /proc/self/maps it performs nicely (as expected) with thread creation, Ingo's test_str02 with 20000 threads requires 0.7s system time. Taking out Ingo's patch (un-patch available per request) by basically deleting all mentions of free_area_cache from the kernel and starting the search for new memory always at the respective bases we observe: leakme terminates successfully with 11 distinctive hardly fragmented areas in /proc/self/maps but thread creating is gringdingly slow: 30+s(!) system time for Ingo's test_str02 with 20000 threads. Now - drumroll ;-) the appended patch works fine with leakme: it ends with only 7 distinct areas in /proc/self/maps and also thread creation seems sufficiently fast with 0.71s for 20000 threads. Signed-off-by: Wolfgang Wander <wwc@rentec.com> Credit-to: "Richard Purdie" <rpurdie@rpsys.net> Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Acked-by: Ingo Molnar <mingo@elte.hu> (partly) Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/driver-2.6Linus Torvalds2005-06-20
|\
| * [PATCH] Driver Core: arch: update device attribute callbacksYani Ioannou2005-06-20
| | | | | | | | | | Signed-off-by: Yani Ioannou <yani.ioannou@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | [PATCH] ARM: 2719/1: enable module support in ixp2000 defconfigs by defaultLennert Buytenhek2005-06-20
| | | | | | | | | | | | | | | | | | | | | | Patch from Lennert Buytenhek The ixp2000 defconfigs are among the few that do not enable module support by default. I keep enabling module support by hand for every new kernel version, so let's just make this change upstream. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2716/1: SharpSL Param: Fix typoRichard Purdie2005-06-20
| | | | | | | | | | | | | | | | | | Patch from Richard Purdie Fix typo in sharpsl_param.c so it works correctly on collie. Signed-off-by: Richard Purdie Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2701/1: free up ixp2000 timer 4 for the watchdogLennert Buytenhek2005-06-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Lennert Buytenhek The IXP2000 has four timers, but if we're on an A-step IXP2800, timer 2 and 3 don't work. We need two timers for timekeeping (one for the timer interrupt and one for tracking missed jiffies), so on early IXP2800s we have no other choice but to use timer 1 and 4 for that, but on all other IXP2000s we'd rather leave timer 4 free since that's the only timer we can use for the watchdog. So, on buggy IXP2000s (i.e. the A-step IXP2800) we use timer 4 for tracking missed jiffies, and on all all non-buggy IXP2000s (i.e. everything but the A-step IXP2800) we use timer 2. On a pre-production IXP2800, this patch should print these messages on boot: Enabling IXP2800 erratum #25 workaround Unable to use IXP2000 watchdog due to IXP2800 erratum #25 On any non-buggy IXP2800 (as well as on IXP2400s) you shouldn't see anything at all, and the watchdog should be usable again. Signed-off-by: Lennert Buytenhek Signed-off-by: Deepak Saxena Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2693/1: Add PCI support for Versatile/PBCatalin Marinas2005-06-20
| | | | | | | | | | | | | | | | | | | | Patch from Catalin Marinas This patch adds PCI support for the Versatile PB926 platform. Signed-off-by: Colin King Signed-off-by: Catalin Marinas Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2686/2: AAEC-2000 Core supportBellido Nicolas2005-06-20
| | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Bellido Nicolas Core support for AAEC-2000 based platforms. This is an updated version of the previous patch, and takes into account Russell's comments. AAED-2000 default configuration will follow as soon as some problems with the bootloader are sorted out... Signed-off-by: Nicolas Bellido Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: Add iomap support for ARMRussell King2005-06-20
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: Remove nmi_tick() from Integrator.Russell King2005-06-20
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: Add missed include for dmabounce.cRussell King2005-06-20
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: Lindent GCC helper functionsRussell King2005-06-20
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: Remove gcc type-isms from GCC helper functionsRussell King2005-06-20
| | | | | | | | | | | | | | | | | | | | | | | | | | Convert ugly GCC types to Linux types: UQImode -> u8 SImode -> s32 USImode -> u32 DImode -> s64 UDImode -> u64 word_type -> int Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: Remove obsolete arch/arm/kernel/arch.cRussell King2005-06-20
| | | | | | | | | | | | | | This is not used anymore - RiscPC now contains the necessary supporting code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: Ensure DMA-bounced buffers are properly written to RAMRussell King2005-06-20
| | | | | | | | | | | | | | | | | | | | When DMA bounce buffers were unmapped and the data was memcpy'd to the original buffer, we were not ensuring that the data was written to RAM. This means that there was the potential for page cache pages to have different cache states depending whether they've been bounced or not. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: Add common CACHE_COLOUR macroRussell King2005-06-20
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: Fix delayed dcache flush for ARMv6 non-aliasing cachesRussell King2005-06-20
| | | | | | | | | | | | | | | | flush_dcache_page() did nothing for these caches, but since they suffer from I/D cache coherency issues, we need to ensure that data is written back to RAM. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM SMP: Messages about CPUs should be prefixed by CPU%uRussell King2005-06-19
|/ | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge with ../linux-2.6-smpRussell King2005-06-19
|\
| * [PATCH] ARM SMP: Add missed files from Integrator/CP platformRussell King2005-06-19
| | | | | | | | | | | | Add missed new files from basic SMP support for the Integrator/CP platform. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [PATCH] ARM SMP: Add basic support Integrator/CP platformRussell King2005-06-18
| | | | | | | | | | | | Add basic SMP support for the Integrator/CP platform. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [PATCH] ARM SMP: Add support for startup of secondary processorsRussell King2005-06-18
| | | | | | | | | | | | | | | | | | Create a temporary page table to startup secondary processors. This page table must have a 1:1 virtual/physical mapping for the kernel in addition to the standard mappings to ensure that the secondary CPU can enable its MMU safely. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM SMP: Fix PXA/SA11x0 suspend resume crashRussell King2005-06-19
|/ | | | | | | We need to re-initialise the stack pointers for undefined, IRQ and abort mode handlers whenever we resume. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge with ../linux-2.6-smpRussell King2005-06-18
|\
| * [PATCH] ARM SMP: Fix vector entryRussell King2005-05-31
| | | | | | | | | | | | | | | | | | | | The current vector entry system does not allow for SMP. In order to work around this, we need to eliminate our reliance on the fixed save areas, which breaks the way we enable alignment traps. This patch changes the way we handle the save areas such that we can have one per CPU. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
| * [PATCH] ARM SMP: convert alignment enableRussell King2005-05-31
| | | | | | | | | | | | | | | | | | | | The current vector entry system does not allow for SMP. In order to work around this, we need to eliminate our reliance on the fixed save areas, which breaks the way we enable alignment traps. This patch makes the alignment trap enable code independent of the way we handle the save areas. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
| * [PATCH] ARM SMP: add IPI supportRussell King2005-05-21
| | | | | | | | | | | | | | Add support for inter-processor interrupts to the main IRQ handling code. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
| * [PATCH] ARM SMP: reallocate main IRQ handler code registersRussell King2005-05-21
| | | | | | | | | | | | | | By changing r9 -> r8 and r8 to 'tsk' (r9) we are able to remove one instruction from the preempt path. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
| * [PATCH] ARM SMP: consolidate main IRQ handler codeRussell King2005-05-21
| | | | | | | | Signed-off-by: Russell King <rmk@arm.linux.org.uk>
* | [PATCH] ARM: 2715/1: restore CPLD interrupts upon resume for Lubbock and ↵Nicolas Pitre2005-06-16
| | | | | | | | | | | | | | | | | | | | | | Mainstone Patch from Nicolas Pitre Without this some devices fail to work again after a suspend event. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2713/1: Fix the GPIO base for Integrator/CPCatalin Marinas2005-06-16
| | | | | | | | | | | | | | | | | | | | | | Patch from Catalin Marinas The GPIO base for Integrator/CP is different from the Integrator/AP. This patch sets the correct value for INTEGRATOR_GPIO_BASE. Signed-off-by: Catalin Marinas Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2712/1: Fix the RGB order for the Versatile CLCDCatalin Marinas2005-06-16
| | | | | | | | | | | | | | | | | | | | | | Patch from Catalin Marinas The current red and blue colours on the Versatile CLCD are reversed when the 5:6:5 mode is used. The patch sets the proper bit in the SYS_CLCD register value. Signed-off-by: Catalin Marinas Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2711/1: fix compilation on PXA targets with CONFIG_PM=nNicolas Pitre2005-06-13
| | | | | | | | | | | | | | Patch from Nicolas Pitre Signed-off-by: Nicolas Pitre Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2709/1: Systems with PCMCIA should also see IDE options (for ↵David Brownell2005-06-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CompactFlash memories) Patch from David Brownell The ARM generic Kconfig filters out IDE options ... except for an error prone ARMload of special cases. This adds one general case to the systems that will offer IDE options: kernels with PCMCIA support, which probably want to use IDE to access CompactFlash cards. This might allow many (most?) of the other cases to disappear, for systems that only see IDE hardware through CF cards. Right now this one patch is used to gate access to CF cards, including MicroDrives, for both omap_cf and at91_cf drivers. Signed-off-by: David Brownell Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2708/1: Fix hackkit CPU Frequency build faliureVincent Sanders2005-06-09
| | | | | | | | | | | | | | | | | | | | Patch from Vincent Sanders This fixes the "multiple definitions of cpufreq_get" build faliure on the hackkit SA1100 platform. Signed-off-by: Vincent Sanders Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2707/2: Fix badge4 CPU Frequency build faliureVincent Sanders2005-06-09
| | | | | | | | | | | | | | | | | | | | Patch from Vincent Sanders This fixes the "multiple definitions of cpufreq_get" build faliure on the Badge4 SA1100 platform. Signed-off-by: Vincent Sanders Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2706/1: Fix compile on SA-based iPAQs and remove stale CREDITS infoDave Neuer2005-06-09
| | | | | | | | | | | | | | | | | | | | Patch from Dave Neuer This fixes the "multiple definitions of cpufreq_get" errors on StrongARM-based iPAQs. Signed-off-by: Dave Neuer Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: Remove zero-byte sized fileRussell King2005-06-09
| | | | | | | | | | | | | | Remove the remaining zero byte file left over from the Xscale fixes. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
* | [PATCH] ARM: 2664/2: add support for atomic ops on pre-ARMv6 SMP systemsNicolas Pitre2005-06-08
| | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre Not that there might be many of them on the planet, but at least RMK apparently has one. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2705/1: fix writesw for misaligned source pointerNicolas Pitre2005-06-08
| | | | | | | | | | | | | | Patch from Nicolas Pitre Signed-off-by: Nicolas Pitre Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: Fix Xscale copy_page implementationRussell King2005-06-08
| | | | | | | | | | | | | | | | | | | | The ARM copypage changes in 2.6.12-rc4-git1 removed the preempt locking from the copypage functions which broke the XScale implementation. This patch fixes the locking on XScale and removes the now unneeded minicache code. Signed-off-by: Russell King <rmk@arm.linux.org.uk> Checked-by: Richard Purdie
* | [PATCH] ARM: 2700/1: Disable IXP2000 IRQs at bootupDeepak Saxena2005-06-03
| | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Deepak Saxena The IXDP2800 bootloader does not disable IRQs before jumping into the kernel and this is causing the Grand Unified KGDB to crash the system when we do an early call to trap_init() and irq handlers have not yet been registered. This patch disables IRQs before we jump into the kernel. Signed-off-by: Deepak Saxena Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2691/1: PXA27x sleep fixes take 2Todd Poynor2005-06-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Todd Poynor PXA27x sleep fixes: * set additional sleep/wakeup registers for Mainstone boards. * move CKEN=0 to pxa25x-specific code; that value is harmful on pxa27x. * save/restore additional registers, including some found necessary for C5 processors and/or newer blob versions. * enable future support of additional sleep modes for PXA27x (eg, standby, deep sleep). * split off cpu-specific sleep processing between pxa27x and pxa25x into separate files (partly in preparation for additional sleep modes). Includes fixes from David Burrage. Signed-off-by: Todd Poynor Signed-off-by: Nicolas Pitre Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] ARM: 2694/1: [s3c2410/dma] release irq properly to fix kernel oopsAlbrecht Dreß2005-06-03
|/ | | | | | | | | | | | | | Patch from Albrecht Dreß Problem: When a module requests a DMA channel via the function s3c2410_dma_request(), this function requests the appropriate irq under the name of the client module. When the client module is unloaded, it calls s3c2410_dma_free() which does not free the irq. Consequently, when e.g. running "cat /proc/interrupts", the irq owner points to freed memory, leading to a kernel oops. File: linux/arch/arm/mach-s3c2410/dma.c Fix: trivial, below Signed-off-by: Albrecht Dreß Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [PATCH] ARM: Fix build errorRussell King2005-05-16
| | | | | | Mainline kernels don't have VECTORS_HIGH nor COPYPAGE_MINICACHE yet. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
* [PATCH] ARM: 2678/1: S3C2440 - cpu fixes, hdiv divisors and nand dev nameBen Dooks2005-05-12
| | | | | | | | | | | | Patch from Ben Dooks Fix the setting of hdiv when set to divide-by-2. Thanks to Jeonghoon Yoon for pointing this out. Change name of the NAND device to "s3c2440-nand" as it is not similar enough to the "s3c2410-nand" device. Signed-off-by: Ben Dooks Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [PATCH] ARM: 2677/1: S3C2440 - UPLL frequency doubledBen Dooks2005-05-12
| | | | | | | | | | | Patch from Ben Dooks S3C2440 UPLL is the same as the S3C2410 UPLL, it is only the MPLL which has an extra multiplication factor of 2 in the multiplier. Signed-off-by: Ben Dooks Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [PATCH] ARM: 2680/1: refine TLS reg availability some more againNicolas Pitre2005-05-12
| | | | | | | | | Patch from Nicolas Pitre Not all ARMv6 processors implement the TLS register. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [PATCH] ARM: 2663/2: I can't typeNicolas Pitre2005-05-10
| | | | | | | Patch from Nicolas Pitre Signed-off-by: Nicolas Pitre Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [PATCH] ARM: Add V6 aliasing cache flushRussell King2005-05-10
| | | | | | | Add cache flushing support for aliased V6 caches to flush_dcache_page. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 23:29:33 -0500