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* [ARM] 5562/2: at91: add gpio button support for at91sam9g20ekNicolas Ferre2009-06-29
| | | | | | | | | This adds input keyboard gpio support on at91sam9g20ek board. It adds button 3 and 4. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5563/1: at91: at91sam9rlek lcd interface correctionNicolas Ferre2009-06-27
| | | | | | | | | | | | Here is a little update to the at91sam9rlek lcd interface. This will correct the power pin of the LCD. It will also add precision to the struct atmel_lcdfb_info scructure: backlight enabling and wiring mode correction: RGB wiring on the -EK board. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5565/2: Use PAGE_SIZE and RO_DATA() in link scriptLinus Walleij2009-06-25
| | | | | | | | | | | | Update the link script for ARM to use PAGE_SIZE instead of hard- coded 4096. Also the old RODATA macro is deprecated for the RO_DATA(PAGE_SIZE) macro. As a consequence the PAGE_SIZE was changed from (1UL << PAGE_SHIFT) to (_AC(1,UL) << PAGE_SHIFT) because the linker does not understand the "UL" suffix to numeric constants. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5560/1: Avoid buffer overrun in case of an invalid IRQAaro Koskinen2009-06-25
| | | | | | | | | | | handle_bad_irq() expects the IRQ number to be valid (used for statistics), so it cannot be called with an illegal vector. The problem was reported by a static analysis tool. The change makes bad_irq_desc redundant, so delete it. Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 's3c-fixes' of git://aeryn.fluff.org.uk/bjdooks/linuxRussell King2009-06-25
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| * [ARM] GTA02: build fixes (s3c2410_nand_set usage)Nelson Castillo2009-06-23
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes two errors we get when building GTA02 kernel. ~ use_bbt is incorrect, we need flash_bbt. ~ We do not need .force_soft_ecc because we can unset CONFIG_MTD_NAND_S3C2410_HWECC. Signed-off-by: Nelson Castillo <arhuaco@freaks-unidos.net> [ben-linux@fluff.org: updated patch description] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * [ARM] MINI2440: Add missing flash_bbt flat to NANDBen Dooks2009-06-23
| | | | | | | | | | | | | | | | | | The commit 9db41f9edcb87ae050fcb171c44be7f212728d54 added the .flash_bbt flag to the nand set, so add this back into the mach-mini2440.c file (taken out on initial commit to allow build). Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * [ARM] s3c2410_defconfig: add MINI2440 machine to buildBen Dooks2009-06-23
| | | | | | | | | | | | | | Add the MINI2440 to the list of machines built by the central defconfig. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * [ARM] S3C: Fix S3C24XX build to not include s3c64xx IIS devicesBen Dooks2009-06-23
| | | | | | | | | | | | | | | | | | | | | | | | Commit 52da219e9664e537a745877b0efa7cf2b1ff2996 added IIS platform devices, but these do not build on s3c24xx systems and the file depends on SND_S3C24XX_SOC, which is selected for all S3C64XX/S3C24XX systems. As a quick fix, make the dev-audio.o file depends on SND_S3C64XX_SOC_I2S instead. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * [ARM] S3C24XX: Fix missing s3c_iis_device.Ben Dooks2009-06-23
| | | | | | | | | | | | | | | | | | | | | | | | Commit 52da219e9664e537a745877b0efa7cf2b1ff2996 removed the s3c_device_iis, but didn't replace it with anything so a number of s3c24xx machines are currently failing to build. As a temporary fix, re-instate s3c_device_iis until a proper replacement can be done for it. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * [ARM] MINI2440: remove duplicated #includeHuang Weiyi2009-06-23
| | | | | | | | | | | | | | | | Remove duplicated #include('s) in arch/arm/mach-s3c2440/mach-mini2440.c Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * [ARM] S3C24XX: Fix spi-bus configuration build errorsBen Dooks2009-06-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit ec976d6eb021dc8f2994248c310a41540f4756bd removed a number of gpio definitions from <mach/hardware.h> but misssed updating these two files: Fix the following build errors by including <linux/gpio.h>: arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c: In function 's3c24xx_spi_gpiocfg_bus1_gpg5_6_7': arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c:25: error: implicit declaration of function 's3c2410_gpio_cfgpin' arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c:28: error: implicit declaration of function 's3c2410_gpio_pullup' arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c: In function 's3c24xx_spi_gpiocfg_bus0_gpe11_12_13': arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c:25: error: implicit declaration of function 's3c2410_gpio_cfgpin' arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c:28: error: implicit declaration of function 's3c2410_gpio_pullup' Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * [ARM] S3C: Remove unused CONFIG_DEBUG_S3C_PORTBen Dooks2009-06-23
| | | | | | | | | | | | | | Remove the unused CONFIG_DEBUG_S3C_PORT as we currently only have support for using the S3C UARTs via the low-level debug code. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * [ARM] S3C24XX: Fix use of CONFIG_S3C24XX_PWMBen Dooks2009-06-23
| | | | | | | | | | | | | | | | | | | | | | | | CONFIG_S3C24XX_PWM was defined in arch/arm/plat-s3c24xx/Kconfig but not used anywhere else as the corresponding makefile used CONFIG_HAVE_PWM (selected by CONFIG_S3C24XX_PWM) to compile the PWM driver. Change the makefile to use CONFIG_S3C24XX_PWM to compile this driver to ensure it is only build when needed. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* | OMAP: Fix IOMEM macro for assemblyTony Lindgren2009-06-23
| | | | | | | | | | | | Otherwise IOMEM calculations can fail. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP2/3: Initialize gpio debounce registerjanboe2009-06-23
| | | | | | | | | | | | | | | | | | | | Some bootloader may initialize debounce register and this will make dbclk not consist with the debounce register after linux kernel boot up. Signed-off-by: janboe <janboe.ye@gmail.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP: IOMMU: function flush_iotlb_page is not flushing correct entryFernando Guzman Lugo2009-06-23
| | | | | | | | | | | | | | | | | | The function flush_iotlb_page is not loading the CAM register with the correct entry to be flushed, so it is flushing other entry Signed-off-by: Fernando Guzman Lugo <x0095840@ti.com> Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP3: RX51: Use OneNAND sync read / writeAdrian Hunter2009-06-23
| | | | | | | | | | | | | | Use OneNAND sync read / write Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP2/3: gpmc-onenand: correct use of async timingsAdrian Hunter2009-06-23
| | | | | | | | | | | | | | | | | | | | Use async timings when sync timings are not requested. Also ensure that OneNAND is in async mode when async timings are used. Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP3: DMA: Enable idlemodes for DMA OCPKalle Jokiniemi2009-06-23
| | | | | | | | | | | | | | | | | | This patch enables MStandby smart-idle mode, autoidle smartidle mode, and the autoidle bit for DMA4_OCP_SYSCONFIG. Signed-off-by: Kalle Jokiniemi <ext-kalle.jokiniemi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.deeprootsystems.com>
* | OMAP3: SRAM size fix for HS/EMU devicesTero Kristo2009-06-23
| | | | | | | | | | | | | | | | SRAM size fix for HS/EMU devices Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP2/3: Add omap_type() for determining GP/EMU/HSKevin Hilman2009-06-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The omap_type() function is added and returns the DEVICETYPE field of the CONTROL_STATUS register. The result can be used for conditional code based on whether device is GP (general purpose), EMU or HS (high security). Also move the type defines so omap1 code compile does not require ifdefs for sections using these defines. This code is needed for the following fix to set the SRAM size correctly for HS omaps. Also at least PM and watchdog code will need this function. Signed-off-by: Kevin Hilman <khilman@ti.deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP2/3: omap mailbox: platform_get_irq() error ignoredRoel Kluin2009-06-23
| | | | | | | | | | | | | | | | | | platform_get_irq may return -ENXIO. but struct omap_mbox mbox_dsp_info.irq is unsigned, so the error was not noticed. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP2/3: mmc-twl4030: use correct controller in twl_mmc23_set_powerGrazvydas Ignotas2009-06-23
| | | | | | | | | | | | | | | | | | twl_mmc23_set_power() has MMC2 twl_mmc_controller hardcoded in it, which breaks MMC3. Find the right controller to use instead. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP1: remove duplicated #includeHuang Weiyi2009-06-23
| | | | | | | | | | | | | | Remove duplicated #include in arch/arm/mach-omap1/board-nokia770.c. Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP1: Fix N770 MMC supportAndrew de Quincey2009-06-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the N770's MMC configuration options seem to have been dropped. This patch adds them back in again. Note that only the .ocr_mask change was /critical/, but I've added the .max_freq setting back as well, as the original sources had it. Can anyone confirm if this is unnecessary? Secondly, there is support in the original code for a 4wire/higher speed mode. As I don't have the requisite N770 hardware (I think it was a rev2 N770?) to test this, I can't really add it back. Signed-off-by: Andrew de Quincey <adq@lidskialf.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP1: Fix compilation of arch/arm/mach-omap1/mailbox.cJonathan McDowell2009-06-23
|/ | | | | | | | | | | This fixes the positioning of " in MODULE_AUTHOR, which is currently causing a build failure on latest git with CONFIG_OMAP_MBOX_FWK=m; the original breakage appears to date from the end of last year in a5abbbe52b7e89a7633319c5417bd4331f7ac8ed Signed-Off-By: Jonathan McDowell <noodles@earth.li> Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge git://git.infradead.org/mtd-2.6Linus Torvalds2009-06-22
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.infradead.org/mtd-2.6: (63 commits) mtd: OneNAND: Allow setting of boundary information when built as module jffs2: leaking jffs2_summary in function jffs2_scan_medium mtd: nand: Fix memory leak on txx9ndfmc probe failure. mtd: orion_nand: use burst reads with double word accesses mtd/nand: s3c6400 support for s3c2410 driver [MTD] [NAND] S3C2410: Use DIV_ROUND_UP [MTD] [NAND] S3C2410: Deal with unaligned lengths in S3C2440 buffer read/write [MTD] [NAND] S3C2410: Allow the machine code to get the BBT table from NAND [MTD] [NAND] S3C2410: Added a kerneldoc for s3c2410_nand_set mtd: physmap_of: Add multiple regions and concatenation support mtd: nand: max_retries off by one in mxc_nand mtd: nand: s3c2410_nand_setrate(): use correct macros for 2412/2440 mtd: onenand: add bbt_wait & unlock_all as replaceable for some platform mtd: Flex-OneNAND support mtd: nand: add OMAP2/OMAP3 NAND driver mtd: maps: Blackfin async: fix memory leaks in probe/remove funcs mtd: uclinux: mark local stuff static mtd: uclinux: do not allow to be built as a module mtd: uclinux: allow systems to override map addr/size mtd: blackfin NFC: fix hang when using NAND on BF527-EZKITs ...
| * Merge branch 'next-mtd' of git://aeryn.fluff.org.uk/bjdooks/linuxDavid Woodhouse2009-06-08
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| | * [MTD] [NAND] S3C2410: Allow the machine code to get the BBT table from NANDMichel Pollet2009-06-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | Added a flag to allow the machine code to tell the NAND subsystem that it should try to pickup a BBT from the flash, and also skip the NAND full scan at startup. Signed-off-by: Michel Pollet <buserror@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * [MTD] [NAND] S3C2410: Added a kerneldoc for s3c2410_nand_setMichel Pollet2009-06-08
| | | | | | | | | | | | | | | | | | | | | | | | Converted the old comnent to kerneldoc. Signed-off-by: Michel Pollet <buserror@gmail.com> [ben-linux@fluff.org: updated subject, spello fix] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * [MTD] [NAND] S3C2410: Small colon cleanupNelson Castillo2009-05-30
| | | | | | | | | | | | | | | | | | | | | | | | checkpatch would complain with "disable_ecc : 1". Signed-off-by: Nelson Castillo <arhuaco@freaks-unidos.net> [ben-linux@fluff.org: subject cleanup] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | mtd: nand: davinci_nand, 4-bit ECC for smallpageDavid Brownell2009-06-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Minimal support for the 4-bit ECC engine found on DM355, DM365, DA830/OMAP-L137, and similar recent DaVinci-family chips. This is limited to small-page flash for now; there are some page layout issues for large page chips. Note that most boards using this engine (like the DM355 EVM) include 2GiB large page chips. Sanity tested on DM355 EVM after swapping the socketed NAND for a small-page one. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* | | Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2009-06-22
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (49 commits) [ARM] idle: clean up pm_idle calling, obey hlt_counter [ARM] S3C: Fix gpio-config off-by-one bug [ARM] S3C64XX: add to_irq() support for EINT() GPIO [ARM] S3C64XX: clock.c: fix typo in usb-host clock ctrlbit [ARM] S3C64XX: fix HCLK gate defines [ARM] Update mach-types [ARM] wire up rt_tgsigqueueinfo and perf_counter_open OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisons OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLL OMAP3: Add support for DPLL3 divisor values higher than 2 OMAP3 SRAM: convert SRAM code to use macros rather than magic numbers OMAP3 SRAM: add more comments on the SRAM code OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock change OMAP3 clock: add a short delay when lowering CORE clk rate OMAP3 clock: initialize SDRC timings at kernel start OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize [ARM] Add old Feroceon support to compressed/head.S [ARM] 5559/1: Limit the stack unwinding caused by a kthread exit [ARM] 5558/1: Add extra checks to ARM unwinder to avoid tracing corrupt stacks [ARM] 5557/1: Discard some ARM.ex*.*exit.text sections when !HOTPLUG or !HOTPLUG_CPU ...
| * | | [ARM] idle: clean up pm_idle calling, obey hlt_counterRussell King2009-06-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pm_idle is used by infrastructure (eg, cpuidle) which expects architectures to call it in a certain way. Arrange for ARM to follow x86's lead on this and call pm_idle() with interrupts already disabled. However, we expect pm_idle() to enable interrupts before it returns. Also, OMAP wants to be able to disable hlt-ing, so allow hlt_counter to prevent all calls to pm_idle. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | Merge branch 'next-s3c' of git://aeryn.fluff.org.uk/bjdooks/linux into develRussell King2009-06-22
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| | * | | [ARM] S3C: Fix gpio-config off-by-one bugMarek Szyprowski2009-06-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix gpio-config off-by-one bug. Without this patch, touching GPA0 pin on S3C64XX platform causes kernel oops. Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C64XX: add to_irq() support for EINT() GPIOMarek Szyprowski2009-06-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | N group Add to_irq() function to onvert gpio to irq for external interrupt group (GPN). Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C64XX: clock.c: fix typo in usb-host clock ctrlbitPeter Korsgaard2009-06-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The usb-host clock was using the wrong define (the SCLK enable for the usb-host-bus) to change the HCLK register instead of the HCLK_UHOST bit. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| | * | | [ARM] S3C64XX: fix HCLK gate definesPeter Korsgaard2009-06-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A few typos seems to have sneaked into the HCLK gate defines, causing the usb host clock to not get enabled. Fix them according to the reference manual and throw in the 3d accel bit for good measure. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| * | | | [ARM] Update mach-typesRussell King2009-06-20
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | [ARM] wire up rt_tgsigqueueinfo and perf_counter_openRussell King2009-06-20
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | Merge branch 'omap-clock-for-next' of git://git.pwsan.com/linux-2.6 into develRussell King2009-06-20
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| | * | | | OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisonsRoel Kluin2009-06-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | with while (i++ < MAX_CLOCK_ENABLE_WAIT); i can reach MAX_CLOCK_ENABLE_WAIT + 1 after the loop, so if (i == MAX_CLOCK_ENABLE_WAIT) that's still success. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLLPaul Walmsley2009-06-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correspondence with the TI OMAP hardware team indicates that SDRC_DLLA_CTRL.FIXEDDELAY should be initialized to 0x0f. This number was apparently derived from process validation. This is only used when the SDRC DLL is unlocked (e.g., SDRC clock frequency less than 83MHz). Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | OMAP3: Add support for DPLL3 divisor values higher than 2Tero Kristo2009-06-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously only 1 and 2 was supported. This is needed for DVFS VDD2 control. Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
| | * | | | OMAP3 SRAM: convert SRAM code to use macros rather than magic numbersPaul Walmsley2009-06-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert omap3_sram_configure_core_dpll() to use macros rather than magic numbers. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | OMAP3 SRAM: add more comments on the SRAM codePaul Walmsley2009-06-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up comments and copyrights on the CORE DPLL3 M2 divider change code. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock changePaul Walmsley2009-06-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Program the SDRC_MR_0 register as well during SDRC clock changes. This register allows selection of the memory CAS latency. Some SDRAM chips, such as the Qimonda HYB18M512160AF6, have a lower CAS latency at lower clock rates. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | OMAP3 clock: add a short delay when lowering CORE clk ratePaul Walmsley2009-06-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When changing the SDRAM clock from 166MHz to 83MHz via the CORE DPLL M2 divider, add a short delay before returning to SDRAM to allow the SDRC time to stabilize. Without this delay, the system is prone to random panics upon re-entering SDRAM. This time delay varies based on MPU frequency. At 500MHz MPU frequency at room temperature, 64 loops seems to work okay; so add another 32 loops for environmental and process variation. Signed-off-by: Paul Walmsley <paul@pwsan.com>
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