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* Merge branch 'devel-omap-misc' into omap-for-linusTony Lindgren2010-09-27
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| * omap: mmc: extended to pass host capabilities from board fileSukumar Ghorai2010-09-27
| | | | | | | | | | | | | | | | | | wires variable is renamed, extended and this single variable to be used to pass the platform capabilities, e.g DDR mode. Also removed the hardcoded value was using as bus-width. Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap2: McBSP: Remove mux code for OMAP2420 McBSP2 and do cleanupsJarkko Nikula2010-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | This 'legacy' OMAP2420 McBSP2 muxing code is currently broken after recent conversion to new mux code. The omap_mcbsp_request calling this code is usually called after booting whereas the omap_mux_init_signal is __init marked so null pointer dereference would occur. Fix this by removing the muxing code and let the bootloader or board file to do it if necessary. Remove also omap2_mcbsp_ops as there is no use for it. Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: McBSP: Do not enable SRG in slave modePeter Ujfalusi2010-09-27
| | | | | | | | | | | | | | | | | | | | | | | | McBSP SRG (Sample Rate Generator) and FSG (Frame Sync Generator) is only needed to be enabled, when McBSP is master. In McBSP slave mode, the SRG, and FSG can be kept disabled, which might save some power at the end in this configuration. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: i2c: Avoid compilation error in case the header is included multiple timesSubramaniam C.A2010-09-27
| | | | | | | | | | | | | | | | Added defines to avoid compilation error. Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com> Acked-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: crypto: updates to enable omap aesDmitry Kasatkin2010-09-27
| | | | | | | | | | | | | | | | Updates to enable omap aes Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin@nokia.com> [tony@atomide.com: updated to use CONFIG_ARCH_OMAP2/3 instead of old 24XX/34XX] Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: usb: fix build warningAnand Gadiyar2010-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix this and similar build warnings when building with omap_4430sdp_defconfig. CC arch/arm/mach-omap2/board-4430sdp.o In file included from arch/arm/mach-omap2/board-4430sdp.c:36: arch/arm/plat-omap/include/plat/usb.h:109: warning: return type defaults to 'int' Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Acked-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: n8x0: Mux i2s codec port pins for McBSP blockJarkko Nikula2010-09-23
| | | | | | | | | | | | | | | | | | Bootloader on Nokia N800 and N810 muxes I2C codec port pins for EAC block. As there is no driver and use for EAC, mux those pins for McBSP instead since N810 ASoC drivers can use it. Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: n8x0: Register i2c2 and add board info with tlv320aic3xfor N810Jarkko Nikula2010-09-23
| | | | | | | | | | | | | | | | | | | | Second i2c bus on Nokia N800 and N810 shares both common and hw specific peripherals. Register now this bus and add board info with tlv320aic3x for N810. Common peripherals may be added as an additional board info to omap_register_i2c_bus(2, ...); Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: n8x0: Cleanup i2c1 and menelaus registrationJarkko Nikula2010-09-23
| | | | | | | | | | | | | | | | | | | | - Move n8x0_i2c_board_info_1 out from #ifdef CONFIG_MENELAUS block, register i2c1 in n8x0_init_machine and do a few clean-ups around these. Code looks better if board infos are grouped together - Mark n8x0_i2c_board_info_1 and n8x0_menelaus_platform_data with __initdata Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap2: fix assorted compiler warningsSanjeev Premi2010-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes these compiler warnings: CC arch/arm/mach-omap2/mux.o arch/arm/mach-omap2/mux.c: In function 'omap_mux_init_gpio': arch/arm/mach-omap2/mux.c:90: warning: 'gpio_mux' may be used uninitial ized in this function CC arch/arm/plat-omap/gpio.o arch/arm/plat-omap/gpio.c: In function 'omap2_gpio_resume_after_idle': arch/arm/plat-omap/gpio.c:2152: warning: 'l' may be used uninitialized in this function arch/arm/plat-omap/gpio.c: In function 'omap2_gpio_prepare_for_idle': arch/arm/plat-omap/gpio.c:2085: warning: 'l2' may be used uninitialized in this function arch/arm/plat-omap/gpio.c:2085: warning: 'l1' may be used uninitialized in this function CC arch/arm/mach-omap2/board-omap4panda.o arch/arm/mach-omap2/board-omap4panda.c: In function 'omap4_panda_init': arch/arm/mach-omap2/board-omap4panda.c:277: warning: unused variable 's tatus' Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Merge branch 'omap_for_2.6.37' of ↵Tony Lindgren2010-09-24
|\ \ | |/ |/| | | git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base into omap-for-linus
| * omap4: Fix bootup crash observed with higher CPU clocksSantosh Shilimkar2010-09-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is temporary fix to below crash. This is observed when CPU is clocked more than 600 MHz. Unhandled fault: imprecise external abort (0x1406) at 0xbf9ef65c Internal error: : 1406 [#1] PREEMPT SMP last sysfs file: Modules linked in: CPU: 0 Not tainted (2.6.36-rc3+ #18) PC is at kernel_thread_helper+0x0/0x14 LR is at kernel_thread_helper+0x0/0x14 pc : [<c003ce14>] lr : [<c003ce14>] psr: 00000093 sp : dc83bff8 ip : 00000000 fp : 00000000 r10: 00000000 r9 : 00000000 r8 : 00000000 r7 : 00000013 r6 : c003ce28 r5 : c008935c r4 : 00000000 r3 : 00000000 r2 : 00000000 r1 : 00000000 r0 : 00000000 Flags: nzcv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c53c7f Table: 8000404a DAC: 00000017 Process swapper (pid: 2, stack limit = 0xdc83a2f0) Stack: (0xdc83bff8 to 0xdc83c000) bfe0: 00000000 ffffffff [<c003ce14>] (kernel_thread_helper+0x0/0x14) from [<fffffffe>] (0xfffffffe) Code: c03a0ba3 c03a5fcb c045c880 c0394035 (eb017701) ---[ end trace 1b75b31a2719ed1c ]--- The timer hwmod adaptation will eventually fix it in a proper way. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| * omap4: Panda: Add DEBUG_LL supportDavid Anders2010-09-24
| | | | | | | | | | | | Add support for use of DEBUG_LL for use with PandaBoard. Signed-off-by: David Anders <x0132446@ti.com>
| * omap4: l2x0: Fix init parameter for es2.0Santosh Shilimkar2010-09-24
| | | | | | | | | | | | | | | | | | | | On ES2.0 the L2 cache init parameter ineeds to be changed to take care of cache size. The cache size is 1MB on ES2.0 vs 512KB on ES1.0 This patch fixes the init parameter to update the same using dynamic cpu version check Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| * omap4: Update id.c and cpu.h for es2.0Santosh Shilimkar2010-09-24
| | | | | | | | | | | | | | | | | | This patch updates the id.c and cpu.h files to support omap4 ES2.0 silicon detection. Few initial omap4 es2 samples IDCODE is same as es1. So the patch uses ARM cpuid register to detect the ES version for such samples Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| * omap4: sram: Fix start addressVikram Pandita2010-09-24
| | | | | | | | | | | | | | | | | | On OMAP4 there is no need to have SRAM_BOOTLOADER_SZ provision Hence put this macro under CONFIG_ARCH_OMAP2PLUS check Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| * omap: sram: fix is_sram_locked checkVikram Pandita2010-09-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For OMAP24xx/34xx/44xx: omap_type() returns the correct type: OMAP2_DEVICE_TYPE_TEST OMAP2_DEVICE_TYPE_EMU OMAP2_DEVICE_TYPE_SEC OMAP2_DEVICE_TYPE_GP OMAP2_DEVICE_TYPE_BAD In current implementation there are two problems: Problem 1: For 34xx, the current if check will never return true. Problem 2: For 24xx the correct type check should be with omap_type() function Verified by checking the TRM 24xx for CONTROL_STATUS register bits Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | Merge branch 'pm-runtime' of ↵Tony Lindgren2010-09-23
|\ \ | | | | | | | | | ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
| * | OMAP1: PM: add simple runtime PM layer to manage clocksKevin Hilman2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On OMAP1, we do not have omap_device + omap_hwmod to manage the device-specific idle, enable and shutdown. Instead, just enable/disable device clocks automatically at the runtime PM level. This allows drivers to not have any OMAP1 specific clock management and allows them to simply use the runtime PM API to manage clocks. OMAP1 compile fixes Manjunatha GK <manjugk@ti.com> Cc: Manjunatha GK <manjugk@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP2+: PM: initial runtime PM core supportKevin Hilman2010-09-21
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement the new runtime PM framework as a thin layer on top of the omap_device API. OMAP specific runtime PM methods are registered with the as custom methods on the platform_bus. In order to determine if a device is an omap_device, its parent device is checked. All omap_devices have a new 'omap_device_parent_ device as their parent device, so checking for this parent is used to check for valid omap_devices. If a device is an omap_device, then the appropriate omap_device functions are called for it. If not, only the generic runtime PM functions are called. Device driver's ->runtime_idle() hook is called when the runtime PM usecount reaches zero for that device. Driver's ->runtime_suspend() hooks are called just before the device is disabled (via omap_device_idle()), and device driver ->runtime_resume() hooks are called just after device has been enabled (via omap_device_enable().) OMAP4 build support from Rajendra Nayak <rnayak@ti.com>. OMAP2 build support from Charulatha V <charu@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Charulatha V <charu@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | Merge branch 'pm-next' of ↵Tony Lindgren2010-09-23
|\ \ | | | | | | | | | ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
| * | OMAP: GPIO: ensure debounce clocks are disabled during idle/suspendKevin Hilman2010-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a GPIO bank has more than one GPIO with debounce enabled, the debounce clock will not be fully disabled before going to idle/suspend. In the idle path, we just do a single clk_disable() of the bank's debounce clock. If there are multiple debounce-enabled GPIOs in the bank, that clocks usage count will be > 1, so the clk_disable() will not actually disable the clock. So the fix is to clk_disable() for every debounce-enabled GPIO in the bank (and an equivalent clk_enable() of course.) Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP4: pm: Change l3_main to l3_main_1 during bus device initBenoit Cousson2010-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OMAP4 L3 interconnect is split in 3 part for power saving reason. Because of that there is no l3_main like on OMAP2 & 3 but 3 differentes l3_main_X instances. In the case of OMAP4, query only the l3_main_1 part. The clock and voltage are shared across the 3 instances. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP4: hwmod: Add initial data for OMAP4430 ES1 & ES2Benoit Cousson2010-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current version contains only the interconnects and the mpu hwmods. The remaining hwmods will be introduced by further patches on top of this one. - enable as well omap_hwmod.c build for OMAP4 Soc Please not that this file uses the new naming convention for naming HW IPs. This convention will be backported soon for previous OMAP2 & 3 data files. new name trm name ------------- ------------------- counter_32k synctimer_32k l3_main l3 timerX gptimerX / dmtimerX mmcX mmchsX / sdmmcX dma_system sdma smartreflex_X sr_X / sr? usb_host_fs usbfshost usb_otg_hs hsusbotg usb_tll_hs usbtllhs_config wd_timerX wdtimerX ipu cortexm3 / ducati dsp c6x / tesla iva ivahd / iva2.2 kbd kbdocp / keyboard mailbox system_mailbox mpu cortexa9 / chiron Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP: omap_device: make all devices a child of a new parent deviceKevin Hilman2010-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to help differentiate omap_devices from normal platform_devices, make them all a parent of a new common parent device. Then, in order to determine if a platform_device is also an omap_device, checking the parent is all that is needed. Users of this feature are the runtime PM core for OMAP, where we need to know if a device being passed in is an omap_device or not in order to know whether to call the omap_device API with it. In addition, all omap_devices will now show up under /sys/devices/omap instead of /sys/devices/platform Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | Revert "OMAP: omap_device: add omap_device_is_valid()"Kevin Hilman2010-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 0007122ad85cc36b1c18c0b59344093ca210d206. The dereference method of checking for a valid omap_device when wrapping a platform_device is rather unsafe and dangerous. Instead, a better way of checking for a valid omap-device is to use a common parent device for all omap_devices, then a check can simply be made using the device parent. The only user of this API was the initial version of the runtime PM core for OMAP. This has now been switched to check device parent, so there are no more users of this API. Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP clockdomain: initialize clockdomain registers when the clockdomain ↵Paul Walmsley2010-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | layer starts When the clockdomain layer initializes, place all clockdomains into software-supervised mode, and clear all wakeup and sleep dependencies immediately, rather than waiting for the PM code to do this later. This fixes a major bug where critical sleep dependencies added by the hwmod code are cleared during late PM init. As a side benefit, the _init_{wk,sleep}dep_usecount() functions are no longer needed, so remove them. Kevin Hilman <khilman@deeprootsystems.com> did all the really hard work on this, identifying the problem and finding the bug. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | omap: pm: Move set_pwrdm_state routine to common pm.cSantosh Shilimkar2010-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | The set_pwrdm_state() is needed on omap4 as well so move this routine to common pm.c file so that it's available for omap3/4 Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | omap: pm-debug: Enable wakeup_timer_milliseconds debugfs entrySantosh Shilimkar2010-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8e2efde9 added milliseconds suspend wakeup time support but same interface is not exported through debugfs This patch enables the debugfs hook for wakeup_timer_milliseconds Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | omap: pm-debug: Move common debug code to pm-debug.cSantosh Shilimkar2010-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves omap2_pm_wakeup_on_timer() and pm debug entries form pm34xx.c to pm-debug.c and export it, so that it is available to other OMAPs Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP4: pm.c extensions for OMAP4 supportThara Gopinath2010-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4 has an iva device and a dsp devcice where as OMAP2/3 has only an iva device. In this file the iva device in the system is registered under the name dsp_dev and the API to retrieve the iva device is omap2_get_dsp_device. This patch renames the dsp_dev to iva_dev, renames omap2_get_dsp_device to omap2_get_iva_device, registers dsp_dev for OMAP4 and adds a new API omap4_get_dsp_device to retrieve the dep_dev. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: move device-specific special cases from PM core into CPUidleKevin Hilman2010-09-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In an effort to simplify the core idle path, move any device-specific special case handling from the core PM idle path into the CPUidle pre-idle checking path. This keeps the core, interrupts-disabled idle path streamlined and independent of any device-specific handling, and also allows CPUidle to do the checking only for certain C-states as needed. This patch has the device checks in place for all states with the CHECK_BM flag, namely all states >= C2. This patch was inspired by a similar patch written by Tero Kristo as part of a larger series to add INACTIVE state support. NOTE: This is a baby-step towards decoupling device idle (or system idle) from CPU idle. Eventually, CPUidle should only manage the CPU, and device/system idle should be managed elsewhere. Cc: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP: PM debugfs removing OMAP3 hardcodings.Thara Gopinath2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes omap3 hardcodings from pm-debug.c so that enabling PM debugfs support does break compilation for other OMAP's. This is a preparatory patch for supporting OMAP4 pm entries through PM debugfs. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: whitespace cleanup around IO wakeup enableKevin Hilman2010-09-21
| |/ | | | | | | | | | | | | | | | | Cleanup indentation around IO wakeup enable, the '\' terminator is not required in C when wrapping an expression past end-of-line. Whitespace change only. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | Merge branch 'hwmod_2.6.37' of git://git.pwsan.com/linux-2.6 into omap-for-linusTony Lindgren2010-09-23
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| * | OMAP: hwmod: improve documentation, clean up function namesPaul Walmsley2010-09-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch: - adds more documentation to the hwmod code - fixes some documentation typos elsewhere in the file - changes the _sysc_*() function names to appear in (verb, noun) order, to match the rest of the function names. This patch should not result in any functional change. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Benoît Cousson <b-cousson@ti.com>
| * | OMAP: hwmod: Handle opt clocks node using clk_add_aliasPartha Basak2010-09-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For every optional clock present per hwmod per omap-device, this function adds an entry in the clocks list of the form <dev-id=dev_name, con-id=role>, if an entry is already present in the list of the form <dev-id=NULL, con-id=role>. The function is called from within the framework inside omap_device_build_ss(), after omap_device_register. This allows drivers to get a pointer to its optional clocks based on its role by calling clk_get(<dev*>, <role>). Link to discussions related to this patch: http://www.spinics.net/lists/linux-omap/msg34809.html Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Partha Basak <p-basak2@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: simplified loop iterator; removed the superfluous clk_get(), using the clk_get() in clk_add_alias() instead] Signed-off-by: Paul Walmsley <paul@pwsan.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP: hwmod: Enable module wakeup if in smartidleRajendra Nayak2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a module's OCP slave port is programmed to be in smartidle, its also necessary that they have module level wakeup enabled. Update _sysc_enable in hwmod framework to do this. The thread "[PATCH 7/8] : Hwmod api changes" archived here: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg34212.html has additional technical information on the rationale of this patch. Sergei Shtylyov <sshtylyov@mvista.com> identified an indentation problem with this patch - thanks, Sergei. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Partha Basak <p-basak2@ti.com> Signed-off-by: Benoît Cousson <b-cousson@ti.com> [paul@pwsan.com: revised patch description] Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com>
| * | OMAP: hwmod: Fix softreset for modules with optional clocksBenoit Cousson2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some modules (like GPIO, DSS...) require optionals clock to be enabled in order to complete the sofreset properly. Add a HWMOD_CONTROL_OPT_CLKS_IN_RESET flag to force all optional clocks to be enabled before reset. Disabled them once the reset is done. TODO: For the moment it is very hard to understand from the HW spec, which optional clock is needed and which one is not. So the current approach will enable all the optional clocks. Paul proposed a much finer approach that will allow to tag only the needed clock in the optional clock table. This might be doable as soon as we have a clear understanding of these dependencies. Reported-by: Partha Basak <p-basak2@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP: hwmod: Fix softreset status check for some new OMAP4 IPsBenoit Cousson2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In OMAP3 a specific SYSSTATUS register was used to get the softreset status. Starting in OMAP4, some IPs does not have SYSSTATUS register and instead use the SYSC softreset bit to provide the status. Other cases might exist: - Some IPs like McBSP does have a softreset control but no reset status. - Some IPs that represent subsystem, like the DSS, can contains a reset status without softreset control. The status is the aggregation of all the sub modules reset status. - Add a new flag (SYSC_HAS_RESET_STATUS) to identify the new programming model and replace the previous SYSS_MISSING, that was used to flag IP with softreset control but without the SYSSTATUS register, with a specific SYSS_HAS_RESET_STATUS flag. - MCSPI and MMC contains both programming models, so the legacy one will be prevented by removing the syss offset field that become useless. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Rajendra Nayak <rnayak@ti.com>
| * | OMAP: hwmod: add an hardreset API for use by other core codePaul Walmsley2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Expose an hardreset API from hwmod in order to assert / deassert all the individual reset lines that belong to an hwmod. This API is needed by some of the more complicated processor drivers, e.g., DSP/Bridge, Syslink, etc. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
| * | OMAP: hwmod: Force a softreset during _setupBenoit Cousson2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Force the softreset of every IPs during the _setup phase. IPs that cannot support softreset or that should not be reset must set the HWMOD_INIT_NO_RESET flag in the hwmod struct. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP: hwmod: Add hardreset management supportBenoît Cousson2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most processor IPs does have a hardreset signal controlled by the PRM. This is different of the softreset used for local IP reset from the SYSCONFIG register. The granularity can be much finer than orginal HWMOD, for ex, the IVA hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2... Since this granularity is needed by the driver, we have to ensure than one hwmod exist for each hardreset line. - Store reset lines as hwmod resources that a driver can query by name like an irq or sdma line. - Add two functions for asserting / deasserting reset lines in hwmods processor that require manual reset control. - Add one functions to get the current reset state. - If an hwmod contains only one line, an automatic assertion / de-assertion is done. -> de-assert the hardreset line only during enable from disable transition -> assert the hardreset line only during shutdown Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be kept in INITIALIZED state. They can be properly enabled only if the hardreset line is de-asserted before. For information here is the list of IPs with HW reset control on an OMAP4430 device: RM_DSP_RSTCTRL 1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control' 0,0,'RST1','RW','1','DSP - DSP reset control' RM_IVA_RSTCTRL 2,2,'RST3','RW','1','IVA logic and SL2 reset control' 1,1,'RST2','RW','1','IVA Sequencer2 reset control' 0,0,'RST1','RW','1','IVA sequencer1 reset control' RM_IPU_RSTCTRL 2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.' 1,1,'RST2','RW','1','IPU Cortex M3 CPU2 reset control.' 0,0,'RST1','RW','1','IPU Cortex M3 CPU1 reset control.' PRM_RSTCTRL 1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.' 0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.' RM_CPU0_CPU0_RSTCTRL RM_CPU1_CPU1_RSTCTRL 0,0,'RST','RW','0','Cortex A9 CPU0&1 warm local reset control' Signed-off-by: Benoit Cousson <b-cousson@ti.com> [paul@pwsan.com: made the hardreset functions static; moved the register twiddling into prm*.c functions in previous patches; changed the function names to conform with hwmod practice] Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Rajendra Nayak <rnayak@ti.com>
| * | OMAP2/3: PRM: add module hard reset supportPaul Walmsley2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds hard-reset support for processor modules (e.g., DSP, IVA) on OMAP2/3 platforms. It's based on the OMAP4 hard-reset support that Benoît developed in the previous patch. This patch is a collaboration between Benoît Cousson <b-cousson@ti.com> and Paul Walmsley <paul@pwsan.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
| * | OMAP4: PRM: add module hard reset supportBenoît Cousson2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most processor modules (e.g., DSP, IVA, IPU) on OMAPs can be reset under the control of the PRM. This patch adds an API for this purpose for OMAP4 devices: int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift); int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift); int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift); This API is intended to be used only by the hwmod code - a subsequent patch will add that support to hwmod. This patch is a collaboration between Benoît Cousson <b-cousson@ti.com> and Paul Walmsley <paul@pwsan.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Benoît Cousson <b-cousson@ti.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP4: prcm: Add temporarily helper functions for rmw and read inside the PRMBenoit Cousson2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since OMAP4 is using an absolute address, the current PRM accessors are not useable. OMAP4 adaptation for these API are currently ongoing, so define temp version until the proper ones are defined. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP: hwmod: separate list locking and hwmod hardware lockingKevin Hilman2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently omap_hwmod_mutex is being used to protect both the list access/modification and concurrent access to hwmod functions. This patch separates these two types of locking. First, omap_hwmod_mutex is used only to protect access and modification of omap_hwmod_list. Also cleaned up some comments referring to this mutex that are no longer needed. Then, for protecting concurrent access to hwmod functions, use a per-hwmod mutex. This protects concurrent access to a single hwmod, but would allow concurrent access to different hwmods. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> [paul@pwsan.com: added structure documentation; changed mutex variable name] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * | OMAP4: prcm: Fix global warm reset bit positionRajeev Kulkarni2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4 platform has different register bits for Warm and Cold Resets. Write one into appropriate bits. Signed-off-by: Rajeev Kulkarni <rajeevk@ti.com> Cc: Leed Aguilar <leed.aguilar@ti.com> [b-cousson@ti.com: Change the define with the proper one from omap4 headers] Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP: hwmod: Fix omap_hwmod_reset wrong state testLiam Girdwood2010-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The reset function wrongly used the state flag as a bit mask and was trying to re-enable after a reset. hwmod is still enabled for the PRCM point of view after a softreset so there is no need to re-enable. Remove the state check from omap_hwmod_reset since the _reset function is checking that as well and in addition can generate a warning Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk> [b-cousson@ti.com: remove the wrong test, remove the re-enable] Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com> Cc: Rajendra Nayak <rnayak@ti.com>
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