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| * | | OMAP: McBSP: Add IRQEN, IRQSTATUS, THRESHOLD2 and THRESHOLD1 registers.Eduardo Valentin2009-08-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding McBSP register definition for IRQEN, IRQSTATUS, THRESHOLD2 and THRESHOLD1 registers. Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
| * | | OMAP: McBSP: Provide functions for ASoC frame syncronizationEero Nurkkala2009-08-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ASoC has an annoying bug letting either L or R channel to be played on L channel. In other words, L and R channels can switch at random. This provides McBSP funtionality that may be used to fix this feature. Signed-off-by: Eero Nurkkala <ext-eero.nurkkala@nokia.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
| * | | ARM: OMAP: McBSP: Fix ASoC on OMAP1510 by fixing API of omap_mcbsp_start/stopJarkko Nikula2009-08-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simultaneous audio playback and capture on OMAP1510 can cause that second stream is stalled if there is enough delay between startup of the audio streams. Current implementation of the omap_mcbsp_start is starting both transmitter and receiver at the same time and it is called only for firstly started audio stream from the OMAP McBSP based ASoC DAI driver. Since DMA request lines on OMAP1510 are edge sensitive, the DMA request is missed if there is no DMA transfer set up at that time when the first word after McBSP startup is transmitted. The problem hasn't noted before since later OMAPs are using level sensitive DMA request lines. Fix the problem by changing API of omap_mcbsp_start and omap_mcbsp_stop by allowing to start and stop individually McBSP transmitter and receiver logics. Then call those functions individually for both audio playback and capture streams. This ensures that DMA transfer is setup before transmitter or receiver is started. Thanks to Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> for detailed problem analysis and Peter Ujfalusi <peter.ujfalusi@nokia.com> for info about DMA request line behavior differences between the OMAP generations. Reported-and-tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* | | | Merge branch 'pm-upstream/fixes' of ↵Russell King2009-08-10
|\ \ \ \ | | |_|/ | |/| | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm
| * | | OMAP3: Fixed crash bug with serial + suspendTero Kristo2009-08-05
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It was possible for an unhandled interrupt to occur if there was incoming serial traffic during wakeup from suspend. This was caused by the code in arch-arm/mach-omap2/serial.c keeping interrupt enabled all the time, but not acking its interrupts. Applies on top of PM branch. Use the PM begin/end hooks to ensure that the "serial idle" interrupts are disabled during the suspend path. Also, since begin/end hooks are now used, use the suspend_state that is passed in the begin hook instead of the enter hook as per the platform_suspend_ops docs. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | | Merge branch 'omap_fixes_31' of git://git.pwsan.com/linux-2.6Russell King2009-08-10
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| * | | OMAP2/3 clock: split, rename omap2_wait_clock_ready()Paul Walmsley2009-07-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some OMAP2/3 hardware modules have CM_IDLEST attributes that are not handled by the current omap2_wait_clock_ready() code. In preparation for patches that fix the unusual devices, rename the function omap2_wait_clock_ready() to omap2_wait_module_ready() and split it into three parts: 1. A clkops-specific companion clock return function (by default, omap2_clk_dflt_find_companion()) 2. A clkops-specific CM_IDLEST register address and bit shift return function (by default, omap2_clk_dflt_find_idlest()) 3. Code to wait for the CM to indicate that the module is ready (omap2_cm_wait_idlest()) Clocks can now specify their own custom find_companion() and find_idlest() functions; used in subsequent patches. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * | | OMAP3: Setup MUX settings for SDRC CKE signalsJean Pihet2009-07-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patches ensures the MUX settings are correct for the SDRC CKE signals to SDRAM. This allows the self-refresh to work when 2 chip-selects are in use. A warning is thrown away in case the initial muxing is incorrect, in order to track faulty or old-dated bootloaders. Note: The CONFIG_OMAP_MUX and CONFIG_OMAP_MUX_WARNINGS options must be enabled for the mux code to have effect. Signed-off-by: Jean Pihet <jpihet@mvista.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * | | OMAP3 SDRC: add support for 2 SDRAM chip selectsJean Pihet2009-07-24
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some OMAP3 boards (Beagle Cx, Overo, RX51, Pandora) have 2 SDRAM parts connected to the SDRC. This patch adds the following: - add a new argument of type omap_sdrc_params struct* to omap2_init_common_hw and omap2_sdrc_init for the 2nd CS params - adapted the OMAP boards files to the new prototype of omap2_init_common_hw - add the SDRC 2nd CS registers offsets defines - adapt the sram sleep code to configure the SDRC for the 2nd CS Note: If the 2nd param to omap2_init_common_hw is NULL, then the parameters are not programmed into the SDRC CS1 registers Tested on 3430 SDP and Beagleboard rev C2 and B5, with suspend/resume and frequency changes (cpufreq). Signed-off-by: Jean Pihet <jpihet@mvista.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* / / OMAP: Fix testing of cpu defines for mach-omap1Tony Lindgren2009-08-10
|/ / | | | | | | | | | | | | | | | | There's no need to keep these defines limited in the ifdef block for mach-omap2. It will just cause problems testing for the CPU revision in the common code, like the next patch does for the DMA errata. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP: Fix IOMEM macro for assemblyTony Lindgren2009-06-23
| | | | | | | | | | | | Otherwise IOMEM calculations can fail. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | OMAP3: DMA: Enable idlemodes for DMA OCPKalle Jokiniemi2009-06-23
| | | | | | | | | | | | | | | | | | This patch enables MStandby smart-idle mode, autoidle smartidle mode, and the autoidle bit for DMA4_OCP_SYSCONFIG. Signed-off-by: Kalle Jokiniemi <ext-kalle.jokiniemi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.deeprootsystems.com>
* | OMAP2/3: Add omap_type() for determining GP/EMU/HSKevin Hilman2009-06-23
|/ | | | | | | | | | | | | | | The omap_type() function is added and returns the DEVICETYPE field of the CONTROL_STATUS register. The result can be used for conditional code based on whether device is GP (general purpose), EMU or HS (high security). Also move the type defines so omap1 code compile does not require ifdefs for sections using these defines. This code is needed for the following fix to set the SRAM size correctly for HS omaps. Also at least PM and watchdog code will need this function. Signed-off-by: Kevin Hilman <khilman@ti.deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge branch 'omap-clock-for-next' of git://git.pwsan.com/linux-2.6 into develRussell King2009-06-20
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| * OMAP3: Add support for DPLL3 divisor values higher than 2Tero Kristo2009-06-19
| | | | | | | | | | | | Previously only 1 and 2 was supported. This is needed for DVFS VDD2 control. Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
| * OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock changePaul Walmsley2009-06-19
| | | | | | | | | | | | | | | | | | Program the SDRC_MR_0 register as well during SDRC clock changes. This register allows selection of the memory CAS latency. Some SDRAM chips, such as the Qimonda HYB18M512160AF6, have a lower CAS latency at lower clock rates. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * OMAP3 clock: add a short delay when lowering CORE clk ratePaul Walmsley2009-06-19
| | | | | | | | | | | | | | | | | | | | | | | | | | When changing the SDRAM clock from 166MHz to 83MHz via the CORE DPLL M2 divider, add a short delay before returning to SDRAM to allow the SDRC time to stabilize. Without this delay, the system is prone to random panics upon re-entering SDRAM. This time delay varies based on MPU frequency. At 500MHz MPU frequency at room temperature, 64 loops seems to work okay; so add another 32 loops for environmental and process variation. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | ARM: OMAP4: SMP: Add mpu timer support for OMAP4430Santosh Shilimkar2009-06-09
| | | | | | | | | | | | | | | | This patch adds SMP platform specific parts for local(mpu) timer support for OMAP4430 platform. Each Cortex-a9 core has it's own local timer in the MPU domain. These timers are not in wakeup domain. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | ARM: OMAP4: SMP: Add OMAP4430 SMP board filesSantosh Shilimkar2009-06-09
| | | | | | | | | | | | | | | | This patch adds SMP platform files support for OMAP4430SDP. TI's OMAP4430 SOC is based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | Merge branch 'for-next' of ↵Russell King2009-05-29
|\| | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel Conflicts: arch/arm/Makefile
| * Merge branch 'omap4' into for-nextTony Lindgren2009-05-28
| |\
| | * ARM: OMAP4: Add minimal support for omap4Santosh Shilimkar2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the support for OMAP4. The platform and machine specific headers and sources updated for OMAP4430 SDP platform. OMAP4430 is Texas Instrument's SOC based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | Merge branch 'omap3-upstream' into for-nextTony Lindgren2009-05-28
| |\| | | | | | | | | | | | | Conflicts: arch/arm/mach-omap2/serial.c
| | * ARM: OMAP3: Initialize more devices for LDPTony Lindgren2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on an earlier patches by Stanley.Miao <stanley.miao@windriver.com> and Nishant Kamat <nskamat@ti.com>. Note that at the ads7846 support still needs support for vaux_control for the touchscreen to work. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Remove L4_WK_OMAP_BASE, L4_PER_OMAP_BASE, L4_EMU_BASE, ↵Tony Lindgren2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | L3_OMAP_BASE These are not being used right now, and the processor specific defines should be used instead by any code accessing these registers. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | Merge branch 'omap-upstream' into for-nextTony Lindgren2009-05-28
| |\| | | | | | | | | | | | | Conflicts: arch/arm/mach-omap2/Makefile
| | * ARM: OMAP1: Make 770 LCD workAndrew de Quincey2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make 770 LCD work by adding clk_add_alias(). Also remove the old unused functions. Note that the clk_add_alias() could probably be moved to arch/arm/clkdev.c later on. Cc: linux-fbdev-devel@lists.sourceforge.net Signed-off-by: Andrew de Quincey <adq_dvb@lidskialf.net> Signed-off-by: Imre Deak <imre.deak@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com
| | * ARM: OMAP2/3: Add generic smc91x support when connected to GPMCTony Lindgren2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the board-rx51 smc91x code to be generic and make the boards to use it. This allows future recalculation of the timings when the source clock gets scaled. Also correct the rx51 interrupt to be IORESOURCE_IRQ_HIGHLEVEL. Thanks to Paul Walmsley <paul@pwsan.com> for better GPMC timing calculations. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Add generic onenand support when connected to GPMCJuha Yrjola2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add generic onenand support when connected to GPMC and make the boards to use it. The patch has been modified to make it more generic to support all the boards with GPMC. The patch also remove unused prototype for omap2_onenand_rephase(void). Note that board-apollon.c is currently using the MTD_ONENAND_GENERIC and setting the GPMC timings in the bootloader. Setting the GPMC timings in the bootloader will not allow supporting frequency scaling for the onenand source clock. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: sDMA: Correct omap_request_dma_chain(), v2Santosh Shilimkar2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Original OMAP DMA chaining design had chain_id as one of the callback parameters. Patch 538528de0cb256f65716ab2e9613d9e920f97fe2 changed it to use logical channel instead. Correct the naming for callback to also use logical channel number instead of the chain_id. More details are on this email thread: http://marc.info/?l=linux-omap&m=122961071931459&w=2 Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: DMA: implement trans copy and const fillTomi Valkeinen2009-05-28
| | | | | | | | | | | | | | | | | | | | | Implement transparent copy and constant fill features for OMAP2/3. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP: Increase VMALLOC_END to allow 256MB RAMMans Rullgard2009-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This increases VMALLOC_END to 0x18000000, making room for 256MB RAM with the default 128MB vmalloc region. Note that after this patch there's no longer a hole between vmalloc space and the beginning of IO space on omap2 as the first virtual mapping starts at 0xd8000000. Also fold in a related change from Paul Walmsley <paul@pwsan.com> to change the OMAP2_SRAM addresses accordingly. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Remove OMAP_CM_REGADDRTony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | Processor specific macros should be used instead. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Remove OMAP2_PRCM_BASETony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | | | | It's currently unused, and processor specific defines should be used instead. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Move define of OMAP2_VA_IC_BASE to be local to entry-macro.STony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | Move define of OMAP2_VA_IC_BASE to be local to entry-macro.S Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Remove OMAP_PRM_REGADDR and OMAP2_PRM_BASETony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove OMAP_PRM_REGADDR and use processor specific defines instead. Also fold in a patch from Kevin Hilman to add _OFFSET #defines for the PRCM registers to be used with the prm_[read|write]_* macros. These are used extensively in the forthcoming OMAP PM support. Also remove now unused OMAP2_PRM_BASE. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Remove OMAP2_32KSYNCT_BASETony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use processor specific defines instead. As an extra bonus, this patch fixes the problem of CONFIG_DEBUG_SPINLOCK calling sched_clock before we have things initialized: http://patchwork.kernel.org/patch/15810/ Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | OMAP3: PM: Ensure MUSB block can idle when driver not loadedPeter 'p2' De Schrijver2009-05-28
| | | | | | | | | | | | | | | | | | | | | Otherwise, bootloaders may leave MUSB in a state which prevents retention. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: Add D2D clocks and auto-idle setup to PRCM initKevin Hilman2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add D2D clocks (modem_fck, sad2d_ick, mad2d_ick) to clock framework and ensure that auto-idle bits are set for these clocks during PRCM init. Also add omap3_d2d_idle() function called durint PRCM setup which ensures D2D pins are MUX'd correctly to enable retention for standalone (no-modem) devices. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: UART: disable clocks when idle and off-mode supportKevin Hilman2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows the UART clocks to be disabled when the OMAP UARTs are inactive, thus permitting the chip to hit retention in idle. After the expiration of an activity timer, each UART is allowed to disable its clocks so the system can enter retention. The activity timer is (re)activated on any UART interrupt, UART wake event or any IO pad wakeup. The actual disable of the UART clocks is done in the 'prepare_idle' hook called from the OMAP idle loop. While the activity timer is active, the smart-idle mode of the UART is also disabled. This is due to a "feature" of the UART module that after a UART wakeup, the smart-idle mode may be entered before the UART has communicated the interrupt, or upon TX, an idle mode may be entered before the TX FIFOs are emptied. Upon suspend, the 'prepare_suspend' hook cancels any pending activity timers and allows the clocks to be disabled immediately. In addition, upon disabling clocks the UART state is saved in case of an off-mode transition while clocks are off. Special thanks to Tero Kristo for the initial ideas and first versions of UART idle support, and to Jouni Hogander for extra testing and bugfixes. Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810) Cc: Tero Kristo <tero.kristo@nokia.com> Cc: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: Add wake-up bit defintiions for CONTROL_PADCONF_XKevin Hilman2009-05-28
| | | | | | | | | | | | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: Force IVA2 into idle during bootupKevin Hilman2009-05-28
| | | | | | | | | | | | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP: Add new function to check wether there is irq pendingJouni Hogander2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add common omap2/3 function to check wether there is irq pending. Switch to use it in omap2 pm code instead of its own. Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP2/3: PM: push core PM code from linux-omapKevin Hilman2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to sync the core linux-omap PM code with mainline. This code has evolved and been used for a while the linux-omap tree, but the attempt here is to finally get this into mainline. Following this will be a series of patches from the 'PM branch' of the linux-omap tree to add full PM hardware support from the linux-omap tree. Much of this PM core code was written by Jouni Hogander with significant contributions from Paul Walmsley as well as many others from Nokia, Texas Instruments and linux-omap community. Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | Merge branch 'omap-clock-upstream' of git://git.pwsan.com/linux-2.6 into ↵Tony Lindgren2009-05-26
| |\ \ | | | | | | | | | | | | for-next
| | * | OMAP2xxx clock: rename clk_init_one() to clk_preinit()Paul Walmsley2009-05-12
| | | | | | | | | | | | | | | | | | | | | | | | Rename clk_init_one() to clk_preinit() to distinguish its function from clk_init() and the individual struct clk init functions. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 clock: only unlock SDRC DLL if SDRC clk < 83MHzPaul Walmsley2009-05-12
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the 34xx TRM Rev. K section 11.2.4.4.11.1 "Purpose of the DLL/CDL Module," the SDRC delay-locked-loop can be locked at any SDRC clock frequency from 83MHz to 166MHz. CDP code unconditionally unlocked the DLL whenever shifting to a lower SDRC speed, but this seems unnecessary and error-prone, as the DLL is no longer able to compensate for process, voltage, and temperature variations. Instead, only unlock the DLL when the SDRC clock rate would be less than 83MHz. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * | ARM: OMAP2/3: Remove OMAP_CM_REGADDRTony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | Processor specific macros should be used instead. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2/3: Remove OMAP2_PRCM_BASETony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | | | | It's currently unused, and processor specific defines should be used instead. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2/3: Move define of OMAP2_VA_IC_BASE to be local to entry-macro.STony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | Move define of OMAP2_VA_IC_BASE to be local to entry-macro.S Signed-off-by: Tony Lindgren <tony@atomide.com>
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