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* mmc: Add a MX2/MX3 specific SDHC driverSascha Hauer2009-02-02
| | | | | | | | | | | This patch adds a MX2/MX3 specific SDHC driver. The hardware is basically the same as in the MX1, but unlike the MX1 controller the MX2 controller just works as expected. Since the MX1 driver has more workarounds for bugs than anything else I had no success with supporting MX1 and MX2 in a sane way in one driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* i.MX31: framebuffer driverGuennadi Liakhovetski2009-01-21
| | | | | | | | | This is a framebuffer driver for i.MX31 SoCs. It only supports synchronous displays, vertical panning supported, no overlay support. Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* i.MX31: Image Processing Unit DMA and IRQ driversGuennadi Liakhovetski2009-01-19
| | | | | | | | | | | | | | | | | | | | | | i.MX3x SoCs contain an Image Processing Unit, consisting of a Control Module (CM), Display Interface (DI), Synchronous Display Controller (SDC), Asynchronous Display Controller (ADC), Image Converter (IC), Post-Filter (PF), Camera Sensor Interface (CSI), and an Image DMA Controller (IDMAC). CM contains, among other blocks, an Interrupt Generator (IG) and a Clock and Reset Control Unit (CRCU). This driver serves IDMAC and IG. They are supported over dmaengine and irq-chip APIs respectively. IDMAC is a specialised DMA controller, its DMA channels cannot be used for general-purpose operations, even though it might be possible to configure a memory-to-memory channel for memcpy operation. This driver will not work with generic dmaengine clients, clients, wishing to use it must use respective wrapper structures, they also must specify which channels they require, as channels are hard-wired to specific IPU functions. Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* USB: add imx udc gadget driverDarius Augulis2009-01-07
| | | | | | | | | | | Implementation of USB device driver integrated in Freescale's i.MXL processor. Adds USB device driver for i.MXL. Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [ARM] MXC: do not include mach/hardware.h from mach/memory.hSascha Hauer2008-12-18
| | | | | | Instead of including other header files, define PHYS_OFFSET directly Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] MXC: do not include mach/hardware.h from mach/timex.hSascha Hauer2008-12-18
| | | | | | Instead of including other header files, define CLOCK_TICK_RATE directly Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] MXC: remove dependency to other include files from irqs.hSascha Hauer2008-12-18
| | | | | | | This patch removes the inclusion of mach/hardware.h from mach/irqs.h and switches to more meaningful names for the irq related macros. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* patch-mxc-fiqPaulius Zaleckas2008-12-16
| | | | | | | | Drivers which are going to use it will have to select it and use mxc_set_irq_fiq() to set FIQ mode for this interrupt. Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* patch-mx1-mtd-xipDarius Augulis2008-12-16
| | | | | | | Adds MTD XIP support for ARCH_MX1. Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* patch-mxc-add-ARCH_MX1Paulius Zaleckas2008-12-16
| | | | | | | | | Adds MX1 architecture to platform MXC. It will supersede mach-imx and let it die. Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt> Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* patch-iomux-mx1-mx2-cleanupDarius Augulis2008-12-16
| | | | | | | Fix GIUS register setup in the mxc_gpio_mode(). Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MX31: UART5 pins definitionValentin Longchamp2008-12-16
| | | | | | | pins definition for UART5 when used in alternate mode 2 Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MX31: definitions for UART2 pinsValentin Longchamp2008-12-16
| | | | | | | UART2 pins when used in functionnal mode Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Add basic support for MX31PDK board.Fabio Estevam2008-12-16
| | | | | | | | Add basic support to the MX31PDK development board, also known as MX31 3DS or MX31 3-stack board (http://www.freescale.com/imx31pdk). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: sascha Hauer <s.hauer@pengutronix.de>
* [ARM] MX3 iomux: add more pin definitionsSascha Hauer2008-12-16
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] MX1/MX2: simplify mxc_gpio_setup_multiple_pinsSascha Hauer2008-12-16
| | | | | | | | | mxc_gpio_setup_multiple_pins used to take several ALLOC_MODE flags. Most of them are unused, so simplify the function by removing the flags. Also, instead of using a confusing MXC_GPIO_ALLOC_MODE_RELEASE flag in a function having alloc in its name, add a mxc_gpio_release_multiple_pins function. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] MX27: add i.MX27 SDHC1 and SDHC2 GPIO declarationsJulien Boibessot2008-12-16
| | | | | Signed-off-by: Julien Boibessot <julien.boibessot@armadeus.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MX27: Add USB pin function definesSascha Hauer2008-12-16
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] MX27ads: remove unused defineSascha Hauer2008-12-16
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] MX2: Add IRQ_GPIOE definitionSascha Hauer2008-12-16
| | | | | | The MX2 has 5 gpio ports, IRQ_GPIOE was missing so far. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MX27: Fix EMMA Base addressesSascha Hauer2008-12-16
| | | | | | | The EMMA (Enhanced Multimedia Engine) is divided into two parts, the postprocessor and the preprocessor. Fix the base addresses. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] MX2: DMA updatesSascha Hauer2008-12-16
| | | | | | | This one updates DMA support on MX2 which got broken in: [ARM] Hide ISA DMA API when ISA_DMA_API is unset Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] Add a common typesafe __io implementationRussell King2008-11-30
| | | | | | | | As Al did for Versatile in 2ad4f86b60b649fd7428265c08d73a3bd360c81b, add a typesafe __io implementation for platforms to use. Convert platforms to use this new simple typesafe implementation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Hide ISA DMA API when ISA_DMA_API is unsetRussell King2008-11-29
| | | | | | | | | | | | | When ISA_DMA_API is unset, we're not implementing the ISA DMA API, so there's no point in publishing the prototypes via asm/dma.h, nor including the machine dependent parts of that API. This allows us to remove a lot of mach/dma.h files which don't contain any useful code. Unfortunately though, some platforms put their own private non-ISA definitions into mach/dma.h, so we leave these behind and fix the appropriate #include statments. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] remove a common set of __virt_to_bus definitionsNicolas Pitre2008-11-28
| | | | | | | | | | | | | | | | Let's provide an overridable default instead of having every machine class define __virt_to_bus and __bus_to_virt to the same thing. What most platforms are using is bus_addr == phys_addr so such is the default. One exception is ebsa110 which has no DMA what so ever, so the actual definition is not important except only for proper compilation. Also added a comment about the special footbridge bus translation. Let's also remove comments alluding to set_dma_addr which is not (and should not) be commonly used. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] MX3: Use ioremap wrapper to map SoC devices nonsharedSascha Hauer2008-10-30
| | | | | | | | The internal devices of the MX3 Processor have to be mapped MT_DEVICE_NONSHARED devices, otherwise cache corruptions occur. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge git://git.infradead.org/mtd-2.6Linus Torvalds2008-10-20
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.infradead.org/mtd-2.6: (69 commits) Revert "[MTD] m25p80.c code cleanup" [MTD] [NAND] GPIO driver depends on ARM... for now. [MTD] [NAND] sh_flctl: fix compile error [MTD] [NOR] AT49BV6416 has swapped erase regions [MTD] [NAND] GPIO NAND flash driver [MTD] cmdlineparts documentation change - explain where mtd-id comes from [MTD] cfi_cmdset_0002.c: Add Macronix CFI V1.0 TopBottom detection [MTD] [NAND] Fix compilation warnings in drivers/mtd/nand/cs553x_nand.c [JFFS2] Write buffer offset adjustment for NOR-ECC (Sibley) flash [MTD] mtdoops: Fix a bug where block may not be erased [MTD] mtdoops: Add a magic number to logged kernel oops [MTD] mtdoops: Fix an off by one error [JFFS2] Correct parameter names of jffs2_compress() in comments [MTD] [NAND] sh_flctl: add support for Renesas SuperH FLCTL [MTD] [NAND] Bug on atmel_nand HW ECC : OOB info not correctly written [MTD] [MAPS] Remove unused variable after ROM API cleanup. [MTD] m25p80.c extended jedec support (v2) [MTD] remove unused mtd parameter in of_mtd_parse_partitions() [MTD] [NAND] remove dead Kconfig associated with !CONFIG_PPC_MERGE [MTD] [NAND] driver extension to support NAND on TQM85xx modules ...
| * [MTD] [NAND] Freescale i.MX2 NAND driverSascha Hauer2008-09-02
| | | | | | | | | | | | | | | | | | | | This patch adds support for the integrated NAND flash controller of the i.MX2 and i.MX3 family. It is tested on MX27 but should work on MX3 aswell. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Juergen Beisert <j.beisert@pengutronix.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* | MX2: Add DMA support for mx2 and (eventually) mx1Sascha Hauer2008-09-09
| | | | | | | | | | | | | | | | This patch adds DMA support for Freescale i.MX27 SoCs. It is derived from the i.MX1 port and should (though currently untested) still be working for the i.MX1. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | i.MX3: Fix compiler warningsLuotao Fu2008-09-09
| | | | | | | | | | | | | | Fix some base address declaration by adding a cast. Signed-off-by: Luotao Fu <l.fu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | MXC: add RTCK alternate function definitionsLuotao Fu2008-09-09
| | | | | | | | | | | | | | | | | | This one adds definitions to configure RTCK pad (PE16) in primary and alternate function. The RTCK Pin is used by one wire master controller and as JTAG Clock return. Signed-off-by: Luotao Fu <l.fu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | mxc: add cscr register defintionsLuotao Fu2008-09-09
| | | | | | | | | | | | | | | | | | | | This adds macros to get CSCR upper, lower and additional registers. These registers are needed to configure a chip select line. The offset layouts of these Registers are identical on mx27 and mx31, hence we can use the macros in generic way Signed-off-by: Luotao Fu <l.fu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | MX31: add macros to configure spi pinsLuotao Fu2008-09-09
| | | | | | | | | | | | | | | | this adds convenience values usable by mxc_iomux_mode() to configure Pins of the spi interfaces on mx31. Signed-off-by: Luotao Fu <l.fu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | MXC: Lets handle IRQ by priority, defined with exported API functionDarius Augulis2008-09-09
| | | | | | | | | | Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | i.MX31ADS: Add CPLD interrupts demultiplexing (take 3).Gilles Chanteperdrix2008-09-09
| | | | | | | | | | | | | | | | Needed for 8250 serial port and CS89x0 ethernet interface. Signed-off-by: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | i.MX27: add definitions for USB pinsSascha Hauer2008-09-09
| | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | MXC: add convenience function to register platform devicesSascha Hauer2008-09-09
|/ | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/machRussell King2008-08-07
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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