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* arm: Export empty_zero_page for ZERO_PAGE usage in modules.Aneesh Kumar K.V2008-04-29
| | | | | | | | | | ext4 uses ZERO_PAGE(0) to zero out blocks. We need to export different symbols in different arches for the usage of ZERO_PAGE in modules. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
* Introduce flags for reserve_bootmem()Bernhard Walle2008-02-07
| | | | | | | | | | | | | | | | | | | | | | | | This patchset adds a flags variable to reserve_bootmem() and uses the BOOTMEM_EXCLUSIVE flag in crashkernel reservation code to detect collisions between crashkernel area and already used memory. This patch: Change the reserve_bootmem() function to accept a new flag BOOTMEM_EXCLUSIVE. If that flag is set, the function returns with -EBUSY if the memory already has been reserved in the past. This is to avoid conflicts. Because that code runs before SMP initialisation, there's no race condition inside reserve_bootmem_core(). [akpm@linux-foundation.org: coding-style fixes] [akpm@linux-foundation.org: fix powerpc build] Signed-off-by: Bernhard Walle <bwalle@suse.de> Cc: <linux-arch@vger.kernel.org> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [ARM] 4497/1: Only allow safe cache configurations on ARMv6 and laterCatalin Marinas2007-07-20
| | | | | | | | | | | | Currently, Linux doesn't generate correct page tables for ARMv6 and later cores if the cache policy is different from the default one (it may lead to strongly ordered or shared device mappings). This patch disallows cache policies other than writeback and the CPU_[ID]CACHE_DISABLE options only affect the CP15 system control register rather than the page tables. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix non-page aligned boot time mappingsRussell King2007-07-04
| | | | | | | | | | | | | AT91SAM9260 stopped booting with the recent changes to MM initialisation - it was asking for a non-aligned virtual address which caused loops to be non-terminal. Fix this by rounding virtual addresses down, but remember to include the offset in the length, and round the length up to the following page. This means that asking for a mapping of 4K starting at 2K into a page maps two pages as one would expect. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] spelling fixesSimon Arlott2007-05-20
| | | | | | | Spelling fixes in arch/arm/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] mm 9: add additional device memory typesRussell King2007-05-05
| | | | | | | Add cached device type for ioremap_cached(). Group all device memory types together, and ensure that they all have a "MT_DEVICE" prefix. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] mm 8: define mem_types table L1 bit 4 to be for ARMv6Russell King2007-05-05
| | | | | | | Change the memory types table to define the L1 descriptor bit 4 to be in terms of the ARMv6 definition - execute never. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] mm 6: allow mem_types table to specify extended pte attributesRussell King2007-04-21
| | | | | | | | Add prot_pte_ext to the mem_types table to allow the extended pte attributes to be passed to set_pte_ext(), thereby permitting us to specify memory type information for the hardware PTE entries. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] mm 5: Use mem_types table in ioremapRussell King2007-04-21
| | | | | | | We really want to be using the memory type table in ioremap, so we only have to do the CPU type fixups in one place. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] mm 4: make create_mapping() more conventionalRussell King2007-04-21
| | | | | | | | | Rather than our three separate loops to setup mappings (by page mappings up to a section boundary, then section mappings, and the remainder by page mappings) convert this to a more conventional Linux style of a loop over each page table level. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] mm 3: separate out supersection mappings, avoid for <4GBRussell King2007-04-21
| | | | | | | | | | | | | | | | | | | | Catalin Marinas at ARM Ltd says: > The CPU architects in ARM intended supersections only as a way to map > addresses >= 4GB. Supersections are not mandated by the architecture > and there is no easy way to detect their hardware support at run-time > (other than checking for a specific core). From the analysis done in > ARM, there wasn't a clear performance gain by using supersections > rather than sections (no significant improvement in the TLB misses). Therefore, we should avoid using supersections unless there's a real need (iow, we're mapping addresses >= 4GB). This means that we can simplify create_mapping() a bit since we will only use supersection mappings for addresses >= 4GB, which means that the physical, virtual and length must be multiples of the supersection mapping size. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] mm 2: clean up create_mapping()Russell King2007-04-21
| | | | | | | | There's now no need to carry around each protection separately. Instead, pass around the pointer to the entry in the mem_types array which we're interested in. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] mm 1: Combine mem_type domain into prot_* at init timeRussell King2007-04-21
| | | | | | | | | | | Rather than combining the domain for a particular memory type with the protection information each time we want to use it, do so when we fix up the mem_type array at initialisation time. Rename struct mem_types to be mem_type - each structure is one memory type description, not several. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4158/1: Fix user page protection macrosImre_Deak2007-02-11
| | | | | | | | | | The PAGE_* user page protection macros don't take into account the configured memory policy and other architecture specific bits like the global/ASID and shared mapping bits. Instead of constants let these depend on a variable fixed up at init just like PAGE_KERNEL. Signed-off-by: Imre Deak <imre.deak@solidboot.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix warnings from asm/system.hRussell King2006-12-17
| | | | | | | Move adjust_cr() into arch/arm/mm/mmu.c, and move irqflags.h to a more appropriate place in the header file. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Unuse another Linux PTE bitRussell King2006-12-13
| | | | | | | | | | L_PTE_ASID is not really required to be stored in every PTE, since we can identify it via the address passed to set_pte_at(). So, create set_pte_ext() which takes the address of the PTE to set, the Linux PTE value, and the additional CPU PTE bits which aren't encoded in the Linux PTE value. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3999/1: RX3715: suspend to RAM supportBen Dooks2006-12-07
| | | | | | | | | | The RX3715 is similar to the H1940 in the way that suspend to RAM works, so we can use most of the extant support for the H1940 with only a few modifictions Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3986/1: H1940: suspend to RAM supportBen Dooks2006-12-07
| | | | | | | | | Add support to suspend and resume, using the H1940's bootloader Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3971/1: xsc3: get rid of L_PTE_COHERENTLennert Buytenhek2006-12-01
| | | | | | | | Merge L_PTE_COHERENT with L_PTE_SHARED and free up a L_PTE_* bit. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix XIP_KERNEL build error in arch/arm/mm/mmu.cRussell King2006-09-30
| | | | | | | XIP kernels need to know the start/end of text, but we were missing the declaration of _etext in mmu.c. Add it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Move rest of MMU setup code from mm-armv.c to mmu.cRussell King2006-09-27
| | | | | | | | | If we're going to have mmu.c for code which is specific to the MMU machines, we might as well move the other MMU initialisation specific code from mm-armv.c into this new file. This also allows us to make some functions static. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Split ARM MM initialisation for !mmuRussell King2006-09-27
| | | | | | | Move the MMU specific code from init.c into mmu.c, and add nommu fixups to nommu.c Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Move mmu.c out of the wayRussell King2006-09-20
| | | | | | | Rename mmu.c to context.c - it's the ARMv6 ASID context handling code rather than generic "mmu" handling code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-16
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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