litmus-rt.git - The LITMUS^RT kernel.

	Commit message (Collapse)	Author	Age
*	ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range	Russell King	2010-02-15
\| \| \| \| \| \| \|	These are now unused, and so can be removed. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com>
*	ARM: dma-mapping: provide per-cpu type map/unmap functions	Russell King	2010-02-15
\| \| \| \| \|	Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com>
*	ARM: add size argument to __cpuc_flush_dcache_page	Russell King	2009-12-14
\| \| \| \| \| \| \|	... and rename the function since it no longer operates on just pages. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	[ARM] Remove unnecessary mach/hardware.h includes in arch/arm/mm	Russell King	2008-11-28
\| \| \| \|	Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	[ARM] 5310/1: Fix cache flush functions for ARMv4	Anders Grafström	2008-10-17
\| \| \| \| \| \| \| \| \| \|	ARMv4 (ARM720T) cache flush functions are broken in 2.6.19+ kernels. The issue was introduced by commit f12d0d7c7786af39435ef6ae9defe47fb58f6091 This patch corrects the CPU_CP15 ifdef statements so that they actually do something. Signed-off-by: Anders Grafström <grfstrm@users.sourceforge.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach	Russell King	2008-08-07
\| \| \| \| \| \|	This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	[ARM] Remove asm/hardware.h, use asm/arch/hardware.h instead	Russell King	2008-08-07
\| \| \| \| \| \| \| \| \|	Remove includes of asm/hardware.h in addition to asm/arch/hardware.h. Then, since asm/hardware.h only exists to include asm/arch/hardware.h, update everything to directly include asm/arch/hardware.h and remove asm/hardware.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	[ARM] nommu: manage the CP15 things	Hyok S. Choi	2006-09-27
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	All the current CP15 access codes in ARM arch can be categorized and conditioned by the defines as follows: Related operation Safe condition a. any CP15 access !CPU_CP15 b. alignment trap CPU_CP15_MMU c. D-cache(C-bit) CPU_CP15 d. I-cache CPU_CP15 && !( CPU_ARM610 \|\| CPU_ARM710 \|\| CPU_ARM720 \|\| CPU_ARM740 \|\| CPU_XSCALE \|\| CPU_XSC3 ) e. alternate vector CPU_CP15 && !CPU_ARM740 f. TTB CPU_CP15_MMU g. Domain CPU_CP15_MMU h. FSR/FAR CPU_CP15_MMU For example, alternate vector is supported if and only if "CPU_CP15 && !CPU_ARM740" is satisfied. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*	Linux-2.6.12-rc2v2.6.12-rc2	Linus Torvalds	2005-04-16
	Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!