aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-zynq/common.h
Commit message (Collapse)AuthorAge
* ARM: zynq: Remove secondary_startup() declaration from headerMichal Simek2014-12-01
| | | | | | secondary_startup() in the header is not needed at all. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Remove hotplug.cSoren Brinkmann2014-09-16
| | | | | | | | | | The hotplug code contains only a single function, which is an SMP function. Move that to platsmp.c where all other SMP runctions reside. That allows removing hotplug.c and declaring the cpu_die function static. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Synchronise zynq_cpu_die/killSoren Brinkmann2014-09-16
| | | | | | | | | | | | | Avoid races and add synchronisation between the arch specific kill and die routines. The same synchronisation issue was fixed on IMX platform by this commit: "ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_kill" (sha1: 2f3edfd7e27ad4206acbc2ae99c9df5f46353024) Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: PM: Enable DDR clock stopSoren Brinkmann2014-09-16
| | | | | | | | | | The DDR controller can detect idle periods and leverage low power features clock stop. When new requests occur, the DDRC resumes normal operation. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: PM: Enable A9 internal clock gating featureSoren Brinkmann2014-09-16
| | | | | Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Add support for SOC_BUSMichal Simek2014-05-20
| | | | | | | Provide information through SOC_BUS to user space. Silicon revision is provided through devcfg device. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Make zynq_slcr_base staticSteffen Trumtrar2014-02-10
| | | | | | | | The pointer doesn't need to be passed around any more. Make it static. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Split slcr in two partsMichal Simek2014-02-10
| | | | | | | | | Split the slcr into an early part for unlocking and cpu starting and a later syscon driver. Also add "syscon" compatible property for slcr. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Invalidate L1 in secondary bootSoren Brinkmann2013-12-10
| | | | | | | | | | During boot, Linux initiates a clean-invalidate operation only, resulting in faulty data to be written to the memory system during resume. Therefore invalidate the L1 in the secondary boot path to avoid these issues. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: delete __cpuinit/__CPUINIT usage from all ARM usersPaul Gortmaker2013-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) and are flagged as __cpuinit -- so if we remove the __cpuinit from the arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit related content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. This removes all the ARM uses of the __cpuinit macros from C code, and all __CPUINIT from assembly code. It also had two ".previous" section statements that were paired off against __CPUINIT (aka .section ".cpuinit.text") that also get removed here. [1] https://lkml.org/lkml/2013/5/20/589 Cc: Russell King <linux@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* arm: zynq: Add hotplug supportMichal Simek2013-04-04
| | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add smp supportMichal Simek2013-04-04
| | | | | | | | | Zynq is dual core Cortex A9 which starts always at zero. Using simple trampoline ensure long jump to secondary_startup code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
* arm: zynq: Add support for system resetMichal Simek2013-04-04
| | | | | | Do system reset via slcr registers. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Move slcr initialization to separate fileMichal Simek2013-04-04
| | | | | | Create separate slcr driver instead of polluting common code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Load scu baseaddress at run timeMichal Simek2013-04-04
| | | | | | Use Cortex a9 cp15 to read scu baseaddress. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Move timer to clocksource interfaceMichal Simek2013-04-04
| | | | | | Use clocksource timer initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: timer: Replace PSS through PSSoren Brinkmann2013-01-28
| | | | | | | | | | | The acronym PSS is deprecated by Xilinx. The correct term, which is also used in Xilinx documentation is PS (processing system). This is just a search and replace: - s/PSS/PS/g - s/pss/ps/g Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Josh Cartwright <josh.cartwright@ni.com>
* ARM: zynq: move arm-specific sys_timer out of ttcJosh Cartwright2012-11-05
| | | | | | | | | Move the sys_timer definition out of ttc driver and make it part of the common zynq code. This is preparation for renaming and COMMON_CLK support. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
* ARM: Xilinx: merge board file into main platform codeArnd Bergmann2011-07-07
| | | | | | | | | | The zynq platform will never have board files other than the device tree one, so there is no point splitting it from common.c. This makes the code more compact. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: John Linn <john.linn@xilinx.com>
* ARM: Xilinx: Adding Xilinx board supportJohn Linn2011-06-20
The 1st board support is minimal to get a system up and running on the Xilinx platform. This platform reuses the clock implementation from plat-versatile, and it depends entirely on CONFIG_OF support. There is only one board support file which obtains all device information from a device tree dtb file which is passed to the kernel at boot time. Signed-off-by: John Linn <john.linn@xilinx.com>