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* zynq: use pl310 device tree bindingsJosh Cartwright2012-10-29
| | | | | | | | | | The Zynq has a PL310 L2 cache controller. Convert in-tree uses to using the device tree. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Cc: John Linn <john.linn@xilinx.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Michal Simek <michal.simek@xilinx.com>
* zynq: use GIC device tree bindingsJosh Cartwright2012-10-29
| | | | | | | | | | The Zynq uses the cortex-a9-gic. This eliminates the need to hardcode register addresses. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Cc: John Linn <john.linn@xilinx.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: convert to CONFIG_MULTI_IRQ_HANDLERMarc Zyngier2011-11-15
| | | | | | | | Convert the zynq platform to be using the gic_handle_irq function as its primary interrupt handler. Acked-by: John Linn <john.linn@xilinx.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
* ARM: Xilinx: merge board file into main platform codeArnd Bergmann2011-07-07
| | | | | | | | | | The zynq platform will never have board files other than the device tree one, so there is no point splitting it from common.c. This makes the code more compact. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: John Linn <john.linn@xilinx.com>
* ARM: Xilinx: Adding Xilinx board supportJohn Linn2011-06-20
The 1st board support is minimal to get a system up and running on the Xilinx platform. This platform reuses the clock implementation from plat-versatile, and it depends entirely on CONFIG_OF support. There is only one board support file which obtains all device information from a device tree dtb file which is passed to the kernel at boot time. Signed-off-by: John Linn <john.linn@xilinx.com>