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* Merge branch 'devel-stable' into for-nextRussell King2011-07-22
|\ | | | | | | | | Conflicts: arch/arm/kernel/entry-armv.S
| * ARM: mach-realview: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre2011-07-18
| | | | | | | | Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* | ARM: 6993/1: platsmp: Allow secondary cpu hotplug with maxcpus=1Stephen Boyd2011-07-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If an ARM system has multiple cpus in the same socket and the kernel is booted with maxcpus=1, secondary cpus are possible but not present due to how platform_smp_prepare_cpus() is called. Since most typical ARM processors don't actually support physical hotplug, initialize the present map to be equal to the possible map in generic ARM SMP code. Also, always call platform_smp_prepare_cpus() as long as max_cpus is non-zero (0 means no SMP) to allow platform code to do any SMP setup. After applying this patch it's possible to boot an ARM system with maxcpus=1 on the command line and then hotplug in secondary cpus via sysfs. This is more in line with how x86 does things. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 6986/1: mach-realview: add TCM support for PB1176Linus Walleij2011-07-06
|/ | | | | | | | | Enable TCM support on the RealView PB1176 - we have now taken the precautions necessary to support even multi-board builds of RealView systems with TCM enabled. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*-----. Merge branches 'consolidate-clksrc', 'consolidate-flash', ↵Russell King2011-05-23
|\ \ \ \ | | | | | | | | | | | | | | | 'consolidate-generic', 'consolidate-smp', 'consolidate-stmp' and 'consolidate-zones' into consolidate
| | | | * ARM: use ARM_DMA_ZONE_SIZE to adjust the zone sizesRussell King2011-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than each platform providing its own function to adjust the zone sizes, use the new ARM_DMA_ZONE_SIZE definition to perform this adjustment. This ensures that the actual DMA zone size and the ISA_DMA_THRESHOLD/MAX_DMA_ADDRESS definitions are consistent with each other, and moves this complexity out of the platform code. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * ARM: Replace platform definition of ISA_DMA_THRESHOLD/MAX_DMA_ADDRESSRussell King2011-05-12
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The values of ISA_DMA_THRESHOLD and MAX_DMA_ADDRESS are related; one is the physical/bus address, the other is the virtual address. Both need to be kept in step, so rather than having platforms define both, allow them to define a single macro which sets both of these macros appropraitely. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * ARM: consolidate SMP cross call implementationRussell King2011-05-23
| | |/ | | | | | | | | | | | | | | | | | | | | | Rather than having each platform class provide a mach/smp.h header for smp_cross_call(), arrange for them to register the function with the core ARM SMP code instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 6910/1: MTD: physmap: let set_vpp() pass a platform_device instead of a ↵Marc Zyngier2011-05-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | map_info The set_vpp() method provided by physmap passes a map_info back to the platform code, which has little relevance as far as the platform is concerned (this parameter is completely unused). Instead, pass the platform_device, which can be used in the pismo driver to retrieve some important information in a nicer way, instead of the hack that was in place. The empty set_vpp function in board-at572d940hf_ek.c is left untouched, as the board/SoC is scheduled for removal. Cc: Andrew Victor <linux@maxim.org.za> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Philipp Zabel <philipp.zabel@gmail.com> Cc: Eric Miao <eric.y.miao@gmail.com> Cc: Ben Dooks <ben-linux@fluff.org> Acked-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Acked-by: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 6903/1: Realview: Use physmap driver instead of integrator-flashMarc Zyngier2011-05-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | Tested on a PB11-MPCore. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | clockevents: ARM sp804: allow clockevent name to be specifiedRussell King2011-05-23
| | | | | | | | | | | | | | | | | | | | | This allows platforms to specify the clcokevent name upon registration. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | clocksource: ARM sp804: obtain sp804 timer rate via clksRussell King2011-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | This allows platforms to specify the rate of the SP804 clocksource via the clk subsystem. While ARM boards clock these at 1MHz, BCMRing also has SP804 timers but are clocked at different rates. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | clocksource: ARM sp804: allow clocksource name to be specifiedRussell King2011-05-23
|/ / | | | | | | | | | | | | | | | | This allows platforms to specify the clocksource name upon registration, which is necessary should they wish to register more than one sp804 clocksource. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* / ARM: 6870/1: The mandatory barrier rmb() must be a dsb() in for device accessesCatalin Marinas2011-05-12
|/ | | | | | | | | | Since mandatory barriers may be used (explicitly or implicitly via readl etc.) to ensure the ordering between Device and Normal memory accesses, a DMB is not enough. This patch converts it to a DSB. Cc: Colin Cross <ccross@android.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6807/1: realview: Fix secondary GIC initialisation for EB with MPCore tilePawel Moll2011-03-26
| | | | | | | | | The second GIC, present when EB board is used with a MPCore tile, was initialised starting with irq number 64, which made interrupts 64-95 in the primary GIC unusable. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*---. Merge branches 'fixes', 'pgt-next' and 'versatile' into develRussell King2011-03-20
|\ \ \
| | | * ARM: realview/vexpress: consolidate SMP bringup codeRussell King2011-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Realview and Versatile Express share the same SMP bringup code, so consolidate the two implementations. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * ARM: realview/vexpress: consolidate localtimer supportRussell King2011-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Realview and Versatile Express local timer support is identical, so consolidate the implementations. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * ARM: realview: remove old AMBA device DMA definitionsRussell King2011-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AMBA DMA macro definitions are not used, and the AMBA Primecell DMA support makes no use of them either, so they can be removed. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * ARM: realview: use new init_early for clock tree and sched_clock initRussell King2011-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize the clock tree and our sched_clock() early. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * ARM: realview: switch Realview to use consolidated CLCDRussell King2011-02-19
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | This switches Realview platforms to use the consolidated CLCD panel support, including the display capabilities. As Realview uses a PL111, it can support the full range of pixel formats - 444, 5551, 565 in both RGB and BGR mode. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'p2v' into develRussell King2011-03-16
|\ \ \ | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/kernel/module.c arch/arm/mach-s5pv210/sleep.S
| * | | ARM: P2V: avoid initializers and assembly using PHYS_OFFSETRussell King2011-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As PHYS_OFFSET will be becoming a variable, we can't have it used in initializers nor assembly code. Replace those in generic code with a run-time initialization. Replace those in platform code using the individual platform specific PLAT_PHYS_OFFSET. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: David Brown <davidb@codeaurora.org> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: P2V: separate PHYS_OFFSET from platform definitionsRussell King2011-02-17
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This uncouple PHYS_OFFSET from the platform definitions, thereby facilitating run-time computation of the physical memory offset. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Magnus Damm <damm@opensource.se> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Acked-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* / / ARM: v6k: Realview EB 11MPCore and PB11MPCore use V6K architecture CPUsRussell King2011-02-02
|/ / | | | | | | | | | | | | | | Make Realview EB ARM11MPCore and PB11MPCore select the new V6K CPU option. Tested-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: realview: name configuration options after actual board namesRussell King2011-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As no one seems to really know which configuration options tie up with which boards, I thought I'd do some investigation and try to work it out. After discussion with some folk in linaro, I think I have this nailed. The names are updated to use the name on the front of the appropriate board user guide for the various baseboards, which I've taken to be the official name for each board. I haven't significantly updated the descriptions for the tiles as that is even less clear - as far as I can see on ARMs website, there is no Cortex-A9 tile for Realview EB - only ARM11MPCore, ARM1156T2F-S, ARM1176TZF-S and Cortex-R4F. So exactly what this 'Multicore Cortex-A9 Tile' is... Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: realview,vexpress: fix section mismatch warning for pen_releaseRussell King2011-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix two section mismatch warnings in the platform SMP bringup code for Realview and Versatile Express: WARNING: arch/arm/mach-realview/built-in.o(.text+0x8ac): Section mismatch in reference from the function write_pen_release() to the variable .cpuinit.data:pen_release The function write_pen_release() references the variable __cpuinitdata pen_release. This is often because write_pen_release lacks a __cpuinitdata annotation or the annotation of pen_release is wrong. WARNING: arch/arm/mach-vexpress/built-in.o(.text+0x7b4): Section mismatch in reference from the function write_pen_release() to the variable .cpuinit.data:pen_release The function write_pen_release() references the variable __cpuinitdata pen_release. This is often because write_pen_release lacks a __cpuinitdata annotation or the annotation of pen_release is wrong. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'misc' into develRussell King2011-01-06
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c
| * \ Merge branch 'smp' into miscRussell King2011-01-06
| |\ \ | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/kernel/entry-armv.S arch/arm/mm/ioremap.c
| | * | ARM: CPU hotplug: fix hard-coded control register constantsRussell King2010-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the definition we've provided in asm/system.h rather than numeric constants. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: CPU hotplug: fix reporting of spurious wakeupsRussell King2010-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original scheme for reporting spurious wakeups was broken - it tried to use printk() from a context which wasn't coherent with the other CPUs, which risks corrupting the printk() data. Fix this by noting the number spurious wakeups, and only report them when we are properly woken - when we will be coherent with the rest of the system. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: Fix subtle race in CPU pen_release hotplug codeRussell King2010-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a subtle race in the CPU hotplug code, where a CPU which has been offlined can online itself before being requested, which results in things going astray on the next online/offline cycle. What happens in the normal online/offline/online cycle is: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads -1 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 However, as the write of -1 of pen_release is not fully flushed back to memory, and the checking of pen_release is done with caches disabled, this allows CPU3 the opportunity to read the old value of pen_release: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads 3 starts boot pen_release = -1 requests boot of CPU3 pen_release = 3 flush cache line Fix this by grouping the write of pen_release along with its cache line flushing code to ensure that any update to pen_release is always pushed out to physical memory. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: remove smp_mpidr.hRussell King2010-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With "ARM: CPU hotplug: remove bug checks in platform_cpu_die()", we now do not use hard_smp_processor_id(), we no longer need to read the hardware processor ID. Remove the include providing this function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: CPU hotplug: remove bug checks in platform_cpu_die()Russell King2010-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | platform_cpu_die() is entered from the CPU's own idle thread, which can not be migrated to other CPUs. Moreover, the 'cpu' argument comes from the thread info, which will always be the 'current' CPU. So remove this useless bug check. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: CPU hotplug: move cpu_killed completion to core codeRussell King2010-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We always need to wait for the dying CPU to reach a safe state before taking it down, irrespective of the requirements of the platform. Move the completion code into the ARM SMP hotplug code rather than having each platform re-implement this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: consolidate trace_hardirqs_off() into common SMP codeRussell King2010-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All platforms call trace_hardirqs_off() in their secondary startup code, so move this into the core SMP code - it doesn't need to be in the per-platform code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: consolidate the common parts of smp_prepare_cpus()Russell King2010-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a certain amount of smp_prepare_cpus() which doesn't belong in the platform support code - that is, code which is invariant to the SMP implementation. Move this code into arch/arm/kernel/smp.c, and add a platform_ prefix to the original function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: get rid of references to poke_milo and MiloRussell King2010-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Milo is an old boot loader, which is no longer relevant for these platforms. References to it are misleading. Move the code out of poke_milo(), and remove references to milo in comments. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: get rid of get_core_count()Russell King2010-12-20
| | | | | | | | | | | | | | | | | | | | | | | | We don't need this small function as well as scu_get_core_count() Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: Clean up ncores sanity checksRussell King2010-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | scu_get_core_count() never returns zero cores, so we don't need to check and correct if ncores is zero. Tegra was missing the check against NR_CPUS, leading to a potential bitfield overflow if this becomes the case. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: move CPU number sanity checks to smp_init_cpus()Russell King2010-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure that the number of CPUs is sanity checked before setting the number of possible CPUs. This avoids any chance of overflowing the cpu_possible bitmap. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: SMP: pass an ipi number to smp_cross_call()Russell King2010-12-03
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | This allows us to use smp_cross_call() to trigger a number of different software generated interrupts, rather than combining them all on one SGI. Recover the SGI number via do_IPI. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * / ARM: 6483/1: arm & sh: factorised duplicated clkdev.cJean-Christop PLAGNIOL-VILLARD2010-11-26
| |/ | | | | | | | | | | | | | | | | | | | | | | | | factorise some generic infrastructure to assist looking up struct clks for the ARM & SH architecture. as the code is identical at 99% put the arch specific code for allocation as example in asm/clkdev.h Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'clksrc' into develRussell King2011-01-05
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-vexpress/v2m.c arch/arm/plat-omap/counter_32k.c arch/arm/plat-versatile/Makefile
| * | ARM: versatile: convert sched_clock() to use new infrastructureRussell King2010-12-22
| |/ | | | | | | | | | | | | | | Convert versatile platforms to use the new sched_clock() infrastructure for extending 32bit counters to full 64-bit nanoseconds. Tested-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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*---. \ Merge branches 'ftrace', 'gic', 'io', 'kexec', 'mod', 'sa11x0', 'sh' and ↵Russell King2011-01-05
|\ \ \ \ | | |_|/ | |/| | | | | | 'versatile' into devel
| | | * ARM: 6432/1: move timer-sp.c from versatile to commonRob Herring2010-11-04
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | From: Rob Herring <rob.herring@smooth-stone.com> The timer-sp h/w used on versatile platforms can also be used for other platforms, so move it to a common location. Signed-off-by: Rob Herring <rob.herring@smooth-stone.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: GIC: private a standard get_irqnr_preamble assembler macroRussell King2010-12-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a standard get_irqnr_preamble assembler macro for platforms to use, which retrieves the base address of the GIC CPU interface from gic_cpu_base_addr. Allow platforms to override this by defining HAVE_GET_IRQNR_PREAMBLE. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: GIC: consolidate gic_cpu_base_addr to common GIC codeRussell King2010-12-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Every architecture using the GIC has a gic_cpu_base_addr pointer for GIC 0 for their entry assembly code to use to decode the cause of the current interrupt. Move this into the common GIC code. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_initRussell King2010-12-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need to re-pass the base address for the CPU interfaces to the GIC for secondary CPUs, as it will never be different from the boot CPU - and even if it was, we'd overwrite the boot CPU's base address. Get rid of this argument, and rename to gic_secondary_init(). Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 02:42:43 -0500