aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-orion5x
Commit message (Collapse)AuthorAge
* [ARM] orion5x: Add LaCie NAS 2Big Network supportSimon Guinot2009-09-08
| | | | | | | This patch add support for the 2Big Network LaCie boards. Signed-off-by: Simon Guinot <sguinot@lacie.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* ¶ARM] Orion5x: fix cpu window mapping for 88f6183Lennert Buytenhek2009-08-10
| | | | | | | | | | | On the 88f6183, orion5x's setup_cpu_win() fails to ever program any mbus bridge remap registers, which causes transactions for PCI/PCIe IO/MEM space to get sent to random mbus targets. Adding a check for the 6183 in orion5x_cpu_win_can_remap() is necessary and sufficient to make PCIe wlan cards work on the 6183 reference design. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] orion5x: Add LaCie NAS d2Network supportSimon Guinot2009-08-10
| | | | | | | | | This patch add support for the d2 Network and the Big Disk Network LaCie boards. Signed-off-by: Simon Guinot <sguinot@lacie.com> Acked-by: Christopher Moore <moore@free.fr> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] orion5x: register the crypto device on SOCs that support itNicolas Pitre2009-06-15
| | | | | | Not all Orion variants do implement the crypto unit. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] orion5x: increment window counter after adding sram mappingSebastian Andrzej Siewior2009-06-15
| | | | | | | | Without incrementing the counter the next window setup will overwrite the SRAM mapping. Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] orion5x: add sram support for cryptoSebastian Andrzej Siewior2009-06-08
| | | | | | | | | | | | The security accelerator which can act as a puppet player for the crypto engine requires its commands in the sram. This patch adds support for the phys mapping and creates a platform device for the actual driver. [ nico: renamed device name from "mv,orion5x-crypto" to "mv_crypto" so to match the module name and be more generic for Kirkwood use ] Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] orion5x: WNR854T switch supportImre Kaloz2009-06-08
| | | | | | | | This patch adds support for the switch found on the Netgear WNR854T router. Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion/Kirkwood: rename orion5x_wdt to orion_wdtNicolas Pitre2009-06-08
| | | | | | | | | The Orion watchdog driver is also used on Kirkwood. Convention is to use orion5x for stuff specific to 88F5xxx Orion chips and simply "orion" for shared stuff across SoCs including Kirkwood. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] orion5x: Change names of defines for Reset-Out-Mask registerThomas Reitmayr2009-06-08
| | | | | | | | | | | | | The name of the define for the Reset-Out-Mask register as well as its bit for the watchdog reset are changed to match the names used for Kirkwood (which in turn match the processor specification more closely). There is no functional change. This patch prepares for adding orion5x_wdt as a platform device to Kirkwood. Signed-off-by: Thomas Reitmayr <treitmayr@devbase.at> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] orion: convert gpio to use gpiolibErik Benada2009-06-08
| | | | | | | | Signed-off-by: Erik Benada <erikbenada@yahoo.ca> [ nico: fix locking, additional cleanups ] Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] orion: add hwrng timeriomem hook to TS-78xxAlexander Clouter2009-06-03
| | | | | | | Add hook so that the HW RNG source on the TS-78xx is available. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] add coherent DMA mask for mv643xx_ethNicolas Pitre2009-05-22
| | | | | | | | Since commit eb0519b5a1cf, mv643xx_eth is non functional on ARM because the platform device declaration does not include any coherent DMA mask and coherent memory allocations fail. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion: Remove explicit name for platform device resourcesMartin Michlmayr2009-05-21
| | | | | | | | | | Remove explicit names from platform device resources since they will automatically be named after the platform device they're associated with. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Acked-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] 5460/1: Orion: reduce namespace pollutionNicolas Pitre2009-04-23
| | | | | | | | | | | | | | | | | Symbols like SOFT_RESET are way too generic to be exported at large. To avoid this, let's move the mbus bridge register defines into a separate file and include it where needed. This affects mach-kirkwood, mach-loki, mach-mv78xx0 and mach-orion5x simultaneously as they all share code in plat-orion which relies on those defines. Some other defines have been moved to narrower scopes, or simply deleted when they had no user. This fixes compilation problem with mpt2sas on the above listed platforms. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)Yang Hongyang2009-04-07
| | | | | | | | Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32) Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* dma-mapping: replace all DMA_64BIT_MASK macro with DMA_BIT_MASK(64)Yang Hongyang2009-04-07
| | | | | | | | Replace all DMA_64BIT_MASK macro with DMA_BIT_MASK(64) Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'origin' into develRussell King2009-03-28
|\ | | | | | | | | Conflicts: sound/soc/pxa/pxa2xx-i2s.c
| * Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6Linus Torvalds2009-03-26
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6: (1750 commits) ixgbe: Allow Priority Flow Control settings to survive a device reset net: core: remove unneeded include in net/core/utils.c. e1000e: update version number e1000e: fix close interrupt race e1000e: fix loss of multicast packets e1000e: commonize tx cleanup routine to match e1000 & igb netfilter: fix nf_logger name in ebt_ulog. netfilter: fix warning in ebt_ulog init function. netfilter: fix warning about invalid const usage e1000: fix close race with interrupt e1000: cleanup clean_tx_irq routine so that it completely cleans ring e1000: fix tx hang detect logic and address dma mapping issues bridge: bad error handling when adding invalid ether address bonding: select current active slave when enslaving device for mode tlb and alb gianfar: reallocate skb when headroom is not enough for fcb Bump release date to 25Mar2009 and version to 0.22 r6040: Fix second PHY address qeth: fix wait_event_timeout handling qeth: check for completion of a running recovery qeth: unregister MAC addresses during recovery. ... Manually fixed up conflicts in: drivers/infiniband/hw/cxgb3/cxio_hal.h drivers/infiniband/hw/nes/nes_nic.c
| | * Merge branch 'master' of /home/davem/src/GIT/linux-2.6/David S. Miller2009-03-26
| | |\ | | | | | | | | | | | | | | | | Conflicts: drivers/net/wimax/i2400m/usb-notif.c
| | * | dsa: add switch chip cascading supportLennert Buytenhek2009-03-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The initial version of the DSA driver only supported a single switch chip per network interface, while DSA-capable switch chips can be interconnected to form a tree of switch chips. This patch adds support for multiple switch chips on a network interface. An example topology for a 16-port device with an embedded CPU is as follows: +-----+ +--------+ +--------+ | |eth0 10| switch |9 10| switch | | CPU +----------+ +-------+ | | | | chip 0 | | chip 1 | +-----+ +---++---+ +---++---+ || || || || ||1000baseT ||1000baseT ||ports 1-8 ||ports 9-16 This requires a couple of interdependent changes in the DSA layer: - The dsa platform driver data needs to be extended: there is still only one netdevice per DSA driver instance (eth0 in the example above), but each of the switch chips in the tree needs its own mii_bus device pointer, MII management bus address, and port name array. (include/net/dsa.h) The existing in-tree dsa users need some small changes to deal with this. (arch/arm) - The DSA and Ethertype DSA tagging modules need to be extended to use the DSA device ID field on receive and demultiplex the packet accordingly, and fill in the DSA device ID field on transmit according to which switch chip the packet is heading to. (net/dsa/tag_{dsa,edsa}.c) - The concept of "CPU port", which is the switch chip port that the CPU is connected to (port 10 on switch chip 0 in the example), needs to be extended with the concept of "upstream port", which is the port on the switch chip that will bring us one hop closer to the CPU (port 10 for both switch chips in the example above). - The dsa platform data needs to specify which ports on which switch chips are links to other switch chips, so that we can enable DSA tagging mode on them. (For inter-switch links, we always use non-EtherType DSA tagging, since it has lower overhead. The CPU link uses dsa or edsa tagging depending on what the 'root' switch chip supports.) This is done by specifying "dsa" for the given port in the port array. - The dsa platform data needs to be extended with information on via which port to reach any given switch chip from any given switch chip. This info is specified via the per-switch chip data struct ->rtable[] array, which gives the nexthop ports for each of the other switches in the tree. For the example topology above, the dsa platform data would look something like this: static struct dsa_chip_data sw[2] = { { .mii_bus = &foo, .sw_addr = 1, .port_names[0] = "p1", .port_names[1] = "p2", .port_names[2] = "p3", .port_names[3] = "p4", .port_names[4] = "p5", .port_names[5] = "p6", .port_names[6] = "p7", .port_names[7] = "p8", .port_names[9] = "dsa", .port_names[10] = "cpu", .rtable = (s8 []){ -1, 9, }, }, { .mii_bus = &foo, .sw_addr = 2, .port_names[0] = "p9", .port_names[1] = "p10", .port_names[2] = "p11", .port_names[3] = "p12", .port_names[4] = "p13", .port_names[5] = "p14", .port_names[6] = "p15", .port_names[7] = "p16", .port_names[10] = "dsa", .rtable = (s8 []){ 10, -1, }, }, }, static struct dsa_platform_data pd = { .netdev = &foo, .nr_switches = 2, .sw = sw, }; Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Tested-by: Gary Thomas <gary@mlbassoc.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | [WATCHDOG] orion5x_wdt: fix compile issue by providing tclk as platform dataThomas Reitmayr2009-03-25
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The orion5x-wdt driver is now registered as a platform device and receives the tclk value as platform data. This fixes a compile issue cause by a previously removed define "ORION5X_TCLK". Signed-off-by: Thomas Reitmayr <treitmayr@devbase.at> Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Kristof Provost <kristof@sigsegv.be> Cc: Lennert Buytenhek <buytenh@wantstofly.org> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Martin Michlmayr <tbm@cyrius.com> Cc: Sylver Bruneau <sylver.bruneau@googlemail.com> Cc: Kunihiko IMAI <bak@d2.dion.ne.jp> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
* | | Merge git://git.marvell.com/orion into develRussell King2009-03-25
|\ \ \
| * | | [ARM] orion5x: update of FPGA ID's for the TS-78xxAlexander Clouter2009-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Received official word finally from Technological Systems on which FPGA ID's they have released unto the world. Also an additional of a dummy entry matching the FPGA ID of the Verilog template on our wiki. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* | | | Merge branch 'master' of git://git.marvell.com/orion into develRussell King2009-03-19
|\| | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-mx1/devices.c
| * | | Merge commit '305b07680f' into orion/masterNicolas Pitre2009-03-15
| |\| |
| | * | [ARM] orion5x: pass dram mbus data to xor driverSaeed Bishara2009-03-03
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | This data should be passed to the xor driver in order to initialize the address decoding windows of the xor unit. without this patch, the self tests of the xor will fail unless the address decoding windows were initialized by the boot loader. Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] Orion: Fix some typos in the DNS-323 support codeMartin Michlmayr2009-03-10
| | | | | | | | | | | | | | | | | | | | | Fix some typos in the DNS-323 support code. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] orion5x: added a new FPGA ID set for the TS-78xxAlexander Clouter2009-03-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | Stefan Agner found his board comes with 0x00b480/0x02 but the main board also has Rev B printed on it like my 0x00b480/0x03. Some light enum renaming was needed but it was to be expected. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] orion5x: ts78xx add NAND support via plat_nandAlexander Clouter2009-02-25
| | | | | | | | | | | | | | | | | | | | | ts78xx add NAND support via plat_nand Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Nicolas Pitre <nico@cam.org>
| * | [ARM] orion5x: ts78xx amend RTC registering to not depend on ifdef'sAlexander Clouter2009-02-25
| | | | | | | | | | | | | | | | | | | | | amend RTC registering to not depend on ifdef's Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Nicolas Pitre <nico@cam.org>
| * | [ARM] orion5x: ts78xx make more bulletproof the RTC load/unload codeAlexander Clouter2009-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added checks to the platform_device_(register|add) calls so that if a device failed to load it would then not later be unloaded; also added the hooks so that it would not try to unload when the RTC driver support is compiled out. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Nicolas Pitre <nico@cam.org>
| * | Merge branch 'for-np' of git://git.wormnet.eu/alex/ts78xx into orion/masterNicolas Pitre2009-02-19
| |\ \ | | |/ | |/|
| | * [ARM] orion5x: TS-78xx support for 'hotplug' of FPGA devicesAlexander Clouter2009-02-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the FPGA on the TS-7800 provides access to a number of devices and so we have to be careful when reprogramming it. As we are effectively turning a bus off/on we have to inform the kernel that it should stop using anything provided by the FPGA (currently only the RTC however the NAND, LCD, etc is to come) before it's reprogrammed. Once reprogramed, we can tell the kernel to (re)enable things by checking the FPGA ID against a lookup table for what a particular FPGA bitstream can provide. Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
| | * [ARM] orion5x: TS-78xx comment shiftingAlexander Clouter2009-02-06
| | | | | | | | | | | | | | | | | | moved the MPP comments to the mpp area of the platform code Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
| | * [ARM] orion5x: remove TS-78xx NOR support as it does not existAlexander Clouter2009-02-06
| | | | | | | | | | | | | | | | | | | | | | | | The TS-7800's M25P40 is not available to the kernel, it's used to load the initial bitstream onto the FPGA and so these hooks point to nothing and need to be removed. Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
* | | [ARM] pass reboot command line to arch_reset()Russell King2009-03-19
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP wishes to pass state to the boot loader upon reboot in order to instruct it whether to wait for USB-based reflashing or not. There is already a facility to do this via the reboot() syscall, except we ignore the string passed to machine_restart(). This patch fixes things to pass this string to arch_reset(). This means that we keep the reboot mode limited to telling the kernel _how_ to perform the reboot which should be independent of what we request the boot loader to do. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] 5401/1: Orion: fix edge triggered GPIO interrupt supportNicolas Pitre2009-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO interrupts can be configured as either level triggered or edge triggered, with a default of level triggered. When an edge triggered interrupt is requested, the gpio_irq_set_type method is called which currently switches the given IRQ descriptor between two struct irq_chip instances: orion_gpio_irq_level_chip and orion_gpio_irq_edge_chip. This happens via __setup_irq() which also calls irq_chip_set_defaults() to assign default methods to uninitialized ones. The problem is that irq_chip_set_defaults() is called before the irq_chip reference is switched, leaving the new irq_chip (orion_gpio_irq_edge_chip in this case) with uninitialized methods such as chip->startup() causing a kernel oops. Many solutions are possible, such as making irq_chip_set_defaults() global and calling it from gpio_irq_set_type(), or calling __irq_set_trigger() before irq_chip_set_defaults() in __setup_irq(). But those require modifications to the generic IRQ code which might have adverse effect on other architectures, and that would still be a fragile arrangement. Manually copying the missing methods from within gpio_irq_set_type() would be really ugly and it would break again the day new methods with automatic defaults are added. A better solution is to have a single irq_chip instance which can deal with both edge and level triggered interrupts. It is also a good idea to switch the IRQ handler instead, as the edge IRQ handler allows for one edge IRQ event to be queued as the IRQ is actually masked only when that second IRQ is received, at which point the hardware can queue an additional IRQ event, making edge triggered interrupts a bit more reliable. Tested-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] 5360/1: Orion: fix compilation errorNicolas Pitre2009-01-08
|/ | | | | | | Commit ba84be2338d3 broke the build. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Orion: share GPIO IRQ handling codeLennert Buytenhek2008-12-20
| | | | | | | Split off Orion GPIO IRQ handling code into plat-orion/. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion: share GPIO handling codeLennert Buytenhek2008-12-20
| | | | | | | | Split off Orion GPIO handling code into plat-orion/, and add support for multiple sets of (32) GPIO pins. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* Merge git://git.marvell.com/orion into develRussell King2008-12-13
|\
| * [ARM] DNS323: Initialise 88F5182 correctlyMatt Palmer2008-12-11
| | | | | | | | | | | | | | | | | | | | The 88F5182 found in the DNS-323 rev B1 (and some other devices, such as the CH3SNAS) require different initialisation of the SATA controller and MPP registers. Tested on a DNS-323 rev B1. Signed-off-by: Matt Palmer <mpalmer@hezmatt.org>
| * [ARM] DNS323: Read MAC address from flashMatt Palmer2008-12-11
| | | | | | | | | | | | | | | | | | Based on similar code from the tsx09 series of machines, just rips the MAC address out of flash and stuffs it into the NIC. Tested on a DNS323 rev B1. It's possible (though unlikely) that an A1 will have the MAC in a different location in flash. Signed-off-by: Matt Palmer <mpalmer@hezmatt.org>
| * [ARM] Orion: add the option to support different ehci phy initializationRonen Shitrit2008-12-04
| | | | | | | | | | | | | | | | | | The Orion ehci driver serves the Orion, kirkwood and DD Soc families. Since each of those integrate a different USB phy we should have the ability to use few initialization sequences or to leave the boot loader phy settings as is. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
* | [ARM] Add a common typesafe __io implementationRussell King2008-11-30
| | | | | | | | | | | | | | | | As Al did for Versatile in 2ad4f86b60b649fd7428265c08d73a3bd360c81b, add a typesafe __io implementation for platforms to use. Convert platforms to use this new simple typesafe implementation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] Hide ISA DMA API when ISA_DMA_API is unsetRussell King2008-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | When ISA_DMA_API is unset, we're not implementing the ISA DMA API, so there's no point in publishing the prototypes via asm/dma.h, nor including the machine dependent parts of that API. This allows us to remove a lot of mach/dma.h files which don't contain any useful code. Unfortunately though, some platforms put their own private non-ISA definitions into mach/dma.h, so we leave these behind and fix the appropriate #include statments. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] remove a common set of __virt_to_bus definitionsNicolas Pitre2008-11-28
|/ | | | | | | | | | | | | | | | Let's provide an overridable default instead of having every machine class define __virt_to_bus and __bus_to_virt to the same thing. What most platforms are using is bus_addr == phys_addr so such is the default. One exception is ebsa110 which has no DMA what so ever, so the actual definition is not important except only for proper compilation. Also added a comment about the special footbridge bus translation. Let's also remove comments alluding to set_dma_addr which is not (and should not) be commonly used. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] gpio_free might sleep, arm architectureUwe Kleine-König2008-10-30
| | | | | | | | | | | | | | | | According to the documentation gpio_free should only be called from task context only. To make this more explicit add a might sleep to all implementations. This patch changes the gpio_free implementations for the arm architecture. DaVinci is skipped on purpose to simplify the merge process for patches switching it over to use gpiolib as per request by David Brownell. Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Cc: David Brownell <david-b@pacbell.net> Cc: Andrew Victor <linux@maxim.org.za> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Orion: activate workaround for 88f6183 SPI clock erratumNicolas Pitre2008-10-19
| | | | | | | | | Commit 2ede90ca78500ca0ffeee19d7812d345f8ad152d adds 6183 support, but the SPI support in there doesn't work since it depends on a 6183 SPI unit erratum fix that only just went upstream, via commit 2bec19feabd53cba75e9dab0e79afbe868a37113. Signed-off-by: Nicolas Pitre <nico@marvell.com>
* [ARM] Orion: instantiate the dsa switch driverLennert Buytenhek2008-10-19
| | | | | | | | | | | | | This adds DSA switch instantiation hooks to the orion5x and the kirkwood ARM SoC platform code, and instantiates the DSA switch driver on the 88F5181L FXO RD, the 88F5181L GE RD, the 6183 AP GE RD, the Linksys WRT350n v2, and the 88F6281 RD boards. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Tested-by: Nicolas Pitre <nico@marvell.com> Tested-by: Peter van Valderen <linux@ddcrew.com> Tested-by: Dirk Teurlings <dirk@upexia.nl> Signed-off-by: Nicolas Pitre <nico@marvell.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-17 22:59:39 -0500