| Commit message (Collapse) | Author | Age |
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This patch adds hwmod support for ADC on AM43xx. Since clockdomain
and offsets of adc_tsc are different from AM33xx, ADC data has been
directly added to AM43xx hwmod file.
Signed-off-by: Vignesh R <vigneshr@ti.com>
[paul@pwsan.com: fixed spelling of "Anolog"; converted spaces to tabs]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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We had constrainted hwmod entries to entries in dts which were present
only for default mapped interrupts, the ones such as UARTs > 6 which
needed IRQ crossbar configured were never added to hwmod database.
Add them now that IRQ crossbar is functional
Without this, enabling UARTs7 to 10 in dts results in the following crash:
[ 1.893829] omap_uart 48420000.serial: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
[ 1.903381] Unhandled fault: imprecise external abort (0x1406) at 0x00000000
[ 1.903381] ------------[ cut here ]------------
[ 1.903381] WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x2ac/0x32c()
[ 1.903411] 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 (Read): Data Access in User mode during Functional access
[ 1.903411] Modules linked in:
[ 1.903411] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.18.0-rc1-dirty #3
[ 1.903442] [<c0015270>] (unwind_backtrace) from [<c00119b4>] (show_stack+0x10/0x14)
[ 1.903442] [<c00119b4>] (show_stack) from [<c05e4afc>] (dump_stack+0x78/0x94)
[ 1.903472] [<c05e4afc>] (dump_stack) from [<c003fed0>] (warn_slowpath_common+0x6c/0x8c)
[ 1.903472] [<c003fed0>] (warn_slowpath_common) from [<c003ff84>] (warn_slowpath_fmt+0x30/0x40)
[ 1.903472] [<c003ff84>] (warn_slowpath_fmt) from [<c0333bfc>] (l3_interrupt_handler+0x2ac/0x32c)
[ 1.903503] [<c0333bfc>] (l3_interrupt_handler) from [<c008d6f8>] (handle_irq_event_percpu+0x60/0x230)
[ 1.903503] [<c008d6f8>] (handle_irq_event_percpu) from [<c008d904>] (handle_irq_event+0x3c/0x5c)
[ 1.903503] [<c008d904>] (handle_irq_event) from [<c00903b0>] (handle_fasteoi_irq+0xc4/0x190)
[ 1.903503] [<c00903b0>] (handle_fasteoi_irq) from [<c008d01c>] (generic_handle_irq+0x20/0x30)
[ 1.903533] [<c008d01c>] (generic_handle_irq) from [<c008d114>] (__handle_domain_irq+0x64/0xb8)
[ 1.903533] [<c008d114>] (__handle_domain_irq) from [<c00086e4>] (gic_handle_irq+0x20/0x60)
[ 1.903533] [<c00086e4>] (gic_handle_irq) from [<c05eb124>] (__irq_svc+0x44/0x5c)
[ 1.903533] Exception stack(0xc08d1f60 to 0xc08d1fa8)
[ 1.903564] 1f60: 00000001 00000001 00000000 c08dc930 c08d0000 00000000 00000000 00000000
[ 1.903564] 1f80: ffffffed c0978028 c08d89dc c08d8978 00000000 c08d1fa8 c0083fc0 c000f160
[ 1.903564] 1fa0: 20000013 ffffffff
[ 1.903564] [<c05eb124>] (__irq_svc) from [<c000f160>] (arch_cpu_idle+0x20/0x3c)
[ 1.903594] [<c000f160>] (arch_cpu_idle) from [<c0077c54>] (cpu_startup_entry+0x198/0x338)
[ 1.903594] [<c0077c54>] (cpu_startup_entry) from [<c0869be0>] (start_kernel+0x358/0x3c4)
[ 1.903594] [<c0869be0>] (start_kernel) from [<80008074>] (0x80008074)
[ 1.903594] ---[ end trace 293fc95d463cff71 ]---
[ 2.117553] Internal error: : 1406 [#1] SMP ARM
[ 2.122314] Modules linked in:
[ 2.125518] CPU: 1 PID: 1 Comm: swapper/0 Tainted: G W 3.18.0-rc1-dirty #3
[ 2.133850] task: ed868b80 ti: ed86a000 task.ti: ed86a000
[ 2.139526] PC is at serial_omap_probe+0x2fc/0x514
[ 2.144561] LR is at trace_hardirqs_on_caller+0xec/0x1c4
[ 2.150146] pc : [<c038f0f0>] lr : [<c0083fc0>] psr: 40000013
[ 2.150146] sp : ed86be18 ip : ed9bb57c fp : f005e000
[ 2.162231] r10: 0000012a r9 : ed9b4f80 r8 : edc5bdcd
[ 2.167724] r7 : edc58810 r6 : ed9bb400 r5 : ed9bb410 r4 : edc5bc10
[ 2.174560] r3 : 00000000 r2 : 00000000 r1 : 00000014 r0 : ffffffed
[ 2.181427] Flags: nZcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel
[ 2.189117] Control: 10c5387d Table: 8000406a DAC: 00000015
[ 2.195159] Process swapper/0 (pid: 1, stack limit = 0xed86a248)
[ 2.201477] Stack: (0xed86be18 to 0xed86c000)
[ 2.206054] be00: ed9ba2d0 00000000
[ 2.214660] be20: edc50150 00000001 c08cba58 00000000 00000000 ed9bb410 ffffffed c09481d8
[ 2.223236] be40: 00000000 c09481d8 c08cba58 00000000 00000000 c039bcfc c1170958 ed9bb410
[ 2.231842] be60: ed9bb444 c039a6f4 00000000 ed9bb410 c09481d8 ed9bb444 00000000 c08dc698
[ 2.240447] be80: edc4a100 c039a8b0 c09481d8 c039a81c 00000000 c0399060 ed8afaa8 ed92c110
[ 2.249053] bea0: c09481d8 edc482c0 c0949308 c0399ee0 c077f80c c09481d8 ed86a000 c09481d8
[ 2.257659] bec0: ed86a000 c08dc698 00000000 c039b088 00000000 00000000 ed86a000 c08a1924
[ 2.266235] bee0: c08a1904 c00089c4 00000000 00000000 00000000 00000000 60000093 00000000
[ 2.274841] bf00: 00000004 00000000 ed868b80 00000004 00000000 60000053 00000000 00000001
[ 2.283447] bf20: 00000000 c0083ea8 00000001 ed86a000 c08334bc ef7fc307 000000b2 c0059358
[ 2.292053] bf40: c07e176c c083299c 00000006 00000006 c08cb588 c08b69cc 00000006 c08b69ac
[ 2.300659] bf60: c097a280 000000b2 c08cba58 c0869588 00000000 c0869e04 00000006 00000006
[ 2.309234] bf80: c0869588 00000000 00000000 c05dfd7c 00000000 00000000 00000000 00000000
[ 2.317840] bfa0: 00000000 c05dfd84 00000000 c000e668 00000000 00000000 00000000 00000000
[ 2.326446] bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 2.335052] bfe0: 00000000 00000000 00000000 00000000 00000013 00000000 020405d0 00090c40
[ 2.343658] [<c038f0f0>] (serial_omap_probe) from [<c039bcfc>] (platform_drv_probe+0x48/0x98)
[ 2.352630] [<c039bcfc>] (platform_drv_probe) from [<c039a6f4>] (driver_probe_device+0x10c/0x234)
[ 2.361968] [<c039a6f4>] (driver_probe_device) from [<c039a8b0>] (__driver_attach+0x94/0x98)
[ 2.370819] [<c039a8b0>] (__driver_attach) from [<c0399060>] (bus_for_each_dev+0x54/0x88)
[ 2.379425] [<c0399060>] (bus_for_each_dev) from [<c0399ee0>] (bus_add_driver+0xdc/0x1d4)
[ 2.388031] [<c0399ee0>] (bus_add_driver) from [<c039b088>] (driver_register+0x78/0xf4)
[ 2.396453] [<c039b088>] (driver_register) from [<c08a1924>] (serial_omap_init+0x20/0x40)
[ 2.405059] [<c08a1924>] (serial_omap_init) from [<c00089c4>] (do_one_initcall+0x80/0x1cc)
[ 2.413757] [<c00089c4>] (do_one_initcall) from [<c0869e04>] (kernel_init_freeable+0x1b8/0x28c)
[ 2.422912] [<c0869e04>] (kernel_init_freeable) from [<c05dfd84>] (kernel_init+0x8/0xe4)
[ 2.431396] [<c05dfd84>] (kernel_init) from [<c000e668>] (ret_from_fork+0x14/0x2c)
[ 2.439361] Code: e1b02f23 020320f0 0203300f 01a02222 (0a000021)
[ 2.445770] ---[ end trace 293fc95d463cff72 ]---
[ 2.450683] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
[ 2.450683]
[ 2.460296] CPU0: stopping
[ 2.463134] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G D W 3.18.0-rc1-dirty #3
[ 2.471405] [<c0015270>] (unwind_backtrace) from [<c00119b4>] (show_stack+0x10/0x14)
[ 2.479522] [<c00119b4>] (show_stack) from [<c05e4afc>] (dump_stack+0x78/0x94)
[ 2.487060] [<c05e4afc>] (dump_stack) from [<c001394c>] (handle_IPI+0x190/0x264)
[ 2.494781] [<c001394c>] (handle_IPI) from [<c000871c>] (gic_handle_irq+0x58/0x60)
[ 2.502716] [<c000871c>] (gic_handle_irq) from [<c05eb124>] (__irq_svc+0x44/0x5c)
[ 2.510528] Exception stack(0xc08d1f60 to 0xc08d1fa8)
[ 2.515808] 1f60: c000f15c 00000000 00000000 00000000 c08d0000 00000000 00000000 00000000
[ 2.524353] 1f80: ffffffed c0978028 c08d89dc c08d8978 00000000 c08d1fa8 c000f15c c000f160
[ 2.532897] 1fa0: 60000013 ffffffff
[ 2.536529] [<c05eb124>] (__irq_svc) from [<c000f160>] (arch_cpu_idle+0x20/0x3c)
[ 2.544281] [<c000f160>] (arch_cpu_idle) from [<c0077c54>] (cpu_startup_entry+0x198/0x338)
[ 2.552917] [<c0077c54>] (cpu_startup_entry) from [<c0869be0>] (start_kernel+0x358/0x3c4)
[ 2.561462] [<c0869be0>] (start_kernel) from [<80008074>] (0x80008074)
[ 2.568298] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
[
Reported-by: Franklin Cooper Jr. <fcooper@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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RFBI iclk was set to point to hacky "dss_fck", which will be removed.
Instead use "l3_div_ck", which is the proper clock for this. "l3_div_ck"
is the parent of "dss_fck", so the clock rate is the same as previously.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Instead of using a hacky "dss_fck" clock (which toggles the MODULEMODE
bit) as DSS L3 interface clock, set the .modulemode field in the
omap44xx_dss_hwmod. This works now that the DSS core hwmod is enabled
during DSS submodule resets.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Set DSS core hwmod as the parent for all the DSS submodules.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Set DSS core hwmod as the parent for all the DSS submodules.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Add parent_hwmod pointer to omap_hwmod. This can be set to point to a
"parent" hwmod that needs to be enabled for the "child" hwmod to work.
This is used at hwmod setup time: when doing the initial setup and
reset, first enable the parent hwmod, and after setup and reset is done,
restore the parent hwmod to postsetup_state.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
[paul@pwsan.com: add kerneldoc documentation for parent_hwmod; note that it
is a temporary workaround]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "omap prcm clean-up for v3.19" from Tony Lindgren:
Clean-up series for omap PRCM (Power Reset Clock Module) from
Tero Kristo to move things a bit closer to becoming a proper
device driver.
* tag 'omap-for-v3.19/prcm-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (26 commits)
ARM: OMAP2+: PRM: provide generic API for system reset
ARM: OMAP3+: PRM: add generic API for reconfiguring I/O chain
ARM: OMAP4: PRM: make PRCM interrupt handler related functions static
ARM: OMAP3: PRM: make PRCM interrupt handler related functions static
ARM: OMAP4: PRM: make omap4_prm_read/write_inst_reg calls static
ARM: AM33xx: PRM: make direct register access functions static
ARM: AM33xx: PRM: move global warm reset implementation to driver
ARM: OMAP4+: CM: remove omap4_cm1/cm2_* functions
ARM: OMAP4: CM: make cminst direct register access functions static
ARM: OMAP4: CM: move public definitions from cminst44xx.h to cm44xx.h
ARM: OMAP2+: PRM: add generic API for checking hardreset status
ARM: OMAP2+: PRM: add generic API for deasserting hardware reset
ARM: OMAP2+: PRM: add generic API for asserting hardware reset
ARM: AM33xx: PRM: add support for prm_init
ARM: AM43xx: hwmod: use OMAP4 hardreset ops instead of the AM33xx version
ARM: AM33xx: hwmod: remove am33xx specific module SoC opts
ARM: OMAP2/3: CM: make cm_split_idlest_reg SoC calls static
ARM: OMAP2+: CM: add common APIs for cm_module_enable/disable
ARM: OMAP2+: CM: make clkdm_hwsup operations static
ARM: OMAP4+/AM33xx: CM: add common API for cm_wait_module_idle
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch combines the various prm_warm_reset calls under a common
API prm_reset_system, and adds the SoC specific implementation under
prm_ll_data.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This adds a generic API for reconfiguring the I/O chain. The implementation
will call the SoC specific function registered during init time. The SoC
specific reconfigure functions are also made static, as they don't need
to be accessed outside the PRM driver itself.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
[tony@atomide.com: updated for recent omap3 prcm fixes]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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These are not needed outside the PRM driver, so make them static and
remove the prototypes from the public header.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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These are not needed outside the PRM driver, so make them static and
remove the prototypes from the public header.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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These are not (and should not be) used by anybody outside the PRM
driver itself.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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These should not be accessed outside driver, thus removed the APIs
from the header file and made the implementation static.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Moved the implementation from am33xx-restart.c to the prm33xx.c file to
isolate the PRM register accesses to be private for PRM driver.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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These are not used for anything, so remove both the implementations and
header file references.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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These shall not be accessed outside the CM driver. This also removes the
need for the cminst44xx.h header.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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cminst44xx.h will be removed, thus move the public APIs to cm44xx.h header.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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PRM driver now has a generic API for checking hardreset status. SoC
specific support functions are registered through the prm_ll_data.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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PRM driver now has a generic API for deasserting hardware resets. SoC
specific support functions are registered through the prm_ll_data.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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PRM driver now has a generic API for asserting hardware resets. SoC
specific support functions are registered through the prm_ll_data.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Added support for prm_init for AM33xx SoC. This is needed to register
SoC specific prm_ll_data for these devices.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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AM43xx is using OMAP4+ PRM driver, so it should be using the corresponding
hardreset ops from the hwmod also.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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These are now identical with the OMAP4 implementations, so use the OMAP4
versions and remove the AM33xx ones.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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CM driver has a generic API which calls the SoC specific split function
through cm_ll_data, so there is no need for the SoC specific functions to
be publicly available.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Adds a generic CM driver API for enabling/disabling modules.
The SoC specific implementations are registered through cm_ll_data.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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These are not accessed outside the cm*.c files themselves, so make them
static.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Adds a generic CM driver API for waiting module to enter idle / standby.
The SoC specific implementations are registered through cm_ll_data.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This patch consolidates the parameters provided for the SoC specific
cm_*_wait_module_ready calls, adds the missing cm_ll_data function
pointers and uses the now generic call from the mach-omap2 board code.
SoC specific *_wait_module_ready calls are also made static so they
can only be accessed through the generic CM driver API only.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This is needed for expanding the generic CM driver API to include
AM33xx and OMAP4 also.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This is not needed for anything. This also eases the consolidation of
the wait_module_ready / wait_module_idle calls behind a generic CM
driver API by reducing the number of needed parameters.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The implementation on these is identical, so no need to have them separate.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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AM43xx will be re-using OMAP4 PRM driver, thus call its init function.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This is done in attempt to get rid of cpu_is_X calls from the PRM core.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "omap soc changes for v3.19" from Tony Lindgren:
SoC related changes for omaps. Mostly to make PM easier to use for
omap4 and later, and to fix clock DPLL fixes by adding determine_rate
and set_rate_and_parent.
* tag 'omap-for-v3.19/clocks-and-pm' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: hwmod: drop unnecessary list initialization
ARM: OMAP3+: DPLL: use determine_rate() and set_rate_and_parent()
ARM: OMAP3: clock: add support for dpll4_set_rate_and_parent
ARM: OMAP4: clock: add support for determine_rate for omap4 regm4xen DPLL
ARM: OMAP3: clock: add new rate changing logic support for noncore DPLLs
ARM: OMAP3: clock: use clk_features flags for omap3 DPLL4 checks
ARM: OMAP4+: PM: Program CPU logic power state
ARM: OMAP4+: PM: Centralize static dependency mapping table
ARM: OMAP4: PM: Only do static dependency configuration in omap4_init_static_deps
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.19/soc
Some OMAP clock/hwmod patches for v3.19.
Most of the patches are clock-related. The DPLL implementation is
changed to better align to the common clock framework.
There is also a patch that removes a few lines from the hwmod code -
this patch should have no functional effect.
Basic build, boot, and PM test logs for these patches can be found here:
http://www.pwsan.com/omap/testlogs/omap-a-for-v3.19/20141113094101/
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ml->node and sl->node are currently initialized
by means of INIT_LIST_HEAD(). That initialiation
is followed by a list_add() call.
Looking at what both these functions do we will have:
ml->node.next = &ml->node;
ml->node.prev = &ml->node;
oi->master->master_ports.next.prev = &ml->node;
ml->node.next = &oi->master->master_ports.next;
ml->node.prev = &oi->master->master_ports;
oi->master->master_ports.next = &ml->node;
from this, it's clear that both INIT_LIST_HEAD() calls
are unnecessary and can be safely removed.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Currently, DPLLs are hiding the gory details of switching parent
within set_rate, which confuses the common clock code and is wrong.
Fixed by applying the new determine_rate() and set_rate_and_parent()
functionality to any clock-ops previously using the broken approach.
This patch also removes the broken legacy code.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Expand the support of omap4 per-dpll to provide set_rate_and_parent.
This is required for proper behavior of clk_change_rate with
determine_rate support.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Similarly to OMAP3 noncore DPLL, the implementation of this DPLL clock
type is wrong. This patch adds basic functionality for determine_rate
for this clock type which will be taken into use in the patches following
later.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Currently, DPLL code hides the re-parenting within its internals, which
is wrong. This needs to be exposed to the common clock code via
determine_rate and set_rate_and_parent APIs. This patch adds support
for these, which will be taken into use in the following patches.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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DPLL4 can't be reprogrammed on OMAP3430 ES1.0 due to hardware limitation.
Currently, the code does runtime omap_rev() check to see the chip it is
being executed on, instead, change this to use clk_features flags.
This avoids need for runtime omap_rev() checks.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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CPU logic power state is never programmed in either the initialization
or the suspend/resume logic, instead, we depend on mpuss to program this
properly. However, this leaves CPU logic power state indeterminate and
most probably in reset configuration (If bootloader or other similar
software have'nt monkeyed with the register). This can make powerstate=
RET be either programmed for CSWR (logic=ret) or OSWR(logic = OFF) and
in OSWR, there can be context loss when the code does not expect it.
To prevent all these confusions, just support clearly ON, INA, CSWR,
OFF which is the intent of the existing code by explicitly programming
logic state.
NOTE: since this is a hot path (using in cpuidle), the exit path just
programs powerstate (logic state is immaterial when powerstate is ON).
Without doing this, we end up with lockups when CPUs enter OSWR and
multiple blocks loose context, when we expect them to hit CSWR.
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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As we add more static dependency mapping for various errata, the logic
gets clunkier. Since it is a simple lookup and map logic, centralize the
same and provide the mapping as a simple list.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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omap4_init_static_deps
Commit 705814b5ea6f ("ARM: OMAP4+: PM: Consolidate OMAP4 PM code to
re-use it for OMAP5")
Moved logic generic for OMAP5+ as part of the init routine by
introducing omap4_pm_init. However, the patch left the powerdomain
initial setup, an unused omap4430 es1.0 check and a spurious log
"Power Management for TI OMAP4." in the original code.
Remove the duplicate code which is already present in omap4_pm_init from
omap4_init_static_deps.
As part of this change, also move the u-boot version print out of the
static dependency function to the omap4_pm_init function.
Fixes: 705814b5ea6f ("ARM: OMAP4+: PM: Consolidate OMAP4 PM code to re-use it for OMAP5")
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC non-critical bug fixes from Arnd Bergmann:
"These are bug fixes for harmless problems that were not important
enough to get fixed in 3.19. This contains updates to the MAINTAINERS
file, in particular:
- Ben Dooks stepped down as Samsung co-maintainer (thanks Ben for
long years of maintaining this). Kukjin Kim, who has been doing
the work de-facto by himself recently is now the only maintainer.
- Liviu, Sudeep and Lorenzo from ARM now officially maintain the
Versatile Express platform, which was orphaned (thanks for
- Gregory Fong and Florian Fainelli help out on the Broadcom BCM7XXX
platform
- Ray Jui and Scott Branden are the future maintainers for the newly
merged Broadcom Cygnus platform. Welcome!
In terms of actual fixes, we have the usual set of OMAP bug fixes,
which Tony Lindgren separates out well from the other OMAP changes,
one really ep93xx regression fix against 3.11 that didn't make it for
3.18, a few GIC changes from Marc Zyngier as a preparation for later
rework (the current code is wrong in a harmless way), on Tegra
regression and one samsung spelling fix"
* tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: imx6: fix bogus use of irq_get_irq_data
ARM: imx: irq: fix buggy usage of irq_data irq field
MAINTAINERS: ARM Versatile Express platform, add missing pattern
MAINTAINERS: ARM Versatile Express platform
arm: ep93xx: add dma_masks for the M2P and M2M DMA controllers
MAINTAINERS: Add ahci_st.c to ARCH/STI architecture
MAINTAINERS: add entry for the GISB arbiter driver
MAINTAINERS: update brcmstb entries
MAINTAINERS: update email address and cleanup for exynos entry
ARM: tegra: Re-add removed SoC id macro to tegra_resume()
MAINTAINERS: Entry for Cygnus/iproc arm architecture
ARM: OMAP: serial: remove last vestige of DTR_gpio support.
ARM: OMAP2+: gpmc: Get rid of "ti,elm-id not found" warning
ARM: EXYNOS: fix typo in static struct name "exynos5_list_diable_wfi_wfe"
ARM: OMAP2: Remove unnecessary KERN_* in omap_phy_internal.c
ARM: OMAP4+: Remove unused omap_l3_noc platform init
ARM: dts: Add twl keypad map for omap3 EVM
ARM: dts: Add twl keypad map for LDP
ARM: dts: Fix NAND last partition size on LDP
ARM: OMAP3: Fix errors for omap_l3_smx when booted with device tree
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These fields were added by:
commit 9574f36fb801035f6ab0fbb1b53ce2c12c17d100
OMAP/serial: Add support for driving a GPIO as DTR.
but not removed by
commit 985bfd54c826c0ba873ca0adfd5589263e0c6ee2
tty: serial: omap: remove some dead code
which reverted most of that commit.
Time to revert the rest.
Signed-off-by: NeilBrown <neilb@suse.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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OMAP3 and lower SoCs don't have the ELM module so this warning
is annoying. Get rid of it.
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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