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| * | OMAP: UART: Add sysfs interface for adjusting UART sleep timeoutJouni Hogander2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes it possible to change uart sleep timeout. New sysfs entry is added (/sys/devices/platform/serial8250.<uart>/sleep_timeout) Writing zero will disable the timeout feature and prevent UART clocks from being disabled. Also default timeout is increased to 5 second to make serial console more usable. Original patch was written by Tero Kristo. Cc: Tero Kristo <Tero.Kristo@nokia.com> Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: UART: disable clocks when idle and off-mode supportKevin Hilman2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows the UART clocks to be disabled when the OMAP UARTs are inactive, thus permitting the chip to hit retention in idle. After the expiration of an activity timer, each UART is allowed to disable its clocks so the system can enter retention. The activity timer is (re)activated on any UART interrupt, UART wake event or any IO pad wakeup. The actual disable of the UART clocks is done in the 'prepare_idle' hook called from the OMAP idle loop. While the activity timer is active, the smart-idle mode of the UART is also disabled. This is due to a "feature" of the UART module that after a UART wakeup, the smart-idle mode may be entered before the UART has communicated the interrupt, or upon TX, an idle mode may be entered before the TX FIFOs are emptied. Upon suspend, the 'prepare_suspend' hook cancels any pending activity timers and allows the clocks to be disabled immediately. In addition, upon disabling clocks the UART state is saved in case of an off-mode transition while clocks are off. Special thanks to Tero Kristo for the initial ideas and first versions of UART idle support, and to Jouni Hogander for extra testing and bugfixes. Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810) Cc: Tero Kristo <tero.kristo@nokia.com> Cc: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: Force IVA2 into idle during bootupKevin Hilman2009-05-28
| | | | | | | | | | | | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP: Add new function to check wether there is irq pendingJouni Hogander2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add common omap2/3 function to check wether there is irq pending. Switch to use it in omap2 pm code instead of its own. Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP2/3: PM: push core PM code from linux-omapKevin Hilman2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to sync the core linux-omap PM code with mainline. This code has evolved and been used for a while the linux-omap tree, but the attempt here is to finally get this into mainline. Following this will be a series of patches from the 'PM branch' of the linux-omap tree to add full PM hardware support from the linux-omap tree. Much of this PM core code was written by Jouni Hogander with significant contributions from Paul Walmsley as well as many others from Nokia, Texas Instruments and linux-omap community. Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | Revert "ARM: OMAP: Mask interrupts when disabling interrupts, v2"Kevin Hilman2009-05-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 5461af5af5c6a7fee78978aafe720541bf3a2f55. Adding a disable hook to the irq_chip is not the way to fix the problem being addressed by this patch. Instead, we need to fix support for [enable|disable]_irq_wake(). Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | Merge branch 'omap-clock-upstream' of git://git.pwsan.com/linux-2.6 into ↵Tony Lindgren2009-05-26
| |\ \ | | | | | | | | | | | | for-next
| | * | OMAP2xxx clock: rename clk_init_one() to clk_preinit()Paul Walmsley2009-05-12
| | | | | | | | | | | | | | | | | | | | | | | | Rename clk_init_one() to clk_preinit() to distinguish its function from clk_init() and the individual struct clk init functions. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 clock: lessen amount of noisy messagesArtem Bityutskiy2009-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On our system we see the following messages: Disabling unused clock "gpt2_ick" Disabling unused clock "gpt3_ick" Disabling unused clock "gpt4_ick" Disabling unused clock "gpt5_ick" ... The messages have KERN_INFO level and if you have serial console, they normally go there. I do not think it is good idea to print that much stuff there. Moreover, messages are not properly prefixed and for mortals it is not immeadietly clear where they come from. Let's give them debugging level instead. Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> [paul@pwsan.com: trimmed debugging output in patch description]
| | * | OMAP3 clock: use pr_debug() rather than pr_info() in some clock change codePaul Walmsley2009-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CORE DPLL M2 frequency change code should use pr_debug(), not pr_info(), for its debug messages. Same with omap2_clksel_round_rate_div(). While here, convert a few printk(KERN_ERR .. into pr_err(). Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 clock: only unlock SDRC DLL if SDRC clk < 83MHzPaul Walmsley2009-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the 34xx TRM Rev. K section 11.2.4.4.11.1 "Purpose of the DLL/CDL Module," the SDRC delay-locked-loop can be locked at any SDRC clock frequency from 83MHz to 166MHz. CDP code unconditionally unlocked the DLL whenever shifting to a lower SDRC speed, but this seems unnecessary and error-prone, as the DLL is no longer able to compensate for process, voltage, and temperature variations. Instead, only unlock the DLL when the SDRC clock rate would be less than 83MHz. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 SRAM: renumber registers to make space for argument passingPaul Walmsley2009-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Renumber registers in omap3_sram_configure_core_dpll() assembly code to make space for additional parameters. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 SDRC: initialize SDRC_POWER at bootPaul Walmsley2009-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize SDRC_POWER to a known-good setting when the kernel boots. Necessary since some bootloaders don't initialize SDRC_POWER properly. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency changePaul Walmsley2009-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clear the SDRC_POWER.PWRENA bit before putting the SDRAM into self-refresh mode. This prevents the SDRC from attempting to power off the SDRAM, which can cause the system to hang. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 clock: add interconnect barriers to CORE DPLL M2 changePaul Walmsley2009-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Where necessary, add interconnect barriers to force posted writes to complete before continuing. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | OMAP3 SRAM: add ARM barriers to omap3_sram_configure_core_dpllPaul Walmsley2009-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add more barriers in the SRAM CORE DPLL M2 divider change code. - Add a DSB SY after the function's entry point to flush all cached and buffered writes and wait for the interconnect to claim that they have completed[1]. The idea here is to force all delayed write traffic going to the SDRAM to at least post to the L3 interconnect before continuing. If these writes are allowed to occur after the SDRC is idled, the writes will not be acknowledged and the ARM will stall. Note that in this case, it does not matter if the writes actually complete to the SDRAM - it is only necessary for the writes to leave the ARM itself. If the writes are posted by the interconnect when the SDRC goes into idle, the writes will be delayed until the SDRC returns from idle[2]. If the SDRC is in the middle of a write when it is requested to enter idle, the SDRC will not acknowledge the idle request until the writes complete to the SDRAM.[3] The old-style DMB in sdram_in_selfrefresh is now superfluous, so, remove it. - Add an ISB before the function's exit point to prevent the ARM from speculatively executing into SDRAM before the SDRAM is enabled[4]. ... 1. ARMv7 ARM (DDI 0406A) A3-47, A3-48. 2. Private communication with Richard Woodruff <r-woodruff2@ti.com>. 3. Private communication with Richard Woodruff <r-woodruff2@ti.com>. 4. ARMv7 ARM (DDI 0406A) A3-48. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com>
| * | | ARM: OMAP2/3: Reorganize Makefile to add omap4 supportTony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't necessarily want to compile in irq.o and sdrc.o for omap4. Also, clock and prcm may not be implemented initially. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | ARM: OMAP2/3: Remove OMAP_CM_REGADDRTony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | | | | | | | Processor specific macros should be used instead. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | ARM: OMAP2/3: Remove OMAP_PRM_REGADDR and OMAP2_PRM_BASETony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove OMAP_PRM_REGADDR and use processor specific defines instead. Also fold in a patch from Kevin Hilman to add _OFFSET #defines for the PRCM registers to be used with the prm_[read|write]_* macros. These are used extensively in the forthcoming OMAP PM support. Also remove now unused OMAP2_PRM_BASE. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | ARM: OMAP2/3: Remove OMAP2_32KSYNCT_BASETony Lindgren2009-05-25
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use processor specific defines instead. As an extra bonus, this patch fixes the problem of CONFIG_DEBUG_SPINLOCK calling sched_clock before we have things initialized: http://patchwork.kernel.org/patch/15810/ Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | Merge branch 'for-next' of ↵Russell King2009-05-29
|\| | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci into devel
| * | ARM: OMAP2/3: Change omapfb to use clkdev for dispc and rfbi, v2Tony Lindgren2009-05-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes the framebuffer work on omap3. Also fix the clk_get usage for checkpatch.pl "ERROR: do not use assignment in if condition". Cc: Imre Deak <imre.deak@nokia.com> Cc: linux-fbdev-devel@lists.sourceforge.net Acked-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP3: Fix HW SAVEANDRESTORE shift defineKalle Jokiniemi2009-05-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OMAP3430ES2_SAVEANDRESTORE_SHIFT macro is used by powerdomain code in "1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT" manner, but the definition was also (1 << 4), meaning we actually modified bit 16. So the definition needs to be 4. This fixes also a cold reset HW bug in OMAP3430 ES3.x where some of the efuse bits are not isolated during wake-up from off mode. This can cause randomish cold resets with off mode. Enabling the USBTLL hardware SAVEANDRESTORE causes the core power up assert to be delayed in a way that we will not get faulty values when boot ROM is reading the unisolated registers. Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2/3: Add name for musb clocksTony Lindgren2009-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the clkdev, musb_core.c needs to register clock with name "ick". Once all the platforms using the musb driver have been converted to use clockdev, the clock name does not need to be passed from the low-level init code. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2: Fix SPI driver failure on 2420 when running multi-omap configJarkko Nikula2009-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | SPI driver will do unhandled fault on OMAP2420 if trying to probe non-existing SPI busses. Register those additional busses runtime only for cpus having them. Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2: Fix tusb6010 init error and compilation warningJarkko Nikula2009-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix "tusb6010 init error 5, -19" and compilation warning from function tusb6010_platform_retime "warning: 'sysclk_ps' is used uninitialized in this function". I suppose commit c094ba34b8f780885d029ce3c2715a194b780e5d was meant to test for zero fclk_ps instead of sysclk_ps. Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com> Cc: Roel Kluin <roel.kluin@gmail.com> Tested-by: Kalle Valo <kalle.valo@iki.fi> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP: GPIO de-bounce clocks don't affect module idle statePaul Walmsley2009-05-12
| |/ | | | | | | | | | | | | | | | | | | | | | | GPIO de-bounce clocks don't have any impact on the module idle state, so the clock code should not wait for the module to enable after the de-bounce clocks are enabled. Problem found by Kevin Hilman <khilman@deeprootsystems.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Merge branch 'iommu' of ↵Russell King2009-05-25
|\ \ | |/ |/| | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git into devel
| * omap iommu: add MPU_BRIDGE_IOMMU for tidspbridge migrationHiroshi DOYU2009-05-22
| | | | | | | | | | | | | | | | Currently "tidspbridge" driver uses its own mmu implementation and will migrate to use this "omap iommu" eventually. This config is provided to make this migration happen smoothly. Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
| * omap2 iommu: entries for Kconfig and MakefileHiroshi DOYU2009-05-22
| | | | | | | | Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
| * omap iommu: omap3 iommu device registrationHiroshi DOYU2009-05-19
| | | | | | | | Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
| * omap iommu: omap2 architecture specific functionsHiroshi DOYU2009-05-05
| | | | | | | | | | | | | | | | | | The structure 'arch_mmu' accommodates the difference between omap1 and omap2/3. This patch provides omap2/3 specific functions Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
* | Merge branch 'omap-clock-fixes' into omap-fixesTony Lindgren2009-04-24
|\ \
| * | OMAP2/3 GPTIMER: allow system tick GPTIMER to be changed in board-*.c filesPaul Walmsley2009-04-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a function omap2_gp_clockevent_set_gptimer() for board-*.c files to use in .init_irq functions to configure the system tick GPTIMER. Practical choices at this point are GPTIMER1 or GPTIMER12. Both of these timers are in the WKUP powerdomain, and so are unaffected by chip power management. GPTIMER1 can use sys_clk as a source, for applications where a high-resolution timer is more important than power management. GPTIMER12 has the special property that it has the secure 32kHz oscillator as its source clock, which may be less prone to glitches than the off-chip 32kHz oscillator. But on HS devices, it may not be available for Linux use. It appears that most boards are fine with GPTIMER1, but BeagleBoard should use GPTIMER12 when using a 32KiHz timer source, due to hardware bugs in revisions B4 and below. Modify board-omap3beagle.c to use GPTIMER12. This patch originally used a Kbuild config option to select the GPTIMER, but was changed to allow this to be specified in board-*.c files, per Tony's request. Kalle Vallo <kalle.valo@nokia.com> found a bug in an earlier version of this patch - thanks Kalle. Tested on Beagle rev B4 ES2.1, with and without CONFIG_OMAP_32K_TIMER, and 3430SDP. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Cc: Kalle Valo <kalle.valo@nokia.com>
| * | OMAP3: clock: Camera module doesn't have IDLEST bitSergio Aguirre2009-04-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch avoids waiting for the camera module to become ready, since it doesn't have IDLEST bit. Based on a earlier hack done by Paul Walmsley on Sep 9 2008 on linux-omap tree. Signed-off-by: Sergio Aguirre <saaguirre@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * | OMAP2xxx clock: fix broken cpu_mask codePaul Walmsley2009-04-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8ad8ff6548f1c0bcbeaa02f274b3927c5015a921 breaks the OMAP2xxx cpu_mask code, which causes OMAP2xxx to panic on boot. Fix by removing the cpu_mask auto variable and by changing CK_242X and CK_243X to use RATE_IN_242X/RATE_IN_243X. Resolves <1>Unable to handle kernel NULL pointer dereference at virtual address 0000000c <1>pgd = c0004000 <1>[0000000c] *pgd=00000000 Internal error: Oops: 5 [#1] Modules linked in: CPU: 0 Not tainted (2.6.29-omap1 #32) PC is at omap2_clk_set_parent+0x104/0x120 LR is at omap2_clk_set_parent+0x28/0x120 Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Jarkko Nikula <jarkko.nikula@nokia.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
| * | OMAP2xxx clock: pre-initialize struct clks earlyPaul Walmsley2009-04-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3f0a820c4c0b4670fb5f164baa5582e23c2ef118 breaks OMAP2xxx boot during initial propagate_rate() on osc_ck and sys_ck. Fix by pre-initializing all struct clks before running any other clock init code. Incorporates review comments from Russell King <rmk+kernel@arm.linux.org.uk>. Resolves <1>Unable to handle kernel NULL pointer dereference at virtual address 00000000 <1>pgd = c0004000 <1>[00000000] *pgd=00000000 Internal error: Oops: 5 [#1] Modules linked in: CPU: 0 Not tainted (2.6.29-omap1 #37) PC is at propagate_rate+0x10/0x60 LR is at omap2_clk_init+0x30/0x218 ... Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Jarkko Nikula <jarkko.nikula@nokia.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
* | | ARM: OMAP3: Clean up spurious interrupt check logicRoger Quadros2009-04-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPURIOUSIRQ is contained in bits 31:7 of INTC_SIR, so INTC_SIR must be right shifted by 7, not 6. No change in logic, only changes for better readability. Refer to register definition of INTCPS_SIR_IRQ in OMAP3 Manual. Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | ARM: OMAP3: remove duplicated #includeHuang Weiyi2009-04-23
| | | | | | | | | | | | | | | | | | | | | Removed duplicated #include in arch/arm/mach-omap2/board-rx51.c. Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | ARM: OMAP2: possible division by 0Roel Kluin2009-04-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In linus' git tree the functions can be found at: vi arch/arm/mach-omap2/usb-tusb6010.c +200 - tusb6010_platform_retime() vi arch/arm/mach-omap2/gpmc.c +94 - gpmc_get_fclk_period() vi arch/arm/mach-omap2/usb-tusb6010.c +53 - tusb_set_async_mode() vi arch/arm/mach-omap2/usb-tusb6010.c +111 - tusb_set_sync_mode() is -ENODEV appropriate when sysclk_ps == 0? This was found by code analysis, please review. ------------------------------>8-------------8<--------------------------------- gpmc_get_fclk_period() may return 0 when gpmc_l3_clk is not enabled. This is not checked in tusb6010_platform_retime() nor in tusb_set_async_mode() it seems. In tusb_set_sync_mode() this may result in a division by zero. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | ARM: OMAP2: Remove defines and resource init for OMAP24XX EACJarkko Nikula2009-04-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is no anymore legacy driver for OMAP24XX Enhanced Audio Controller in linux-omap and it was newer in mainline so cleanup these unneeded defines and initialization code. Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | ARM: OMAP: Remove old dead gpio expander codeTony Lindgren2009-04-23
| |/ |/| | | | | | | | | | | | | This should be done with GPIO calls. Patches against the mainline tree welcome to add the necessary working functionality back. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | clocksource: pass clocksource to read() callbackMagnus Damm2009-04-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass clocksource pointer to the read() callback for clocksources. This allows us to share the callback between multiple instances. [hugh@veritas.com: fix powerpc build of clocksource pass clocksource mods] [akpm@linux-foundation.org: cleanup] Signed-off-by: Magnus Damm <damm@igel.co.jp> Acked-by: John Stultz <johnstul@us.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Replace all DMA_nBIT_MASK macro with DMA_BIT_MASK(n)Yang Hongyang2009-04-13
|/ | | | | | | | | | | | | | | | This is the second go through of the old DMA_nBIT_MASK macro,and there're not so many of them left,so I put them into one patch.I hope this is the last round. After this the definition of the old DMA_nBIT_MASK macro could be removed. Signed-off-by: Yang Hongyang <yanghy@cn.fujitsu.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Tony Lindgren <tony@atomide.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: James Bottomley <James.Bottomley@HansenPartnership.com> Cc: Greg KH <greg@kroah.com> Cc: Takashi Iwai <tiwai@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'smsc911x-armplatforms' of git://github.com/steveglen/linux-2.6Russell King2009-04-02
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| * ARM: Add SMSC911X support to Overo platform (V2)Steve Sakoman2009-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | Gumstix will soon be shipping a variant of their Summit board that includes an SMSC LAN9221 ethernet interface. This patch provides support via the smsc911x driver when enabled in kernel config. The Overo defconfig is not updated since the LAN9221 is an option not present on all systems. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Steve Glendinning <steve.glendinning@smsc.com>
| * arm: convert omap ldp platform to use smsc911xSteve Glendinning2009-04-02
| | | | | | | | | | | | | | | | from 2.6.29, smc911x isn't maintained anymore. A new driver, smsc911x, will replace it. so convert omap_ldp to use smsc911x driver. Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Signed-off-by: Steve Glendinning <steve.glendinning@smsc.com>
* | [ARM] 5436/1: ARM: OMAP: Fix compile for rx51Tony Lindgren2009-04-01
|/ | | | | | | | | | | | | This fixes a compile error caused by a mismerge while rebasing the patch: linux-2.6/arch/arm/mach-omap2/board-rx51-peripherals.c:354: undefined reference to `twl4030_mmc_init' Looks like I need to also update my build scripts, just grepping for error: in the logs is not obviously enough.. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] OMAP: Fix compile for omap2_init_common_hw()Tony Lindgren2009-03-25
| | | | | Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'for-next' of ↵Russell King2009-03-25
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel
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