| Commit message (Expand) | Author | Age |
* | OMAP3 SDRC: Move the clk stabilization delay to the right place | Rajendra Nayak | 2009-07-24 |
* | OMAP3 SDRC: Fix freeze when scaling CORE dpll to < 83Mhz | Rajendra Nayak | 2009-07-24 |
* | OMAP2/3 SDRC: don't set SDRC_POWER.PWDENA on boot | Paul Walmsley | 2009-07-24 |
* | OMAP3 SDRC: add support for 2 SDRAM chip selects | Jean Pihet | 2009-07-24 |
* | OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLL | Paul Walmsley | 2009-06-19 |
* | OMAP3: Add support for DPLL3 divisor values higher than 2 | Tero Kristo | 2009-06-19 |
* | OMAP3 SRAM: convert SRAM code to use macros rather than magic numbers | Paul Walmsley | 2009-06-19 |
* | OMAP3 SRAM: add more comments on the SRAM code | Paul Walmsley | 2009-06-19 |
* | OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock change | Paul Walmsley | 2009-06-19 |
* | OMAP3 clock: add a short delay when lowering CORE clk rate | Paul Walmsley | 2009-06-19 |
* | OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize | Paul Walmsley | 2009-06-19 |
* | OMAP3 clock: only unlock SDRC DLL if SDRC clk < 83MHz | Paul Walmsley | 2009-05-12 |
* | OMAP3 SRAM: renumber registers to make space for argument passing | Paul Walmsley | 2009-05-12 |
* | OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency change | Paul Walmsley | 2009-05-12 |
* | OMAP3 clock: add interconnect barriers to CORE DPLL M2 change | Paul Walmsley | 2009-05-12 |
* | OMAP3 SRAM: add ARM barriers to omap3_sram_configure_core_dpll | Paul Walmsley | 2009-05-12 |
* | ARM: OMAP3: Add minimal omap3430 support | Syed Mohammed, Khasim | 2008-10-09 |