| Commit message (Collapse) | Author | Age | |
|---|---|---|---|
| * | ARM: OMAP2+: raw read and write endian fix | Victor Kamensky | 2014-05-08 |
| | | | | | | | | | | | | | | | | | All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| * | ARM: OMAP2+: AM43x: SRAM base and size | Sanjeev Premi | 2013-06-12 |
| | | | | | | | | | | | This definition corresponds to the L3_OCMC0, as in case of AM33XX. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com> [tony@atomide.com: updated to remove default y] Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| * | ARM: OMAP: Move omap2+ specific parts of sram.c to mach-omap2 | Tony Lindgren | 2012-10-31 |
| Let's make the omap2+ specific parts private to mach-omap2. This leaves just a minimal shared code into plat-omap like it should be. Signed-off-by: Tony Lindgren <tony@atomide.com> | |||
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index : litmus-rt.git | |
| The LITMUS^RT kernel. | Bjoern Brandenburg |
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